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1. 发明授权

US09384001B2 Custom chaining stubs for instruction code translation 有权
标题翻译：用于指令代码转换的自定义链接存根
公开(公告)号：US09384001B2
公开(公告)日：2016-07-05
申请号：US13586700
申请日：2012-08-15
申请人： Ben Hertzberg , Nathan Tuck
发明人： Ben Hertzberg , Nathan Tuck
IPC分类号： G06F9/44 , G06F9/30 , G06F9/40 , G06F9/32 , G06F9/38
CPC分类号： G06F9/30174 , G06F9/322 , G06F9/3808
摘要： A processing system includes a microprocessor, a hardware decoder arranged within the microprocessor, and a translator operatively coupled to the microprocessor. The hardware decoder is configured to decode instruction code non-native to the microprocessor for execution in the microprocessor. The translator is configured to form a translation of the instruction code in an instruction set native to the microprocessor and to connect a branch instruction in the translation to a chaining stub. The chaining stub is configured to selectively cause additional instruction code at a target address of the branch instruction to be received in the hardware decoder without causing the processing system to search for a translation of additional instruction code at the target address.
摘要翻译：处理系统包括微处理器，布置在微处理器内的硬件解码器以及可操作地耦合到微处理器的转换器。硬件解码器被配置为对微处理器非本机的指令代码进行解码以在微处理器中执行。翻译器被配置为在微处理器本机的指令集中形成指令代码的翻译，并将转换中的分支指令连接到链接存根。链接存根被配置为选择性地使得在分支指令的目标地址处的附加指令代码被接收在硬件解码器中，而不使处理系统搜索目标地址处的附加指令代码的转换。

2. 发明授权

US07908456B2 System and method for allocating and deallocating memory within transactional code 有权
标题翻译：用于在事务代码内分配和释放内存的系统和方法
公开(公告)号：US07908456B2
公开(公告)日：2011-03-15
申请号：US12615565
申请日：2009-11-10
申请人： Ben Hertzberg , Bratin Saha , Ali-Reza Adi-Tabatabai
发明人： Ben Hertzberg , Bratin Saha , Ali-Reza Adi-Tabatabai
IPC分类号： G06F12/00 , G06F17/30
CPC分类号： G06F12/023 , G06F9/466 , G06F9/5016 , Y10S707/99943 , Y10S707/99953
摘要： Methods and systems are provided for managing memory allocations and deallocations while in transactional code, including nested transactional code. The methods and systems manage transactional memory operations by using identifiers, such as sequence numbers, to handle memory management in transactions. The methods and systems also maintain lists of deferred actions to be performed at transaction abort and commit times. A number of memory management routines associated with one or more transactions examine the transaction sequence number of the current transaction, manipulate commit and/or undo logs, and set/use the transaction sequence number of an associated object, but are not so limited. The methods and systems provide for memory allocation and deallocations within transactional code while preserving transactional semantics. Other embodiments are described and claimed.
摘要翻译：提供了方法和系统，用于在事务代码（包括嵌套事务代码）中管理内存分配和释放。方法和系统通过使用标识符（如序列号）来处理事务中的内存管理来管理事务内存操作。方法和系统还维护在事务中止和提交时间执行的延迟操作的列表。与一个或多个事务相关联的多个存储器管理程序检查当前事务的事务序列号，操纵提交和/或撤销日志，以及设置/使用关联对象的事务序列号，但不限于此。方法和系统在事务代码中提供内存分配和释放，同时保留事务语义。描述和要求保护其他实施例。

3. 发明申请

US20100122060A1 SYSTEM AND METHOD FOR ALLOCATING AND DEALLOCATING MEMORY WITHIN TRANSACTIONAL CODE 有权
标题翻译：用于在交易代码中分配和分配存储器的系统和方法
公开(公告)号：US20100122060A1
公开(公告)日：2010-05-13
申请号：US12615565
申请日：2009-11-10
申请人： Ben Hertzberg , Bratin Saha , Ali-Reza Adi-Tabatabai
发明人： Ben Hertzberg , Bratin Saha , Ali-Reza Adi-Tabatabai
IPC分类号： G06F12/02 , G06F12/00
CPC分类号： G06F12/023 , G06F9/466 , G06F9/5016 , Y10S707/99943 , Y10S707/99953
摘要： Methods and systems are provided for managing memory allocations and deallocations while in transactional code, including nested transactional code. The methods and systems manage transactional memory operations by using identifiers, such as sequence numbers, to handle memory management in transactions. The methods and systems also maintain lists of deferred actions to be performed at transaction abort and commit times. A number of memory management routines associated with one or more transactions examine the transaction sequence number of the current transaction, manipulate commit and/or undo logs, and set/use the transaction sequence number of an associated object, but are not so limited. The methods and systems provide for memory allocation and deallocations within transactional code while preserving transactional semantics. Other embodiments are described and claimed.
摘要翻译：提供了方法和系统，用于在事务代码（包括嵌套事务代码）中管理内存分配和释放。方法和系统通过使用标识符（如序列号）来处理事务中的内存管理来管理事务内存操作。方法和系统还维护在事务中止和提交时间执行的延迟操作的列表。与一个或多个事务相关联的多个存储器管理例程检查当前事务的事务序列号，操纵提交和/或撤销日志，以及设置/使用关联对象的事务序列号，但不限于此。方法和系统在事务代码中提供内存分配和释放，同时保留事务语义。描述和要求保护其他实施例。

4. 发明申请

US20070260608A1 System and method for allocating and deallocating memory within transactional code 有权
标题翻译：用于在事务代码内分配和释放内存的系统和方法
公开(公告)号：US20070260608A1
公开(公告)日：2007-11-08
申请号：US11415523
申请日：2006-05-02
申请人： Ben Hertzberg , Bratin Saha , Ali-Reza Adi-Tabatabal
发明人： Ben Hertzberg , Bratin Saha , Ali-Reza Adi-Tabatabal
IPC分类号： G06F17/30
CPC分类号： G06F12/023 , G06F9/466 , G06F9/5016 , Y10S707/99943 , Y10S707/99953
摘要： Methods and systems are provided for managing memory allocations and deallocations while in transactional code, including nested transactional code. The methods and systems manage transactional memory operations by using identifiers, such as sequence numbers, to handle memory management in transactions. The methods and systems also maintain lists of deferred actions to be performed at transaction abort and commit times. A number of memory management routines associated with one or more transactions examine the transaction sequence number of the current transaction, manipulate commit and/or undo logs, and set/use the transaction sequence number of an associated object, but are not so limited. The methods and systems provide for memory allocation and deallocations within transactional code while preserving transactional semantics. Other embodiments are described and claimed.
摘要翻译：提供了方法和系统，用于在事务代码（包括嵌套事务代码）中管理内存分配和释放。方法和系统通过使用标识符（如序列号）来处理事务中的内存管理来管理事务内存操作。方法和系统还维护在事务中止和提交时间执行的延迟操作的列表。与一个或多个事务相关联的多个存储器管理例程检查当前事务的事务序列号，操纵提交和/或撤销日志，以及设置/使用关联对象的事务序列号，但不限于此。方法和系统在事务代码中提供内存分配和释放，同时保留事务语义。描述和要求保护其他实施例。

5. 发明授权

US08190845B2 System and method for allocating and deallocating memory within transactional code 有权
标题翻译：用于在事务代码内分配和释放内存的系统和方法
公开(公告)号：US08190845B2
公开(公告)日：2012-05-29
申请号：US13047257
申请日：2011-03-14
申请人： Ben Hertzberg , Bratin Saha , Ali-Reza Adi-Tabatabai
发明人： Ben Hertzberg , Bratin Saha , Ali-Reza Adi-Tabatabai
IPC分类号： G06F12/00 , G06F17/30
CPC分类号： G06F12/023 , G06F9/466 , G06F9/5016 , Y10S707/99943 , Y10S707/99953
摘要： Methods and systems are provided for managing memory allocations and deallocations while in transactional code, including nested transactional code. The methods and systems manage transactional memory operations by using identifiers, such as sequence numbers, to handle memory management in transactions. The methods and systems also maintain lists of deferred actions to be performed at transaction abort and commit times. A number of memory management routines associated with one or more transactions examine the transaction sequence number of the current transaction, manipulate commit and/or undo logs, and set/use the transaction sequence number of an associated object, but are not so limited. The methods and systems provide for memory allocation and deallocations within transactional code while preserving transactional semantics. Other embodiments are described and claimed.
摘要翻译：提供了方法和系统，用于在事务代码（包括嵌套事务代码）中管理内存分配和释放。方法和系统通过使用标识符（如序列号）来处理事务中的内存管理来管理事务内存操作。方法和系统还维护在事务中止和提交时间执行的延迟操作的列表。与一个或多个事务相关联的多个存储器管理例程检查当前事务的事务序列号，操纵提交和/或撤销日志，以及设置/使用关联对象的事务序列号，但不限于此。方法和系统在事务代码中提供内存分配和释放，同时保留事务语义。描述和要求保护其他实施例。

6. 发明申请

US20090077339A1 OBJECT BASED CONFLICT DETECTION IN A SOFTWARE TRANSACTIONAL MEMORY 有权
标题翻译：基于对象的冲突检测在软件交易记忆中
公开(公告)号：US20090077339A1
公开(公告)日：2009-03-19
申请号：US12270710
申请日：2008-11-13
申请人： Ben Hertzberg , Bratin Saha , Ali-Reza Adl-Tabatabai
发明人： Ben Hertzberg , Bratin Saha , Ali-Reza Adl-Tabatabai
IPC分类号： G06F12/02
CPC分类号： G06F9/524
摘要： Object-based conflict detection is described in the context of software transactional memory. In one example, a pointer is received for a block of instructions, the block of instructions having allocated objects. The lower bits of the pointer are masked if the pointer is in a small object space to obtain a block header for the block, and a size of the allocated objects is determined using the block header.
摘要翻译：基于对象的冲突检测在软件事务内存的上下文中进行了描述。在一个示例中，针对指令块接收指针，该指令块具有分配的对象。如果指针位于小对象空间中以获取块的块头，则指示符的较低位被屏蔽，并且使用块头来确定分配的对象的大小。

7. 发明申请

US20140052962A1 CUSTOM CHAINING STUBS FOR INSTRUCTION CODE TRANSLATION 有权
标题翻译：用于指导代码翻译的自定义链接
公开(公告)号：US20140052962A1
公开(公告)日：2014-02-20
申请号：US13586700
申请日：2012-08-15
申请人： Ben Hertzberg , Nathan Tuck
发明人： Ben Hertzberg , Nathan Tuck
IPC分类号： G06F9/30
CPC分类号： G06F9/30174 , G06F9/322 , G06F9/3808
摘要： A processing system includes a microprocessor, a hardware decoder arranged within the microprocessor, and a translator operatively coupled to the microprocessor. The hardware decoder is configured to decode instruction code non-native to the microprocessor for execution in the microprocessor. The translator is configured to form a translation of the instruction code in an instruction set native to the microprocessor and to connect a branch instruction in the translation to a chaining stub. The chaining stub is configured to selectively cause additional instruction code at a target address of the branch instruction to be received in the hardware decoder without causing the processing system to search for a translation of additional instruction code at the target address.
摘要翻译：处理系统包括微处理器，布置在微处理器内的硬件解码器以及可操作地耦合到微处理器的转换器。硬件解码器被配置为对微处理器非本机的指令代码进行解码以在微处理器中执行。翻译器被配置为在微处理器本机的指令集中形成指令代码的翻译，并将转换中的分支指令连接到链接存根。链接存根被配置为选择性地使得在分支指令的目标地址处的附加指令代码被接收在硬件解码器中，而不使处理系统搜索目标地址处的附加指令代码的转换。

8. 发明申请

US20130311752A1 INSTRUCTION-OPTIMIZING PROCESSOR WITH BRANCH-COUNT TABLE IN HARDWARE 审中-公开
标题翻译：指令优化处理器在硬件分支计数表
公开(公告)号：US20130311752A1
公开(公告)日：2013-11-21
申请号：US13475755
申请日：2012-05-18
申请人： Rupert Brauch , Madhu Swarna , Ross Segelken , David Dunn , Ben Hertzberg
发明人： Rupert Brauch , Madhu Swarna , Ross Segelken , David Dunn , Ben Hertzberg
IPC分类号： G06F9/30
CPC分类号： G06F9/45516 , G06F9/30174
摘要： A processing system comprising a microprocessor core and a translator. Within the microprocessor core is arranged a hardware decoder configured to selectively decode instructions for execution in the microprocessor core, and, a logic structure configured to track usage of the hardware decoder. The translator is operatively coupled to the logic structure and configured to selectively translate the instructions for execution in the microprocessor core, based on the usage of the hardware decoder as determined by the logic structure.
摘要翻译：一种包括微处理器核心和转换器的处理系统。在微处理器核心内布置有硬件解码器，其被配置为选择性地解码用于在微处理器核心中执行的指令，以及被配置为跟踪硬件解码器的使用的逻辑结构。翻译器可操作地耦合到逻辑结构并且被配置为基于由逻辑结构确定的硬件解码器的使用来选择性地转换用于在微处理器核心中执行的指令。

9. 发明授权

US07502897B2 Object based conflict detection in a software transactional memory 有权
标题翻译：软件事务内存中基于对象的冲突检测
公开(公告)号：US07502897B2
公开(公告)日：2009-03-10
申请号：US11477339
申请日：2006-06-28
申请人： Ben Hertzberg , Bratin Saha , Ali-Reza Adl-Tabatabai
发明人： Ben Hertzberg , Bratin Saha , Ali-Reza Adl-Tabatabai
IPC分类号： G06F12/14
CPC分类号： G06F9/524
摘要： Object-based conflict detection is described in the context of software transactional memory. In one example, a block of instructions is received for execution as an object in a software transactional memory transaction. The base of the object is computed, a lock is found for the object using the base of the object.
摘要翻译：基于对象的冲突检测在软件事务内存的上下文中进行了描述。在一个示例中，接收指令块作为软件事务存储器事务中的对象执行。计算对象的基数，使用对象的基础为对象找到一个锁。

10. 发明申请

US20080022054A1 Object based conflict detection in a software transactional memory 有权
标题翻译：软件事务内存中基于对象的冲突检测
公开(公告)号：US20080022054A1
公开(公告)日：2008-01-24
申请号：US11477339
申请日：2006-06-28
申请人： Ben Hertzberg , Bratin Saha , Ali-Reza Adl-Tabatabai
发明人： Ben Hertzberg , Bratin Saha , Ali-Reza Adl-Tabatabai
IPC分类号： G06F12/14
CPC分类号： G06F9/524
摘要： Object-based conflict detection is described in the context of software transactional memory. In one example, a block of instructions is received for execution as an object in a software transactional memory transaction. The base of the object is computed, a lock is found for the object using the base of the object.
摘要翻译：基于对象的冲突检测在软件事务内存的上下文中进行了描述。在一个示例中，接收指令块作为软件事务存储器事务中的对象执行。计算对象的基数，使用对象的基础为对象找到一个锁。

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