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1. 发明申请

US20090140291A1 PHOTO-DETECTOR FOR DETECTING IMAGE SIGNAL OF INFRARED LASER RADAR AND METHOD OF MANUFACTURING THE SAME 有权
公开(公告)号：US20090140291A1
公开(公告)日：2009-06-04
申请号：US11635170
申请日：2006-12-07
申请人： Eun Soo Nam , Seon Eui Hong , Myoung Sook Oh , Yong Won Kim , Ho Young Kim , Bo Woo Kim
发明人： Eun Soo Nam , Seon Eui Hong , Myoung Sook Oh , Yong Won Kim , Ho Young Kim , Bo Woo Kim
IPC分类号： H01L31/0304 , H01L21/329
CPC分类号： H01L27/14694 , H01L27/1463 , H01L27/14632 , H01L27/14649 , H01L27/14687
摘要： A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are provided. The photo-detector includes a multi-layer compound semiconductor layer formed on a compound semiconductor substrate. A number of p-n junction diodes are arranged in a regular order in a selected region of the compound semiconductor layer, and an isolation region for individually isolating the p-n junction diodes is formed by implanting impurity ions in the multi-layer compound semiconductor layer. The isolation region and the surface of the compound semiconductor layer are positioned on the same level. The isolation region may be a Fe-impurity region.

2. 发明授权

US07141464B2 Method of fabricating T-type gate 失效
标题翻译：制造T型门的方法
公开(公告)号：US07141464B2
公开(公告)日：2006-11-28
申请号：US11179983
申请日：2005-07-12
申请人： Jong Moon Park , Kun Sik Park , Seong Wook Yoo , Yong Sun Yoon , Sang Gi Kim , Yoon Kyu Bae , Byung Won Lim , Jin Gun Koo , Bo Woo Kim
发明人： Jong Moon Park , Kun Sik Park , Seong Wook Yoo , Yong Sun Yoon , Sang Gi Kim , Yoon Kyu Bae , Byung Won Lim , Jin Gun Koo , Bo Woo Kim
IPC分类号： H01L21/338
CPC分类号： H01L21/28587
摘要： Provided is a method of fabricating a T-type gate including the steps of: forming a first photoresist layer, a blocking layer and a second photoresist layer to a predetermined thickness on a substrate, respectively; forming a body pattern of a T-type gate on the second photoresist layer and the blocking layer; exposing a predetermined portion of the second photoresist layer to form a head pattern of the T-type gate, and performing a heat treatment process to generate cross linking at a predetermined region of the second photoresist layer except for the head pattern of the T-type gate; performing an exposure process on an entire surface of the resultant structure, and then removing the exposed portion; and forming a metal layer of a predetermined thickness on an entire surface of the resultant structure, and then removing the first photoresist layer, the blocking layer, the predetermined region of the second photoresist layer in which the cross linking are generated, and the metal layer, whereby it is possible to readily perform a compound semiconductor device manufacturing process, and to reduce manufacturing cost by means of the increase of manufacturing yield and the simplification of manufacturing processes.
摘要翻译：提供一种制造T型栅极的方法，包括以下步骤：分别在衬底上形成预定厚度的第一光致抗蚀剂层，阻挡层和第二光致抗蚀剂层; 在所述第二光致抗蚀剂层和所述阻挡层上形成T型栅极的主体图案; 暴露第二光致抗蚀剂层的预定部分以形成T型栅极的头部图案，并且进行热处理工艺以在除了T型的头部图案之外的第二光致抗蚀剂层的预定区域处产生交联门; 在所得结构的整个表面上进行曝光处理，然后去除所述暴露部分; 在所得结构的整个表面上形成预定厚度的金属层，然后去除第一光致抗蚀剂层，阻挡层，产生交联的第二光致抗蚀剂层的预定区域和金属层，由此可以容易地进行化合物半导体器件制造工艺，并且通过增加制造成品率和简化制造工艺来降低制造成本。

3. 发明授权

US5500389A Process for formation for hetero junction structured film utilizing V grooves 失效
标题翻译：利用V沟槽形成异质结结构薄膜的工艺
公开(公告)号：US5500389A
公开(公告)日：1996-03-19
申请号：US342031
申请日：1994-11-17
申请人： Seung-Chang Lee , Sun-Jin Yun , Bo-Woo Kim , Sang-Won Kang
发明人： Seung-Chang Lee , Sun-Jin Yun , Bo-Woo Kim , Sang-Won Kang
IPC分类号： B82Y10/00 , B82Y40/00 , H01L21/20 , H01L21/203
CPC分类号： H01L33/025 , H01L21/0243 , H01L21/02532 , H01L21/02639 , H01L33/002 , Y10S438/938
摘要： A process for formation of a hetero junction structured film utilizing V grooves is disclosed. A monocrystalline film 1 is etched into V grooves, and thereupon, a hetero film 2 having misfits is grown, so that dislocations would be intensively distributed within the V grooves. Then, an oxide layer 3 is formed thereupon, and then, the portions of the oxide layer 3 and the hereto film 2 corresponding to the V grooves are removed by carrying out an etching. Then, the residue oxide layer is removed, thereby forming a non-stress non-dislocation hetero junction structure. Further, the following steps can be added. That is, on the above structure, a thin oxide layer 3 is deposited by carrying out a thermal oxidation or a chemical deposition, and then, a polycrystalline silicon film 4 is deposited. Then the surface irregularities are smoothened by carrying out a selective grinding. Or the following steps may be added. That is, the V groove portions of the hetero film 2 and the monocrystalline film 1 are filled with a monocrystalline film, and the residue oxide layer 3 is removed. Thus a hetero junction film can be grown in which the stress effect is minimized, and the dislocation concentration is made to be extremely low.
摘要翻译：公开了一种利用V沟形成异质结结构薄膜的方法。将单晶膜1蚀刻成V槽，随后生长出错位的异质膜2，使位错集中分布在V槽内。然后，在其上形成氧化物层3，然后通过进行蚀刻来去除与V槽对应的氧化物层3和本膜2的部分。然后，除去残留氧化物层，从而形成非应力非位错异质结结构。此外，可以添加以下步骤。也就是说，在上述结构中，通过进行热氧化或化学沉积来沉积薄的氧化物层3，然后沉积多晶硅膜4。然后通过进行选择性研磨使表面凹凸平滑。或者可以添加以下步骤。也就是说，异质膜2和单晶膜1的V槽部分填充有单晶膜，并且去除残余氧化物层3。因此，可以生长应力效应最小化的异质结膜，并使位错浓度极低。

4. 发明授权

US07855366B2 Bipolar junction transistor-based uncooled infrared sensor and manufacturing method thereof 有权
标题翻译：双极结晶体管型非制冷红外传感器及其制造方法
公开(公告)号：US07855366B2
公开(公告)日：2010-12-21
申请号：US12111830
申请日：2008-04-29
申请人： Kun Sik Park , Yong Sun Yoon , Bo Woo Kim , Jin Yeong Kang , Jong Moon Park , Seong Wook Yoo
发明人： Kun Sik Park , Yong Sun Yoon , Bo Woo Kim , Jin Yeong Kang , Jong Moon Park , Seong Wook Yoo
IPC分类号： G01J5/20
CPC分类号： G01J5/20 , H01L21/762 , H01L27/1203
摘要： A BJT (bipolar junction transistor)-based uncooled IR sensor and a manufacturing method thereof are provided. The BJT-based uncooled IR sensor includes: a substrate; at least one BJT which is formed to be floated apart from the substrate; and a heat absorption layer which is formed on an upper surface of the at least one BJT, wherein the BJT changes an output value according heat absorbed through the heat absorption layer. Accordingly, it is possible to provide a BJT-based uncooled IR sensor capable of being implemented through a CMOS compatible process and obtaining more excellent temperature change detection characteristics.
摘要翻译：提供了一种基于BJT（双极结型晶体管）的非制冷IR传感器及其制造方法。基于BJT的非制冷红外传感器包括：基板; 至少一个BJT，其形成为与衬底分开浮动; 以及形成在所述至少一个BJT的上表面上的吸热层，其中所述BJT根据通过所述吸热层吸收的热量来改变输出值。因此，可以提供能够通过CMOS兼容工艺实现的BJT系非冷却IR传感器，并获得更优异的温度变化检测特性。

5. 发明申请

US20090239328A1 PHOTO-DETECTOR FOR DETECTING IMAGE SIGNAL OF INFRARED LASER RADAR AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：用于检测红外激光雷达的图像信号的光电检测器及其制造方法
公开(公告)号：US20090239328A1
公开(公告)日：2009-09-24
申请号：US12428575
申请日：2009-04-23
申请人： Eun Soo Nam , Seon Eui Hong , Myoung Sook Oh , Yong Won Kim , Ho Young Kim , Bo Woo Kim
发明人： Eun Soo Nam , Seon Eui Hong , Myoung Sook Oh , Yong Won Kim , Ho Young Kim , Bo Woo Kim
IPC分类号： H01L21/77 , H01L21/329 , H01L31/0304
CPC分类号： H01L27/14694 , H01L27/1463 , H01L27/14632 , H01L27/14649 , H01L27/14687
摘要： A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are provided. The photo-detector includes a multi-layer compound semiconductor layer formed on a compound semiconductor substrate. A number of p-n junction diodes are arranged in a regular order in a selected region of the compound semiconductor layer, and an isolation region for individually isolating the p-n junction diodes is formed by implanting impurity ions in the multi-layer compound semiconductor layer. The isolation region and the surface of the compound semiconductor layer are positioned on the same level. The isolation region may be a Fe-impurity region.
摘要翻译：一种光电检测器，其中用于连接电极的金属布线布置在平坦化表面上，从而简化了金属布线布置，并提供了其制造方法。光检测器包括形成在化合物半导体衬底上的多层化合物半导体层。在化合物半导体层的选定区域中以规则的顺序布置多个p-n结二极管，并且通过在多层化合物半导体层中注入杂质离子来形成用于单独隔离p-n结二极管的隔离区域。隔离区域和化合物半导体层的表面位于同一水平。隔离区域可以是Fe杂质区域。

6. 发明授权

US07324567B2 Modulation frequency tunable optical oscillator 失效
标题翻译：调制频率可调光学振荡器
公开(公告)号：US07324567B2
公开(公告)日：2008-01-29
申请号：US11017654
申请日：2004-12-22
申请人： Young Ho Kim , Eun Soo Nam , Kyoung Ik Cho , Bo Woo Kim , Myung Sook Oh
发明人： Young Ho Kim , Eun Soo Nam , Kyoung Ik Cho , Bo Woo Kim , Myung Sook Oh
IPC分类号： H01S3/30
CPC分类号： H01S3/067 , H01S3/0675 , H01S3/07 , H01S3/0809 , H01S3/082 , H01S3/1055
摘要： Provided is a millimeter-wave band frequency optical oscillator that can be used as an oscillation frequency signal source for a millimeter-wave forwarded to wireless subscribers from a base station of a millimeter-wave wireless subscriber communication system for a next generation (e.g., fifth generation) ultra-high speed wireless internet service. A pair of an optical fiber amplifier and an optical fiber grating mirror is connected to each of input/output ports of a loop mirror in parallel, so that a dual mode laser resonator is formed which can make simultaneous oscillation in two laser modes suitable for each wavelength. Accordingly, it is possible to obtain a light source that is modulated to a ultra-high frequency (over 60 GHz) by a beat phenomenon between the two laser modes.
摘要翻译：提供了一种毫米波段频率光学振荡器，其可以用作从用于下一代的毫米波无线用户通信系统的基站转发到无线用户的毫米波的振荡频率信号源（例如，第五一代）超高速无线互联网服务。一对光纤放大器和光纤光栅反射镜并联连接到环形反射镜的每个输入/输出端口，从而形成双模式激光谐振器，其可以在适合于每个激光模式的两种激光模式中同时振荡波长。因此，可以通过两种激光模式之间的拍子现象来获得被调制到超高频（超过60GHz）的光源。

7. 发明授权

US07297976B2 Optoelectronic transmitter integrated circuit and method of fabricating the same using selective growth process 失效
标题翻译：光电发射机集成电路及其制造方法采用选择性生长工艺
公开(公告)号：US07297976B2
公开(公告)日：2007-11-20
申请号：US11282339
申请日：2005-11-18
申请人： Eun Soo Nam , Yong Won Kim , Seon Eui Hong , Myung Sook Oh , Bo Woo Kim
发明人： Eun Soo Nam , Yong Won Kim , Seon Eui Hong , Myung Sook Oh , Bo Woo Kim
IPC分类号： H01L29/06
CPC分类号： H01L31/18 , B82Y20/00 , G02F1/017
摘要： Provided are an optoelectronic (OE) transmitter integrated circuit (IC) and method of fabricating the same using a selective growth process. In the OE transmitter IC, a driving circuit, which includes a double heterojunction bipolar transistor (DHBT) and amplifies received electric signals to drive an electroabsorption (EA) modulator, and the EA modulator with a multi-quantum well (MQW) absorption layer are integrated as a single chip on a semi-insulating substrate. The MQW absorption layer of the EA modulator and an MQW insertion layer of the DHBT are formed to different thicknesses from each other using a selective MOCVD growth process.
摘要翻译：提供了一种光电（OE）发射器集成电路（IC）及其使用选择性生长工艺制造它的方法。在OE发射机IC中，包括双异质结双极晶体管（DHBT）的驱动电路并放大接收的电信号以驱动电吸收（EA）调制器，并且具有多量子阱（MQW）吸收层的EA调制器是在半绝缘基板上集成为单芯片。 EA调制器的MQW吸收层和DHBT的MQW插入层使用选择性MOCVD生长工艺彼此形成为不同的厚度。

8. 发明申请

US20060079030A1 Method of fabricating T-type gate 失效
公开(公告)号：US20060079030A1
公开(公告)日：2006-04-13
申请号：US11179983
申请日：2005-07-12
申请人： Jong Moon Park , Kun Sik Park , Seong Wook Yoo , Yong Sun Yoon , Sang Gi Kim , Yoon Kyu Bae , Byung Won Lim , Jin Gun Koo , Bo Woo Kim
发明人： Jong Moon Park , Kun Sik Park , Seong Wook Yoo , Yong Sun Yoon , Sang Gi Kim , Yoon Kyu Bae , Byung Won Lim , Jin Gun Koo , Bo Woo Kim
IPC分类号： H01L21/8232 , H01L21/338
CPC分类号： H01L21/28587
摘要： Provided is a method of fabricating a T-type gate including the steps of: forming a first photoresist layer, a blocking layer and a second photoresist layer to a predetermined thickness on a substrate, respectively; forming a body pattern of a T-type gate on the second photoresist layer and the blocking layer; exposing a predetermined portion of the second photoresist layer to form a head pattern of the T-type gate, and performing a heat treatment process to generate cross linking at a predetermined region of the second photoresist layer except for the head pattern of the T-type gate; performing an exposure process on an entire surface of the resultant structure, and then removing the exposed portion; and forming a metal layer of a predetermined thickness on an entire surface of the resultant structure, and then removing the first photoresist layer, the blocking layer, the predetermined region of the second photoresist layer in which the cross linking are generated, and the metal layer, whereby it is possible to readily perform a compound semiconductor device manufacturing process, and to reduce manufacturing cost by means of the increase of manufacturing yield and the simplification of manufacturing processes.

9. 发明授权

US6147896A Nonvolatile ferroelectric memory using selective reference cell 有权
标题翻译：使用选择性参考电池的非易失性铁电存储器
公开(公告)号：US6147896A
公开(公告)日：2000-11-14
申请号：US429752
申请日：1999-10-28
申请人： Shi-Ho Kim , Bo-Woo Kim , Byoung-Gon Yu , Won-Jae Lee
发明人： Shi-Ho Kim , Bo-Woo Kim , Byoung-Gon Yu , Won-Jae Lee
IPC分类号： G11C7/06 , G11C11/22
CPC分类号： G11C11/22
摘要： A nonvolatile ferroelectric memory that reduces the number of cycles of reference cells to extend lifetime of memory. A reference cell of the memory is activated to provide a reference voltage to a sense amplifier only when the sense amplifier needs the reference voltage. The memory comprises a plurality of cells arranged in a matrix form and including memory cells and reference cells, and a plurality of sense amplifiers arranged in a row of the matrix, in which each sense amplifier compares voltages induced from a reference cell and a selected memory cell to read information stored in the selected memory cell, and in which each reference cell is activated only when both a selection signal from a column address and a word line connected to said reference cell are enabled.
摘要翻译：一种非易失性铁电存储器，其减少参考单元的周期数以延长存储器的使用寿命。仅当感测放大器需要参考电压时，激活存储器的参考单元才能向读出放大器提供参考电压。存储器包括以矩阵形式布置并且包括存储器单元和参考单元的多个单元以及布置在矩阵的一行中的多个读出放大器，其中每个读出放大器将从参考单元引起的电压和所选择的存储器进行比较单元读取存储在所选择的存储器单元中的信息，并且其中每个参考单元仅当来自列地址的选择信号和连接到所述参考单元的字线都被使能时被激活。

10. 发明授权

US6093599A Method of manufacturing inductor device on a silicon substrate thereof 有权
标题翻译：在其硅衬底上制造电感器件的方法
公开(公告)号：US6093599A
公开(公告)日：2000-07-25
申请号：US232691
申请日：1999-01-19
申请人： Jin Hyo Lee , Heung Soo Rhee , Hyun Kyu Yu , Bo Woo Kim , Kee Soo Nam
发明人： Jin Hyo Lee , Heung Soo Rhee , Hyun Kyu Yu , Bo Woo Kim , Kee Soo Nam
IPC分类号： H01L21/76 , H01L21/763 , H01L21/822 , H01L27/04 , H01L27/08 , H01L21/8234
CPC分类号： H01L21/763 , H01L27/08
摘要： The present invention relates to a on silicon substrate, specifically to an inductor device and manufacturing method thereof for enhancing the quality factor of the inductor by disposing trenches on a silicon substratre, and by filling the inside of the trenches with polycrystalline polysilicon not doped with impurities. The present invention provides an inductor device and a manufacturing method thereof which can improve the quality factor by increasing resistance of the substrate by forming deep trenches disposed in specific patterns on a low-resistance silicon substrate and filling polycrystalline silicon not doped with impurities, and by reducing parasitic capacitance between the inductor and the silicon substrate.
摘要翻译：本发明涉及一种硅衬底，具体涉及一种电感器件及其制造方法，用于通过在硅衬底上设置沟槽来提高电感器的品质因数，并且通过用不掺杂杂质的多晶多晶硅填充沟槽内部。本发明提供一种电感器件及其制造方法，其可以通过在低电阻硅衬底上形成以特定图案设置的深沟槽并填充未掺杂杂质的多晶硅，并且通过降低电感器和硅衬底之间的寄生电容。

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