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    • 8. 发明申请
    • SEMICONDUCTOR SYSTEM AND SEMICONDUCTOR APPARATUS
    • 半导体系统和半导体器件
    • US20120195153A1
    • 2012-08-02
    • US13168071
    • 2011-06-24
    • Dae Han KWONChang Kyu CHOIJun Woo LEETaek Sang SONG
    • Dae Han KWONChang Kyu CHOIJun Woo LEETaek Sang SONG
    • G11C8/18
    • G11C7/1066
    • A semiconductor apparatus includes an odd data clock buffer group configured to maintain or shift a phase of a multi-phase source clock signal, and output a first multi-phase clock signal, an even data clock buffer group configured to maintain or shift a phase of the multi-phase source clock signal, and output a second multi-phase clock signal, an odd data output buffer group configured to drive odd data in response to the first multi-phase clock signal and output the driven data to an odd data pad group, and an even data output buffer group configured to drive even data in response to the second multi-phase clock signal and output the driven data to an even data pad group, wherein the phases of clock signals of the first and second multi-phase clock signal are different from each other.
    • 半导体装置包括奇数数据时钟缓冲器组,被配置为维持或移位多相源时钟信号的相位,并输出第一多相时钟信号,偶数数据时钟缓冲器组被配置为维持或移位相位 多相源时钟信号,并输出第二多相时钟信号,奇数数据输出缓冲器组被配置为响应于第一多相时钟信号驱动奇数数据,并将驱动数据输出到奇数数据焊盘组 以及偶数数据输出缓冲器组,被配置为响应于第二多相时钟信号驱动偶数数据,并将驱动数据输出到偶数数据焊盘组,其中第一和第二多相时钟的时钟信号的相位 信号彼此不同。