会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Adaptive coherent optical processing method and apparatus for
recognizing and counting objects
    • 用于识别和计数物体的自适应相干光学处理方法和装置
    • US4139303A
    • 1979-02-13
    • US761365
    • 1977-01-21
    • F. Paul CarlsonCharles K. Lee
    • F. Paul CarlsonCharles K. Lee
    • G01N15/02G06K9/76G01N33/16G01N21/00
    • G06K9/76G01N15/0211G01N2021/4716
    • Recognizing and counting geometrically distant objects, such as objects of a particular morphological type (e.g., reticulated red blood cells), located in a field of objects of varying types is disclosed. Coherent light is directed toward a monolayer of objects of various types. The light scattered by the objects is collected by a collecting lens and forms a composite Fourier spectrum at the focal plane of the lens. The Fourier spectrum is selectively analyzed on the basis that each object creates a unique portion of the composite Fourier spectrum, and that a family of objects that are geometrically similar have additive spectrums, when their population is large, randomly located, and nonoverlapping. The analysis is performed by making intensity measurements at radial points in the Fourier plane, weighting the measurements, and summing the result. The radial points and weighting factors are determined using regression techniques.
    • 公开了几何距离物体的识别和计数,诸如位于不同类型物体的场中的特定形态类型(例如,网状红细胞)的物体。 相干光指向各种类型的物体的单层。 由物体散射的光由收集透镜收集,并在透镜的焦平面处形成复合傅立叶光谱。 基于每个对象创建复合傅立叶频谱的唯一部分,选择性地分析傅立叶频谱,并且当它们的人口大,随机位置和不重叠时,几何相似的一系列对象具有附加谱。 通过在傅立叶平面中的径向点进行强度测量,对测量进行加权,并对结果求和来进行分析。 使用回归技术确定径向点和加权因子。
    • 3. 发明授权
    • Method of forming a contact for multi-level interconnects in an
integrated circuit
    • 在集成电路中形成多级互连的触点的方法
    • US5420076A
    • 1995-05-30
    • US176617
    • 1994-01-03
    • Charles K. LeeShin-Puu Jen
    • Charles K. LeeShin-Puu Jen
    • H01L21/768H01L21/44
    • H01L21/76802
    • A via opening (24) is formed within a semiconductor structure (10) in order to allow for the insertion of a contact to establish multi-level interconnects in an integrated circuit. The via opening (24) extends to a conductive layer (16) within the semiconductor structure (10). During the formation of the via opening (24), a residual layer (26) is created within the via opening (24) and on the exposed surface of the conductive layer (16). A dry plasma material is introduced at the semiconductor structure (10) to remove the residual layer (26) from the via opening (24) and the exposed surface of the conductive layer (16). After removal of the residual layer (26), a conductive material for establishing the contact for connection to the conductive layer (16) is inserted within the via opening (24).
    • 通孔开口(24)形成在半导体结构(10)内,以便允许在集成电路中插入触点以建立多电平互连。 通孔开口(24)延伸到半导体结构(10)内的导电层(16)。 在形成通孔(24)期间,在通孔开口(24)内和导电层(16)的暴露表面上形成残留层(26)。 在半导体结构(10)处引入干等离子体材料以从通孔开口(24)和导电层(16)的暴露表面去除残留层(26)。 在除去残留层(26)之后,用于建立用于与导电层(16)连接的触点的导电材料插入通孔开口(24)内。
    • 5. 发明授权
    • Counting apparatus and method for frequency sampling
    • 频率采样计数装置及方法
    • US4541105A
    • 1985-09-10
    • US592657
    • 1984-03-23
    • Charles K. LeeRex B. PetersAleksandar M. Gogic
    • Charles K. LeeRex B. PetersAleksandar M. Gogic
    • G01R23/02G01R23/10G01R23/00
    • G01R23/10G01R23/02
    • An apparatus and method for counting the number of cycles of a sensor signal and of a reference signal that occur during respective time intervals associated with a sampling interval defined by a sample signal. Sensor and reference gate signals are produced and respectively define sensor and reference intervals. The sensor interval begins and ends synchronously with respect to the sensor signal, and the reference interval begins and ends synchronously with respect to the reference signal. The sensor, reference and sampling intervals are approximately coextensive with one another. Cycles of the sensor and reference signals are counted during the sensor and reference intervals, respectively. The process may be repeated for a plurality of successive sampling intervals.
    • 一种用于对传感器信号的周期数和在与由采样信号定义的采样间隔相关联的各个时间间隔期间发生的参考信号进行计数的装置和方法。 产生传感器和参考门信号,并分别定义传感器和参考间隔。 传感器间隔相对于传感器信号同步开始和结束,参考间隔相对于参考信号同步开始和结束。 传感器,参考和采样间隔大致相互延伸。 传感器和参考信号的周期分别在传感器和参考间隔期间进行计数。 该过程可以重复多个连续采样间隔。
    • 6. 发明授权
    • Frequency counting apparatus and method
    • 频率计数装置及方法
    • US4786861A
    • 1988-11-22
    • US91977
    • 1987-09-01
    • Rand H. Hulsing, IICharles K. Lee
    • Rand H. Hulsing, IICharles K. Lee
    • G01R23/14G01R23/10G01R23/02
    • G01R23/10
    • A device and method for measuring the frequency of an input signal by measuring the number of cycles of the input signal that occur in a sample interval between successive sampling times t.sub.n. An integer counter determines an estimated integer number of input signal cycles, and fraction counters determine fractional counts by counting cycles of a clock signal during time intervals between a first measurement time before the sampling time and a second measurement time after the sampling time. A correction circuit refines the fractional counts by determining the phase relationships between the clock and input signals at each measurement time. The correction circuit includes a constant current source, a capacitor, a first switch connected between the constant current source and a reference potential, a second switch connected between the constant current source and the capacitor, and a control circuit for the switches. The control circuit disconnects the current source from the reference potential at each measurement time, and disconnects the current source from the capacitor upon the next occurance of a periodic characteristic of the clock signal that occurs after the measurement time. The voltage on the capacitor then provides the required phase relationship.
    • 一种用于通过测量在连续采样时间tn之间的采样间隔中发生的输入信号的周期数来测量输入信号的频率的装置和方法。 整数计数器确定输入信号周期的估计整数,分数计数器通过在采样时间之前的第一测量时间与采样时间之后的第二测量时间之间的时间间隔期间计数时钟信号的周期来确定分数计数。 校正电路通过在每个测量时间确定时钟和输入信号之间的相位关系来优化分数计数。 校正电路包括恒流源,电容器,连接在恒流源和参考电位之间的第一开关,连接在恒流源和电容器之间的第二开关,以及用于开关的控制电路。 控制电路在每个测量时间将电流源与参考电位断开,并且在测量时间之后发生的时钟信号的周期性特征的下一次发生时将电流源与电容器断开。 电容器上的电压然后提供所需的相位关系。
    • 7. 发明授权
    • Apparatus and method for improving the resolution with which a test
signal is counted
    • 用于提高测试信号计数的分辨率的装置和方法
    • US5097490A
    • 1992-03-17
    • US640985
    • 1991-01-14
    • Rand H. Hulsing, IICharles K. Lee
    • Rand H. Hulsing, IICharles K. Lee
    • G01R23/10
    • G01R23/10
    • Apparatus and method for counting frequency of a signal with improved resolution. Frequency counters (10, 60, and 100) accumulate clock cycles from a reference oscillator (20) during a sample interval. In the simplest form of the frequency counter, the reference clock signal is inverted and both the noninverted and inverted clock cycles are accumulated in separate counters (40 and 44). The accumulated counts are totaled in a summing circuit (48) and divided by two to determine their average, thereby doubling the resolution of the frequency counter. A more complex embodiment of the invention corrects a raw count of cycles of an input signal (12) that are accumulated during an extended sample interval defined by successive rising edges of a sample signal (114). The fractional portion of a cycle of the input waveform that occurred prior to the beginning of the extended sample interval is added to the raw count and the fractional portion of the input waveform that occurred after the end of the extended sample interval is subtracted. These fractional portions are defined as ratios of a partial count of clock cycles to a full count of clock cycled. The partial count is the number of clock cycles occurring between a rising edge of the sample signal and the next rising edge of the input signal, while the full count is the number of clock cycles occurring between successive rising edges of the input signal. One-half clock logic circuits (126 and 136) double the resolution of the counts accumulated by a partial counter (122) and a full counter (142), thereby doubling the resolution with which the ratios of the two counts are determined.
    • 用改进分辨率对信号频率进行计数的装置和方法。 频率计数器(10,60和100)在采样间隔期间从参考振荡器(20)累加时钟周期。 在频率计数器的最简单形式中,参考时钟信号被反相,同相和反相时钟周期都被累积在单独的计数器(40和44)中。 积累的计数总计在求和电路(48)中,并被除以2以确定它们的平均值,从而使频率计数器的分辨率加倍。 本发明的更复杂的实施例校正在由采样信号(114)的连续上升沿限定的扩展采样间隔期间累积的输入信号(12)的周期的原始计数。 在扩展采样间隔开始之前发生的输入波形的周期的小数部分被加到原始计数,并且减去在扩展采样间隔结束之后发生的输入波形的小数部分。 这些小数部分定义为时钟周期的部分计数与循环时钟的完整计数的比率。 部分计数是在采样信号的上升沿和输入信号的下一个上升沿之间发生的时钟周期数,而全部计数是在输入信号的连续上升沿之间发生的时钟周期数。 二分之一时钟逻辑电路(126和136)使由部分计数器(122)和全计数器(142)累积的计数的分辨率翻一倍,从而将确定两个计数的比率的分辨率加倍。