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1. 发明授权

US08055981B2 Control system for an optical storage device 有权
标题翻译：光存储设备的控制系统
公开(公告)号：US08055981B2
公开(公告)日：2011-11-08
申请号：US11979897
申请日：2007-11-09
申请人： Ching-Wen Ma , Zheng-Xiong Chen , Shih-Hsien Liu
发明人： Ching-Wen Ma , Zheng-Xiong Chen , Shih-Hsien Liu
IPC分类号： H03M13/00
CPC分类号： G11B20/18 , G11B20/10037 , G11B2020/1281 , G11B2020/1836
摘要： A control system determines read performance of an optical storage device according to lock performance of a re-timing signal. The control system includes a filtering and re-timing unit for receiving a radio frequency (RF) signal and outputting the re-timing signal and an un-corrected output signal, an error correction unit for receiving the un-corrected output signal and correcting an error bit according to a Reed-Solomon algorithm to generate a corrected output signal, a lock performance detector for receiving the re-timing signal and detecting the lock performance of the re-timing signal and then outputting a lock performance index, and a servo control loop for receiving the RF signal and the lock performance index and thus generating a servo control signal. When the lock performance index does not reach a threshold value, the servo control loop loads other control parameters to improve the read performance of the optical storage device.
摘要翻译：控制系统根据重新定时信号的锁定性能确定光学存储设备的读取性能。控制系统包括滤波和重新定时单元，用于接收射频（RF）信号并输出重新定时信号和未校正的输出信号;纠错单元，用于接收未校正的输出信号并校正一个根据Reed-Solomon算法生成校正输出信号的错误位;锁定性能检测器，用于接收重新定时信号，并检测重新定时信号的锁定性能，然后输出锁定性能指标;以及伺服控制用于接收RF信号和锁定性能指标，从而产生伺服控制信号。当锁定性能指标未达到阈值时，伺服控制环路加载其他控制参数，以提高光存储设备的读取性能。

2. 发明申请

US20110018630A1 Automatic gain control loop with hysteresis switching 有权
标题翻译：具有迟滞切换的自动增益控制回路
公开(公告)号：US20110018630A1
公开(公告)日：2011-01-27
申请号：US12805127
申请日：2010-07-14
申请人： Ching-Wen Ma
发明人： Ching-Wen Ma
IPC分类号： H03G3/20
CPC分类号： H03G3/3068
摘要： An automatic gain control system with hysteresis switching includes an error calculator for calculating the difference between a first estimation signal and a take over point (TOP) value to produce an error signal. A hysteresis comparator compares the first estimation signal and the TOP value to produce a control signal. A first gain control loop generates a first gain control signal based on the control signal to control a gain of a first variable gain amplifier. A second gain control loop generates a second gain control signal based on the control signal to control a gain of a second variable gain amplifier. As the first estimation signal leaves a hysteresis region of the hysteresis comparator, the first gain control signal is monotonically decreasing and the first gain control signal is monotonically increasing. As a result, the total gain is stable.
摘要翻译：具有滞后切换的自动增益控制系统包括用于计算第一估计信号和接收点（TOP）值之间的差的误差计算器，以产生误差信号。滞后比较器比较第一估计信号和TOP值以产生控制信号。第一增益控制环路基于控制信号产生第一增益控制信号，以控制第一可变增益放大器的增益。第二增益控制环路基于控制信号产生第二增益控制信号，以控制第二可变增益放大器的增益。当第一估计信号离开迟滞比较器的滞后区时，第一增益控制信号单调减小，第一增益控制信号单调递增。因此，总收益是稳定的。

3. 发明授权

US07805662B2 Error correction code decoder 有权
标题翻译：纠错码解码器
公开(公告)号：US07805662B2
公开(公告)日：2010-09-28
申请号：US11704292
申请日：2007-02-09
申请人： Ching-Wen Ma , Kuo-Ming Wang , Jia-Ping Chen
发明人： Ching-Wen Ma , Kuo-Ming Wang , Jia-Ping Chen
IPC分类号： H03M13/00
CPC分类号： H03M13/1555 , G11B20/1833 , H03M13/1515 , H03M13/152 , H03M13/154 , H03M13/1545 , H03M13/29 , H03M13/2909
摘要： An ECC decoder for correcting a coded signal received, which includes a syndrome calculation and errata evaluation device to receive a code word of the coded signal for performing a syndrome calculation to thereby output a syndrome polynomial, and to receive an erasure and errata evaluator polynomial and an errata position for performing an errata evaluation to thereby output an errata and erasure value and correct the coded signal; a key equation solving device to receive the syndrome for generating an erasure and errata locator polynomial and the erasure and errata evaluator polynomial; and an errata position search device to receive the erasure and errata locator polynomial for searching and outputting the errata position. Evaluating the errata and erasure value and calculating the syndrome are performed in pipeline, thereby sharing the hardware and relatively reducing the hardware cost.
摘要翻译：一种用于校正接收到的编码信号的ECC解码器，其包括校正子计算和勘误评估装置，用于接收用于执行校正子计算的编码信号的码字，从而输出校正子多项式，并且接收擦除和勘误评估器多项式，用于进行勘误评估的错误位置，从而输出勘误和擦除值并校正编码信号; 接收用于产生擦除和勘误定位多项式的校正子的关键方程求解装置和擦除和勘误评估器多项式; 以及勘误位置搜索装置，用于接收用于搜索和输出勘误位置的擦除和勘误定位多项式。评估勘误和擦除值并计算综合征是在流水线中进行的，从而共享硬件并相对降低硬件成本。

4. 发明申请

US20080310273A1 CIRCUIT FOR GENERATING TRACKING ERROR SIGNAL 有权
标题翻译：用于产生跟踪错误信号的电路
公开(公告)号：US20080310273A1
公开(公告)日：2008-12-18
申请号：US12138948
申请日：2008-06-13
申请人： Ching-Wen MA , Yung-Chi YANG
发明人： Ching-Wen MA , Yung-Chi YANG
IPC分类号： G11B5/58
CPC分类号： G11B5/59616
摘要： A circuit for generating a tracking error signal is provided. The circuit includes a digitized circuit, a short signal removing circuit and phase comparator. The digitized circuit receives first and second pick-up signals outputted from a pick-up head, and respectively compares the first and the second pick-up signals with a reference signal to obtain a first digital signal and a second digital signal. The short signal removing circuit is used for removing pulses in the first and the second digital signals, wherein the pulse width of the removed pulses are shorter than a preset time, and the first and second digital without the removed pulses are respectively served as a first determining signal and a second determining signal. The phase comparator receives the first determining signal and the second determining signal for outputting the tracking error signal according to a phase difference between the first and the second determining signals.
摘要翻译：提供了一种用于产生跟踪误差信号的电路。该电路包括数字化电路，短信号去除电路和相位比较器。数字化电路接收从拾取头输出的第一和第二拾取信号，并分别将第一和第二拾取信号与参考信号进行比较，以获得第一数字信号和第二数字信号。短信号去除电路用于去除第一和第二数字信号中的脉冲，其中去除的脉冲的脉冲宽度比预设时间短，并且没有去除脉冲的第一和第二数字分别被用作第一和第二数字信号确定信号和第二确定信号。相位比较器接收第一确定信号和第二确定信号，用于根据第一和第二确定信号之间的相位差输出跟踪误差信号。

5. 发明授权

US08254221B2 Circuit for generating tracking error signal 有权
标题翻译：用于产生跟踪误差信号的电路
公开(公告)号：US08254221B2
公开(公告)日：2012-08-28
申请号：US13356741
申请日：2012-01-24
申请人： Ching-Wen Ma , Yung-Chi Yang
发明人： Ching-Wen Ma , Yung-Chi Yang
IPC分类号： G11B7/00
CPC分类号： G11B5/59616
摘要： A circuit for generating a tracking error signal is provided. The circuit includes a digitizing circuit, a short signal removing circuit and phase comparator. The digitizing circuit receives first and second pick-up signals outputted from a pick-up head, and respectively compares the first and the second pick-up signals with a reference signal to obtain a first digital signal and a second digital signal. The short signal removing circuit is used for removing pulses in the first and the second digital signals, wherein the pulse width of the removed pulses are shorter than a preset time, and the first and second digital without the removed pulses are respectively served as a first determining signal and a second determining signal. The phase comparator receives the first determining signal and the second determining signal for outputting the tracking error signal according to a phase difference between the first and the second determining signals.
摘要翻译：提供了一种用于产生跟踪误差信号的电路。该电路包括数字化电路，短信号去除电路和相位比较器。数字化电路接收从拾取头输出的第一和第二拾取信号，并分别将第一和第二拾取信号与参考信号进行比较，以获得第一数字信号和第二数字信号。短信号去除电路用于去除第一和第二数字信号中的脉冲，其中去除的脉冲的脉冲宽度比预设时间短，并且没有去除脉冲的第一和第二数字分别被用作第一和第二数字信号确定信号和第二确定信号。相位比较器接收第一确定信号和第二确定信号，用于根据第一和第二确定信号之间的相位差输出跟踪误差信号。

6. 发明申请

US20080115018A1 Control system for an optical storage device 有权
标题翻译：光存储设备的控制系统
公开(公告)号：US20080115018A1
公开(公告)日：2008-05-15
申请号：US11979897
申请日：2007-11-09
申请人： Ching-Wen Ma , Zheng-Xiong Chen , Shih-Hsien Liu
发明人： Ching-Wen Ma , Zheng-Xiong Chen , Shih-Hsien Liu
IPC分类号： G11B27/36 , G06F11/00
CPC分类号： G11B20/18 , G11B20/10037 , G11B2020/1281 , G11B2020/1836
摘要： A control system determines read performance of an optical storage device according to lock performance of a re-timing signal. The control system includes a filtering and re-timing unit for receiving a radio frequency (RF) signal and outputting the re-timing signal and an un-corrected output signal, an error correction unit for receiving the un-corrected output signal and correcting an error bit according to a Reed-Solomon algorithm to generate a corrected output signal, a lock performance detector for receiving the re-timing signal and detecting the lock performance of the re-timing signal and then outputting a lock performance index, and a servo control loop for receiving the RF signal and the lock performance index and thus generating a servo control signal. When the lock performance index does not reach a threshold value, the servo control loop loads other control parameters to improve the read performance of the optical storage device.
摘要翻译：控制系统根据重新定时信号的锁定性能确定光学存储设备的读取性能。控制系统包括滤波和重新定时单元，用于接收射频（RF）信号并输出重新定时信号和未校正的输出信号;纠错单元，用于接收未校正的输出信号并校正一个根据Reed-Solomon算法生成校正输出信号的错误位;锁定性能检测器，用于接收重新定时信号，并检测重新定时信号的锁定性能，然后输出锁定性能指标;以及伺服控制用于接收RF信号和锁定性能指标，从而产生伺服控制信号。当锁定性能指标未达到阈值时，伺服控制环路加载其他控制参数，以提高光存储设备的读取性能。

7. 发明授权

US06801514B2 Non-SDMA system with an SDMA method 失效
标题翻译：非SDMA系统采用SDMA方法
公开(公告)号：US06801514B2
公开(公告)日：2004-10-05
申请号：US09777017
申请日：2001-02-06
申请人： Ching-Wen Ma
发明人： Ching-Wen Ma
IPC分类号： H04H100
CPC分类号： H04W16/28 , H04B7/0408 , H04W4/02 , H04W40/02 , H04W74/00 , H04W76/10 , H04W88/08 , H04W88/12
摘要： A communications system providing SDMA communication channels in a non-SDMA (non-spatial division multiple access) system and used in a specific area to establish wireless communications with mobile stations in the area comprises a smart antenna to establish wireless communications with the mobile stations, a base station controller managing transmissions and receiving information between every mobile station and an outgoing communications network, a plurality of base transceiver stations electrically connected with the base station controller, each of them establishing the wireless communications between the mobile stations and the base station controller, and a spatial spectrum management system connected between the smart antenna and the base transceiver stations. The spatial spectrum management system uses the spatial spectrum from the smart antenna and chooses a set of communication channels from a plurality of communication channels according to the position of every mobile station to establish the wireless communications with mobile stations in the communication area.
摘要翻译：在非SDMA（非空分多址）系统中提供SDMA通信信道并在特定区域中使用以与该区域中的移动站建立无线通信的通信系统包括：智能天线，用于建立与移动台的无线通信，管理每个移动站和出站通信网络之间的传输和接收信息的基站控制器，与基站控制器电连接的多个基站收发台，每个基站收发信台在移动台和基站控制器之间建立无线通信，以及连接在智能天线和基站收发台之间的空间频谱管理系统。空间频谱管理系统使用来自智能天线的空间频谱，并根据每个移动台的位置从多个通信信道中选择一组通信信道，以建立与通信区域中的移动站的无线通信。

8. 发明授权

US08134895B2 Circuit for generating tracking error signal 有权
标题翻译：用于产生跟踪误差信号的电路
公开(公告)号：US08134895B2
公开(公告)日：2012-03-13
申请号：US12138948
申请日：2008-06-13
申请人： Ching-Wen Ma , Yung-Chi Yang
发明人： Ching-Wen Ma , Yung-Chi Yang
IPC分类号： G11B7/00
CPC分类号： G11B5/59616
摘要： A circuit for generating a tracking error signal is provided. The circuit includes a digitized circuit, a short signal removing circuit and phase comparator. The digitized circuit receives first and second pick-up signals outputted from a pick-up head, and respectively compares the first and the second pick-up signals with a reference signal to obtain a first digital signal and a second digital signal. The short signal removing circuit is used for removing pulses in the first and the second digital signals, wherein the pulse width of the removed pulses are shorter than a preset time, and the first and second digital without the removed pulses are respectively served as a first determining signal and a second determining signal. The phase comparator receives the first determining signal and the second determining signal for outputting the tracking error signal according to a phase difference between the first and the second determining signals.
摘要翻译：提供了一种用于产生跟踪误差信号的电路。该电路包括数字化电路，短信号去除电路和相位比较器。数字化电路接收从拾取头输出的第一和第二拾取信号，并分别将第一和第二拾取信号与参考信号进行比较，以获得第一数字信号和第二数字信号。短信号去除电路用于去除第一和第二数字信号中的脉冲，其中去除的脉冲的脉冲宽度比预设时间短，并且没有去除脉冲的第一和第二数字分别被用作第一和第二数字信号确定信号和第二确定信号。相位比较器接收第一确定信号和第二确定信号，用于根据第一和第二确定信号之间的相位差输出跟踪误差信号。

9. 发明授权

US08112052B2 Automatic gain control loop with hysteresis switching 有权
标题翻译：具有迟滞切换的自动增益控制回路
公开(公告)号：US08112052B2
公开(公告)日：2012-02-07
申请号：US12805127
申请日：2010-07-14
申请人： Ching-Wen Ma
发明人： Ching-Wen Ma
IPC分类号： H04B1/06
CPC分类号： H03G3/3068
摘要： An automatic gain control system with hysteresis switching includes an error calculator for calculating the difference between a first estimation signal and a take over point (TOP) value to produce an error signal. A hysteresis comparator compares the first estimation signal and the TOP value to produce a control signal. A first gain control loop generates a first gain control signal based on the control signal to control a gain of a first variable gain amplifier. A second gain control loop generates a second gain control signal based on the control signal to control a gain of a second variable gain amplifier. As the first estimation signal leaves a hysteresis region of the hysteresis comparator, the first gain control signal is monotonically decreasing and the first gain control signal is monotonically increasing. As a result, the total gain is stable.
摘要翻译：具有滞后切换的自动增益控制系统包括用于计算第一估计信号和接收点（TOP）值之间的差的误差计算器，以产生误差信号。滞后比较器比较第一估计信号和TOP值以产生控制信号。第一增益控制环路基于控制信号产生第一增益控制信号，以控制第一可变增益放大器的增益。第二增益控制环路基于控制信号产生第二增益控制信号，以控制第二可变增益放大器的增益。当第一估计信号离开迟滞比较器的滞后区时，第一增益控制信号单调减小，第一增益控制信号单调递增。因此，总收益是稳定的。

10. 发明申请

US20070204207A1 Error correction code decoder 有权
标题翻译：纠错码解码器
公开(公告)号：US20070204207A1
公开(公告)日：2007-08-30
申请号：US11704292
申请日：2007-02-09
申请人： Ching-Wen Ma , Kuo-Ming Wang , Jia-Ping Chen
发明人： Ching-Wen Ma , Kuo-Ming Wang , Jia-Ping Chen
IPC分类号： H03M13/00
CPC分类号： H03M13/1555 , G11B20/1833 , H03M13/1515 , H03M13/152 , H03M13/154 , H03M13/1545 , H03M13/29 , H03M13/2909
摘要： An ECC decoder for correcting a coded signal received, which includes a syndrome calculation and errata evaluation device to receive a code word of the coded signal for performing a syndrome calculation to thereby output a syndrome polynomial, and to receive an erasure and errata evaluator polynomial and an errata position for performing an errata evaluation to thereby output an errata and erasure value and correct the coded signal; a key equation solving device to receive the syndrome for generating an erasure and errata locator polynomial and the erasure and errata evaluator polynomial; and an errata position search device to receive the erasure and errata locator polynomial for searching and outputting the errata position. Evaluating the errata and erasure value and calculating the syndrome are performed in pipeline, thereby sharing the hardware and relatively reducing the hardware cost.
摘要翻译：一种用于校正接收到的编码信号的ECC解码器，其包括校正子计算和勘误评估装置，用于接收用于执行校正子计算的编码信号的码字，从而输出校正子多项式，并且接收擦除和勘误评估器多项式，用于进行勘误评估的错误位置，从而输出勘误和擦除值并校正编码信号; 接收用于产生擦除和勘误定位多项式的校正子的关键方程求解装置和擦除和勘误评估器多项式; 以及勘误位置搜索装置，用于接收用于搜索和输出勘误位置的擦除和勘误定位多项式。评估勘误和擦除值并计算综合征是在流水线中进行的，从而共享硬件并相对降低硬件成本。

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