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1. 发明授权

US5572154A Circuit and method of sampling an analog signal 失效
标题翻译：采样模拟信号的电路和方法
公开(公告)号：US5572154A
公开(公告)日：1996-11-05
申请号：US498716
申请日：1995-07-03
申请人： Patrick L. Rakers , Christopher P. Lash , Steven F. Gillig
发明人： Patrick L. Rakers , Christopher P. Lash , Steven F. Gillig
IPC分类号： G11C27/02 , H03K17/74 , H03K17/76
CPC分类号： G11C27/026 , H03K17/74
摘要： A sample circuit (10) maintains linear operation over frequency. A switchable diode bridge (12) passes the analog input signal when enabled to one terminal of a sample storage capacitor (14). The second terminal of the capacitor is coupled through a closed FET switch (16) to a reference node (18). Once the analog input signal is stored across the capacitor, the FET switch opens before the diode bridge disables. When the second terminal of the capacitor floats and prevents any further charge from altering the sample voltage across the capacitor. When the diode bridge is disabled, the sample voltage across the capacitor does not change. The sample voltage may be amplified and digitized for further processing in the cellular system.
摘要翻译：采样电路（10）在频率上保持线性运算。当使能到样品存储电容器（14）的一个端子时，可切换二极管电桥（12）将模拟输入信号传递。电容器的第二端子通过闭合FET开关（16）耦合到参考节点（18）。一旦模拟输入信号存储在电容器两端，FET开关就会在二极管桥断开之前打开。当电容器的第二端子漂移并且防止任何进一步的电荷改变电容器两端的采样电压时。当二极管桥被禁用时，电容器两端的采样电压不会改变。样品电压可以被放大并数字化以在蜂窝系统中进一步处理。

2. 发明授权

US07319419B1 Switched capacitor circuit with current source offset DAC and method 有权
标题翻译：具有电流源偏移DAC和方法的开关电容电路
公开(公告)号：US07319419B1
公开(公告)日：2008-01-15
申请号：US11512389
申请日：2006-08-30
申请人： Christopher P. Lash , Ronald F. Cormier, Jr. , Frederick J. Highton
发明人： Christopher P. Lash , Ronald F. Cormier, Jr. , Frederick J. Highton
IPC分类号： H03M1/06
CPC分类号： H03M1/0607 , H03M1/122 , H03M1/745
摘要： A switched-capacitor sample/hold circuit includes a switched-capacitor input sampling stage and a sample/hold amplifier circuit including an operational amplifier having first and second inputs coupled to first and second input sampling capacitors, respectively, and first and second feedback capacitors coupled between the first and second inputs and first and second outputs of the operational amplifier. A continuous-time offset DAC receives a digital input signal representative of an offset voltage produces first and second offset correction voltages. The first and second offset correction voltages are coupled to the switched-capacitor sample/hold circuit to adjust the amount of pre-charging of the first and second feedback capacitors, respectively, in accordance with the value of the digital input signal to compensate an offset component associated with the and second input voltages. The output of the switched-capacitor sample/hold circuit can be connected to an ADC.
摘要翻译：开关电容器采样/保持电路包括开关电容器输入采样级和采样/保持放大器电路，其包括运算放大器，该运算放大器分别具有耦合到第一和第二输入采样电容器的第一和第二输入端，并且耦合第一和第二反馈电容器在第一和第二输入与运算放大器的第一和第二输出之间。连续时间偏移DAC接收代表偏移电压的数字输入信号产生第一和第二偏移校正电压。第一和第二偏移校正电压被耦合到开关电容器采样/保持电路，以分别根据数字输入信号的值来调整第一和第二反馈电容器的预充电量，以补偿偏移与第二输入电压相关的分量。开关电容采样/保持电路的输出可以连接到ADC。

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