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    • 1. 发明授权
    • Circuit and method of sampling an analog signal
    • 采样模拟信号的电路和方法
    • US5572154A
    • 1996-11-05
    • US498716
    • 1995-07-03
    • Patrick L. RakersChristopher P. LashSteven F. Gillig
    • Patrick L. RakersChristopher P. LashSteven F. Gillig
    • G11C27/02H03K17/74H03K17/76
    • G11C27/026H03K17/74
    • A sample circuit (10) maintains linear operation over frequency. A switchable diode bridge (12) passes the analog input signal when enabled to one terminal of a sample storage capacitor (14). The second terminal of the capacitor is coupled through a closed FET switch (16) to a reference node (18). Once the analog input signal is stored across the capacitor, the FET switch opens before the diode bridge disables. When the second terminal of the capacitor floats and prevents any further charge from altering the sample voltage across the capacitor. When the diode bridge is disabled, the sample voltage across the capacitor does not change. The sample voltage may be amplified and digitized for further processing in the cellular system.
    • 采样电路(10)在频率上保持线性运算。 当使能到样品存储电容器(14)的一个端子时,可切换二极管电桥(12)将模拟输入信号传递。 电容器的第二端子通过闭合FET开关(16)耦合到参考节点(18)。 一旦模拟输入信号存储在电容器两端,FET开关就会在二极管桥断开之前打开。 当电容器的第二端子漂移并且防止任何进一步的电荷改变电容器两端的采样电压时。 当二极管桥被禁用时,电容器两端的采样电压不会改变。 样品电压可以被放大并数字化以在蜂窝系统中进一步处理。
    • 5. 发明授权
    • Portable battery charger
    • 便携式电池充电器
    • US4727306A
    • 1988-02-23
    • US878896
    • 1986-06-26
    • Jeffrey P. MisakSteven F. GilligTerrance J. Goedken
    • Jeffrey P. MisakSteven F. GilligTerrance J. Goedken
    • G01R31/36H02J7/00H02J7/04
    • G01R19/16542H02J7/008H02J7/0091G01R31/3675Y10S320/12
    • A unique automatic battery charger (100) is described that recharges a battery (202) including a thermistor (206) for sensing the battery temperature. The charger (100) produces both a slow-charge current and a fast-charge current. Upon detecting the presence of the battery (202), the unique charger (100) turns on a fast-charge current produced by a switchable current source (110-113). The fast-charge current is subsequently turned off when the battery (202) is fully charged as indicated by the status of monitored temperature and voltage conditions. Comparators (180-184) are utilized to monitor these voltage and temperature conditions. According to a novel feature of the present invention, the monitored temperature thresholds are changed in response to the supply voltage. The automatic battery charging apparatus of the present invention may be advantageously utilized in a variety of applications for rapidly and safely charging batteries used in battery-operated electrical apparatus.
    • 描述了一种独特的自动电池充电器(100),其对包括用于感测电池温度的热敏电阻(206)的电池(202)进行再充电。 充电器(100)产生慢充电电流和快充电流。 在检测到电池(202)的存在时,唯一充电器(100)接通由可切换电流源(110-113)产生的快速充电电流。 当电池(202)充满电时,快速充电电流随后被关闭,如所监视的温度和电压条件的状态所示。 比较器(180-184)用于监测这些电压和温度条件。 根据本发明的新颖特征,监视的温度阈值响应于电源电压而改变。 本发明的自动电池充电装置可以有利地用于各种应用中,用于快速和安全地对在电池供电的电气设备中使用的电池进行充电。
    • 6. 发明授权
    • Method and apparatus for allocating spectrum
    • 分配频谱的方法和装置
    • US08472390B2
    • 2013-06-25
    • US12710490
    • 2010-02-23
    • S. David SilkSteven F. Gillig
    • S. David SilkSteven F. Gillig
    • H04W24/00
    • H04W72/048
    • A method and apparatus for allocating spectrum within a wireless communication system is provided herein. During operation, a first base station will determine a location of a UE wishing to transmit. A database will be accessed containing wireless coverage area information for base stations with overlapping coverage with the first base station. Based on this information the first base station will determine if the UE is within an overlapping coverage area of multiple base stations. Spectrum will be assigned to the wireless equipment in a guard band, based at least in part on the determination that the UE is not within the overlapping coverage area.
    • 本文提供了一种用于在无线通信系统内分配频谱的方法和装置。 在操作期间,第一基站将确定希望发送的UE的位置。 将访问包含与第一基站重叠覆盖的基站的无线覆盖区域信息的数据库。 基于该信息,第一基站将确定UE是否在多个基站的重叠覆盖区域内。 至少部分地基于UE不在重叠覆盖区域内的确定,频谱将被分配给保护频带中的无线设备。
    • 8. 发明授权
    • Phase synchronization circuit and method therefor for a phase locked loop
    • 相位同步电路及其相位锁相环的方法
    • US5497126A
    • 1996-03-05
    • US149259
    • 1993-11-09
    • Jeannie H. KosiecSteven F. Gillig
    • Jeannie H. KosiecSteven F. Gillig
    • H03L3/00H03L7/10H03L7/18
    • H03L7/18H03L3/00H03L7/10
    • An improved phase synchronization circuit (301) and method therefor for a phase locked loop (300). Each of a divided reference frequency signal (206) and a feedback signal (209) is held in a predetermined state. The divided reference frequency signal (206) is enabled responsive to the phase of a reference frequency signal (115). A phase relationship between the reference frequency signal (115) and an output frequency signal (116 or 117) is determined. The feedback signal (209) is enabled responsive to enabling the divided reference frequency signal (206) and the determined phase relationship. The present invention advantageously provides a rapid and accurate phase synchronization for the PLL (300) with minimum additional hardware and without introducing phase error into the PLL (300).
    • 一种用于锁相环(300)的改进的相位同步电路(301)及其方法。 划分的参考频率信号(206)和反馈信号(209)中的每一个被保持在预定状态。 分频参考频率信号(206)能够响应于参考频率信号(115)的相位被使能。 确定参考频率信号(115)和输出频率信号(116或117)之间的相位关系。 响应于启用分割的参考频率信号(206)和所确定的相位关系,反馈信号(209)被启用。 本发明有利地提供具有最小附加硬件的PLL(300)的快速和准确的相位同步,并且不将相位误差引入到PLL(300)中。
    • 9. 发明授权
    • Hybrid modulation apparatus
    • 混合调制装置
    • US5020076A
    • 1991-05-28
    • US526156
    • 1990-05-21
    • Stephen V. CahillSteven F. GilligThomas J. Walczak
    • Stephen V. CahillSteven F. GilligThomas J. Walczak
    • H04B14/00H04L27/20
    • H04B14/006H04L27/2075
    • A .pi./4-shift DQPSK modulator modulates a digitized voice signal and other information. An FM modulator modulates the analog voice signal and other information. The FM modulator is coupled to the quadrature mixers (109 and 110) of the .pi./4-shift DQPSK modulator. When an FM modulated signal is required, the mixers (109 and 110) are biased (114) to allow carrier feedthrough by applying a fixed, non-zero DC signal to one or both mixers (109 and 110). The carrier is then FM modulated using conventional methods such as voltage-modulation of a phase locked loop (PPL) (113). When .pi./4-shift DQPSK is to be generated, the conventional baseband I and Q vector-length signals (101 and 102) are applied to the mixers (109 and 110), and the carrier is left unmodulated by switching (115) out the input signal to the PLL (113). The PPL (113) will then generate only the carrier frequency to be mixed with the I and Q vector-length signals (101 and 102).
    • pi / 4位DQPSK调制器调制数字化语音信号和其他信息。 FM调制器调制模拟语音信号和其他信息。 FM调制器耦合到pi / 4位DQPSK调制器的正交混频器(109和110)。 当需要FM调制信号时,通过向一个或两个混频器(109和110)施加固定的非零DC信号,混频器(109和110)被偏置(114)以允许载波馈通。 然后使用诸如锁相环(PPL)(113)的电压调制的常规方法对载波进行FM调制。 当要生成pi / 4位DQPSK时,传统的基带I和Q向量长度信号(101和102)被施加到混频器(109和110),并且通过切换(115)输出使载波不被调制 输入到PLL(113)的信号。 然后,PPL(113)将仅生成要与I和Q矢量长度信号(101和102)混合的载波频率。
    • 10. 发明授权
    • Linearized three state phase detector
    • 线性三态相位检测器
    • US4970475A
    • 1990-11-13
    • US500626
    • 1990-03-28
    • Steven F. Gillig
    • Steven F. Gillig
    • H03D13/00H03L7/089
    • H03D13/004H03L7/0891
    • A linearized three state phase detector (300) that exhibits a linear transfer function of phase to current or charge at and around the zero phase error region. The inputs to the D flip-flops (301 and 302) are tied to a logic high. the first flip-flop (301) is clocked with reference signal F.sub.r while the other flip-flop (302) is clocked with a variable frequency feedback signal F.sub.v. F.sub.v is typically from a voltage controlled oscillator in a phase locked loop. The outputs of the flip-flops are ANDed together with the result of this operation going through a delay element (304) before reseting one of the flip-flops (301). The other flip-flop (302) is reset by the output of the AND gate (304) without the delay element (304). Each flip-flop output enables a charge pump--one negative polarity (306) and one positive polarity (305). The present invention will maintain a lock condition in a phase locked loop by extending the DOWN pulse enabling the negative polarity charge pump (306) to the same width as the UP pulse that enables the positive pump (305). This will create a net zero charge from the present invention.