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    • 3. 发明授权
    • Error correction and concurrent verification of a product code
    • 纠错和产品代码的并发验证
    • US6048090A
    • 2000-04-11
    • US842146
    • 1997-04-23
    • Christopher P. Zook
    • Christopher P. Zook
    • G11B20/18G06F11/00H03M13/00
    • H03M13/2924G11B20/1833H03M13/293H03M13/3738H03M13/3746G11B2020/184G11B2020/1843G11B2220/213G11B2220/2545H03M13/09
    • A multi-layered error detection and correction (EDAC) system is disclosed for processing an error correction code (ECC) typically employed in optical disk storage devices. A first layer of the EDAC system includes a primary ECC, such as a multiple burst Reed-Solomon code, and a second layer incudes a secondary ECC, such as a CRC code, for use in verifying the validity of the corrections made using the primary ECC. The primary ECC is multi-dimensional and, in the embodiment disclosed herein, it is a two-dimensional P/Q product code typically employed in a CD-ROM storage device. The secondary ECC operates in unison with the primary ECC. As the EDAC system processes and corrects the data using the primary ECC, the EDAC system also simultaneously updates the secondary ECC. In this manner, when the EDAC system is finished processing the data using the primary ECC, the validation syndrome generated by the secondary ECC is available immediately for checking the validity of the corrections. Consequently, the additional pass otherwise required when no uncorrectable errors are encountered after completing a P or Q pass is obviated. To significantly increase the processing of the EDAC system, error-free code words are skipped during the iterative passes of the multi-dimensional primary ECC. When a code word is skipped, the validation syndrome generated using the secondary ECC is adjusted to account for the skipped data bytes.
    • 公开了一种用于处理通常用于光盘存储设备中的纠错码(ECC)的多层错误检测和校正(EDAC)系统。 EDAC系统的第一层包括主ECC,例如多脉冲里德 - 所罗门码,第二层包括诸如CRC码的次要ECC,以用于验证使用主要信号进行的校正的有效性 ECC。 主ECC是多维的,并且在本文公开的实施例中,它是通常用于CD-ROM存储设备中的二维P / Q产品代码。 辅助ECC与主ECC协同工作。 由于EDAC系统使用主ECC处理和纠正数据,所以EDAC系统还同时更新辅助ECC。 以这种方式,当EDAC系统完成使用主ECC处理数据时,由辅助ECC产生的验证校验可以立即可用于检查校正的有效性。 因此,在完成P或Q通过之后没有遇到不可纠正的错误时,否则需要附加通行。 为了显着增加EDAC系统的处理,在多维主ECC的迭代遍期间跳过无错码字。 当跳过码字时,使用次级ECC产生的验证校验被调整以考虑跳过的数据字节。
    • 4. 发明授权
    • ECC system employing a data buffer for storing codeword data and a
syndrome buffer for storing error syndromes
    • ECC系统采用用于存储码字数据的数据缓冲器和用于存储错误综合征的校正子缓冲器
    • US5996105A
    • 1999-11-30
    • US970730
    • 1997-11-14
    • Christopher P. Zook
    • Christopher P. Zook
    • G06F11/10G11B20/18H03M13/15H03M13/29
    • H03M13/151G11B20/1833H03M13/29G11B20/18
    • In an optical disk storage device capable of reading compact disks (CDs) and digital video disks (DVDs), the latency of an error correction system is significantly reduced by sharing a syndrome buffer between CD and DVD modes of operation. In CD mode, user data read from the disk is stored in the syndrome buffer and corrected using C1/C2 redundancy of a Cross-Interleaved Reed-Solomon Code (CIRC). In DVD mode, user data read from the disk is stored in a data buffer and the syndrome buffer stores: intermediate values for generating the ECC syndromes for use in correcting the user data, and data CRC and error CRC syndromes for use in verifying the validity and completeness of the corrections. Two aspects of the present invention which significantly increase throughput are (1) the ECC syndromes are generated concurrently for the row (Q) and column (P) codewords of the CD and DVD product codes, and (2) the CRC validation syndrome is generated concurrent with correcting the product code. In this manner, the ECC syndromes for the entire product code can be generated during the first horizontal pass over the row codewords, thereby avoiding the latency in generating the ECC syndromes for the column codewords during the subsequent vertical pass. In addition, the CRC validation syndrome is available immediately after correcting a data sector--it is not necessary to read the entire data sector from the data buffer after correction in order to generate the CRC validation syndrome, as in the prior art.
    • 在能够读取光盘(CD)和数字视频盘(DVD)的光盘存储装置中,通过在CD和DVD操作模式之间共享综合器缓冲器,可以显着地减少误差校正系统的等待时间。 在CD模式下,从磁盘读取的用户数据存储在纠错缓冲区中,并使用交叉交错里德 - 所罗门码(CIRC)的C1 / C2冗余校正。 在DVD模式中,从磁盘读取的用户数据被存储在数据缓冲器中,并且校正子缓冲器存储用于生成用于校正用户数据的ECC校正子的中间值,以及用于验证有效性的数据CRC和错误CRC校验子 和修正的完整性。 显着提高吞吐量的本发明的两个方面是(1)CD和DVD产品代码的行(Q)和列(P)码字同时产生ECC综合征,以及(2)生成CRC校验综合征 同时纠正产品代码。 以这种方式,可以在行代码字的第一次水平传递期间产生用于整个产品代码的ECC校验子,从而避免在随后的垂直传递期间为列码字生成ECC校验子的等待时间。 此外,在校正数据扇区之后立即可用CRC校验综合征 - 如在现有技术中那样,不需要在校正之后从数据缓冲器读取整个数据扇区以产生CRC校验综合征。
    • 6. 发明授权
    • Fault tolerant sync mark detector for comparing a sign and magnitude of
a detected sequence to a target sync mark in sampled amplitude magnetic
recording
    • 容错同步标记检测器,用于在采样振幅磁记录中将检测到的序列的符号和幅度与目标同步标记进行比较
    • US5793548A
    • 1998-08-11
    • US533797
    • 1995-09-26
    • Christopher P. Zook
    • Christopher P. Zook
    • G11B5/012G11B20/10G11B20/14G11B27/30G11B5/09
    • G11B20/10055G11B20/10009G11B20/10037G11B20/1403G11B27/30G11B27/3027G11B5/012G11B2020/1476
    • A sampled amplitude read channel reads data from a magnetic medium by detecting digital data from a sequence of discrete time sample values generated by sampling pulses in an analog read signal from a read head positioned over the magnetic medium. The digital data comprises a preamble field followed by a sync mark followed by a data field. Timing recovery in the read channel synchronizes to a phase and frequency of the preamble field and a sync detector detects the sync mark in order to frame operation of an RLL decoder for decoding the detected data field. To decrease the probability of early misdetection, the sync mark is chosen to have minimum correlation with shifted versions of the sync mark concatenated with the preamble field. To further increase the fault tolerance, the sync mark detector is enabled by timing recovery relative to the end of the preamble field. A timing recovery state machine generates expected sample values used to acquire the preamble field, and a current state of the state machine indicates when the preamble ends relative to a predetermined clock interval. As a result, the search for an appropriate sync mark need only look for minimum correlation during shifts at the predetermined clock interval, thereby increasing the fault tolerant characteristic of the sync mark. In one embodiment, both the sign and magnitude of the data are used in the correlation to further increase the fault tolerance.
    • 采样幅度读取通道通过从位于磁介质上的读取头的模拟读取信号中的采样脉冲产生的离散时间采样值序列检测数字数据,从磁性介质读取数据。 数字数据包括前同步码字段,随后是同步标记,后跟数据字段。 读通道中的定时恢复与前同步码字段的相位和频率同步,并且同步检测器检测同步标记,以便对RLL解码器进行帧操作,以对检测到的数据字段进行解码。 为了降低早期错误检测的可能性,选择同步标记与与前同步码字段连接的同步标记的移位版本具有最小相关性。 为了进一步增加容错能力,同步标记检测器通过相对于前同步码字段结束的定时恢复来启用。 定时恢复状态机产生用于获取前导字段的预期采样值,并且状态机的当前状态指示相对于预定时钟间隔何时前置码结束。 结果,搜索适当的同步标记仅需要在预定时钟间隔期间寻找在移位期间的最小相关性,从而增加同步标记的容错特性。 在一个实施例中,在相关中使用数据的符号和幅度,以进一步增加容错。
    • 7. 发明授权
    • Fault tolerant sync mark detector enabled relative to a frequency of an
acquisition preamble for sampled amplitude recording
    • 容错同步标记检测器相对于采样幅度记录的采集前导码的频率启用
    • US5729396A
    • 1998-03-17
    • US440268
    • 1995-05-12
    • Trent O. DudleyRichard T. BehrensChristopher P. Zook
    • Trent O. DudleyRichard T. BehrensChristopher P. Zook
    • G11B5/012G11B20/10G11B20/14G11B27/30G11B5/09
    • G11B20/10055G11B20/10009G11B20/10037G11B20/1403G11B27/30G11B27/3027G11B5/012G11B2020/1476
    • A sampled amplitude read channel reads data from a magnetic medium by detecting digital data from a sequence of discrete time sample values generated by sampling an analog read signal from a read head positioned over the magnetic medium. The digital data comprises a preamble field followed by a sync mark followed by a data field. Timing recovery in the read channel synchronizes to a phase and frequency of the preamble field and a sync detector detects the sync mark in order to frame operation of an RLL decoder for decoding the detected data field. To decrease the probability of early misdetection, the sync mark is chosen to have minimum correlation with shifted versions of the sync mark concatenated with the preamble field. To further increase the fault tolerance, the sync mark detector is enabled by timing recovery relative to the end of the preamble field. A state machine in timing recovery generates expected sample values used to acquire the preamble field, and a current state of the state machine indicates when the preamble ends relative to a predetermined clock interval. In this manner, the search for an appropriate sync mark need only look for minimum correlation during shifts at the predetermined clock interval, thereby increasing the fault tolerant characteristic of the sync mark.
    • 采样幅度读取通道从通过从位于磁性介质上的读取头采样模拟读取信号而产生的离散时间采样值的序列中检测数字数据,从磁性介质读取数据。 数字数据包括前同步码字段,随后是同步标记,后跟数据字段。 读通道中的定时恢复与前同步码字段的相位和频率同步,并且同步检测器检测同步标记,以便对RLL解码器进行帧操作,以对检测到的数据字段进行解码。 为了降低早期错误检测的可能性,选择同步标记与与前同步码字段连接的同步标记的移位版本具有最小相关性。 为了进一步增加容错能力,同步标记检测器通过相对于前同步码字段结束的定时恢复来启用。 定时恢复中的状态机产生用于获取前导字段的预期采样值,并且状态机的当前状态指示前导码相对于预定时钟间隔何时结束。 以这种方式,搜索适当的同步标记仅需要在预定时钟间隔期间寻找在移位期间的最小相关性,从而增加同步标记的容错特性。
    • 8. 发明授权
    • On-the-fly error correction using thermal asperity erasure pointers from
a sampled amplitude read channel in a magnetic disk drive
    • 使用来自磁盘驱动器中的取样幅度读取通道的热不均匀擦除指针进行即时纠错
    • US5701314A
    • 1997-12-23
    • US576742
    • 1995-12-21
    • Alan J. ArmstrongChristopher P. Zook
    • Alan J. ArmstrongChristopher P. Zook
    • G11B5/09G11B5/00G11B5/012G11B5/02G11B19/04G11B20/10G11B20/18H03M13/00H03M13/15
    • G11B20/10055G11B19/04G11B20/10009G11B20/10037G11B20/1833G11B5/012G11B5/6076H03M13/151G11B2005/0016
    • In a magnetic disk drive storage system comprising a sampled amplitude read channel and an on-the-fly error correction coding (ECC) system, a thermal asperity compensation technique wherein: a thermal asperity (TA) detection circuit detects a saturation condition in the sample values of the analog read signal which indicates the presence of a TA; a pole of an AC coupling capacitor is elevated; timing recovery, gain control, and DC offset loops in the read channel are held constant; TA erasure pointers are generated corresponding to the duration of the TA transient; and an on-the-fly error detection and correction (EDAC) circuit processes the TA erasure pointers to correct errors in the detected digital data caused by the TA. Using TA erasure pointers to compensate for the effect of thermal asperities minimizes the cost, complexity, and redundancy of the ECC. Further, soft errors in the prior art method of adjusting the headroom of the read channel ADC are avoided. Still further, the EDAC circuitry can process the erasure pointers on-the-fly and still correct a sufficient number of soft errors without having to perform any significant number of reread operations. In this manner, the disk drive storage system operates virtually uninterrupted in reading data from the disk and transferring it to a host computer.
    • 在包括采样振幅读取通道和动态误差校正编码(ECC)系统的磁盘驱动器存储系统中,热曲率补偿技术,其中:热粗糙度(TA)检测电路检测样本中的饱和状态 指示TA的存在的模拟读取信号的值; AC耦合电容的极点升高; 读通道中的定时恢复,增益控制和直流偏移环保持不变; 针对TA瞬变的持续时间产生TA擦除指针; 并且动态错误检测和校正(EDAC)电路处理TA擦除指针以校正由TA引起的检测到的数字数据中的错误。 使用TA擦除指针补偿热不均匀性的影响,可以最大限度地降低ECC的成本,复杂性和冗余性。 此外,避免了现有技术的调节读通道ADC的余量的方法中的软错误。 此外,EDAC电路可以即时处理擦除指针,并且仍然校正足够数量的软错误,而不必执行任何大量的重读操作。 以这种方式,磁盘驱动器存储系统在从盘读取数据并将其传送到主计算机时几乎不间断地操作。
    • 9. 发明授权
    • Cyclical redundancy check method and apparatus
    • 循环冗余检查方法和装置
    • US5671237A
    • 1997-09-23
    • US325717
    • 1994-10-18
    • Christopher P. Zook
    • Christopher P. Zook
    • H03M13/00G06F11/10G11B20/18H03M13/09H03M13/35H03M13/22
    • H03M13/091G06F11/10G06F11/1004G06F11/1068G11B20/1833H03M13/09H03M13/35
    • A one stage CRC generation system (400) and a two stage CRC generation system (600) feature a CRC generator/checker (700) which outputs a programmable number of CRC bytes. The CRC generation/checker (700) comprises a segmenting circuit (710) �for segmenting an input stream of user data into a plurality m of sub-streams!; a circuit (712) which forms a linear combination of the plurality m of sub-streams and operates upon the linear combination in order to generate CRC bytes; and, a checker circuit (714) for comparing the generated CRC bytes with previously generated CRC bytes. The two stage system (600) includes a first CRC generator/checker (601); a memory (602) which receives both the user data and K.sub.1 number of primary CRC bytes generated by first CRC generator/checker (601); and, a second CRC generator/checker (603) which uses the primary CRC bytes and K.sub.1 number of its own generated verification CRC bytes to check the user data after retrieval from memory (602) and prior to encoding. In addition, second CRC generator/checker (603) can optionally apply K.sub.2 -K.sub.1 number of its verification CRC bytes to encoder (604) for use as secondary CRC bytes. The number of CRC bytes K.sub.1 and K.sub.2 actually outputted by the respective CRC generator/checkers (601, 603) is programmable.
    • 一级CRC生成系统(400)和两级CRC生成系统(600)具有输出可编程数量的CRC字节的CRC生成器/检查器(700)。 CRC生成/检查器(700)包括分割电路(710)[用于将用户数据的输入流分割成多个子流]; 电路(712),其形成多个子流的线性组合并且在线性组合上操作以产生CRC字节; 以及用于将所生成的CRC字节与先前生成的CRC字节进行比较的校验电路(714)。 两级系统(600)包括第一CRC发生器/检验器(601); 接收由第一CRC生成器/检查器(601)生成的用户数据和K1个主CRC字节的存储器(602); 以及第二CRC生​​成器/检查器(603),其使用主CRC字节和其自身生成的验证CRC字节的K1数来在从存储器(602)检索并且在编码之前检查用户数据。 此外,第二CRC生​​成器/检查器(603)可以可选地将K2-K1个验证CRC字节应用于编码器(604)以用作次要CRC字节。 由各个CRC发生器/检查器(601,603)实际输出的CRC字节K1和K2的数量是可编程的。
    • 10. 发明授权
    • Filtering a read signal to attenuate secondary pulses caused by pole
tips of a thin film magnetic read head
    • 滤除读取信号以衰减由薄膜磁头读取头的极尖引起的次脉冲
    • US5623377A
    • 1997-04-22
    • US222666
    • 1994-04-04
    • Richard T. BehrensNeal GloverTrent O. DudleyAlan J. ArmstrongChristopher P. ZookWilliam G. Bliss
    • Richard T. BehrensNeal GloverTrent O. DudleyAlan J. ArmstrongChristopher P. ZookWilliam G. Bliss
    • G11B5/09G11B20/10H03H17/02H03H17/06H04B3/06G11B5/035
    • H03H17/06G11B20/10009G11B5/09H03H17/02
    • A filter for compensating discrete secondary pulse formations associated with a data stream of discrete main pulses produced from data read from magnetic media. The filter's impulse response comprises a center coefficient with side compensating coefficients for attenuating the secondary pulses when the input signal is convolved with the impulse response. The magnitude and delay of the compensation coefficients are programmable and are adaptively adjusted to optimize the impulse response for a given environment. In a traditional FIR embodiment, two delay lines are used to generate the two programmable delays between the center coefficient and side compensation coefficients. In the preferred embodiment, an IIR filter provides the two programmable delays using only one delay line thereby reducing the size and cost of the circuit. Also in the preferred embodiment, the data stream is interleaved into an even and odd data stream and processed in parallel by two filters in order to double the throughput. Further, the pre-cursor correcting portion of the filter can be disabled in order to avoid delaying the data stream while still canceling the post-cursor secondary pulses. The filter also comprises attenuation and adder means to match the coincident sample values in amplitude and add them to substantially eliminate the effect of the secondary pulses in the discrete data stream.
    • 用于补偿与从磁介质读取的数据产生的离散主脉冲的数据流相关联的离散次级脉冲形成的滤波器。 滤波器的脉冲响应包括具有侧补偿系数的中心系数,用于当输入信号与脉冲响应卷积时衰减次级脉冲。 补偿系数的幅度和延迟可编程,并进行自适应调整,以优化给定环境的脉冲响应。 在传统的FIR实施例中,使用两条延迟线来产生中心系数和侧面补偿系数之间的两个可编程延迟。 在优选实施例中,IIR滤波器仅使用一个延迟线提供两个可编程延迟,从而减小电路的尺寸和成本。 同样在优选实施例中,数据流被交织成偶数和奇数数据流,并且由两个滤波器并行处理,以使吞吐量翻倍。 此外,可以禁用滤波器的前光标校正部分,以避免在仍然取消后光标次级脉冲的同时延迟数据流。 滤波器还包括衰减和加法器装置,以使幅度上重合的采样值相匹配,并将它们相加,以基本上消除离散数据流中次级脉冲的影响。