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1. 发明授权

US08755624B2 Image registration device and method thereof 有权
标题翻译：图像配准装置及其方法
公开(公告)号：US08755624B2
公开(公告)日：2014-06-17
申请号：US13585726
申请日：2012-08-14
申请人： Jung Hee Suk , Sanghun Yoon , Chun-Gi Lyuh , Ik Jae Chun , Tae Moon Roh
发明人： Jung Hee Suk , Sanghun Yoon , Chun-Gi Lyuh , Ik Jae Chun , Tae Moon Roh
IPC分类号： G06K9/40
CPC分类号： G06T3/0068
摘要： Disclosed is an image registration device which includes an image input unit which receives an image; an image information generating unit which generates a homography matrix from the input image; and a warping unit which registers an image based on the homography matrix. The registration information generating unit comprises a distance information generator which generates distance information on subjects of the input image; a distance information modeler which approximates the generated distance information; an overlap information generator which generates overlap information from the approximated distance information; a matching pair determiner which determines a matching pair from the overlap information; and a homography matrix generator which generates a homography matrix from the matching pair.
摘要翻译：公开了一种图像注册装置，其包括接收图像的图像输入单元; 图像信息生成单元，其从输入图像生成单应性矩阵; 以及基于单应性矩阵来登记图像的翘曲单元。所述登记信息生成部包括距离信息生成部，其生成与所述输入图像对象相对应的距离信息; 距离信息建模器近似所生成的距离信息; 重叠信息生成器，其从所述近似距离信息生成重叠信息; 匹配对确定器，其从所述重叠信息确定匹配对; 以及从匹配对生成单应性矩阵的单应性矩阵生成器。

2. 发明授权

US08520893B2 Method and system for detecting object 有权
标题翻译：检测物体的方法和系统
公开(公告)号：US08520893B2
公开(公告)日：2013-08-27
申请号：US12949438
申请日：2010-11-18
申请人： Jung Hee Suk , Chun Gi Lyuh , Ik Jae Chun , Jeong Hwan Lee , Jae Chang Shim , Mi Soon Choi , Wook Jin Chung , Yeung Hak Lee , Tae Moon Roh
发明人： Jung Hee Suk , Chun Gi Lyuh , Ik Jae Chun , Jeong Hwan Lee , Jae Chang Shim , Mi Soon Choi , Wook Jin Chung , Yeung Hak Lee , Tae Moon Roh
IPC分类号： G06K9/00 , H04N7/12
CPC分类号： G06K9/3241 , G06K9/4642 , G06K9/6256
摘要： Provided are a system and method for detecting an object. The method includes selecting a macroscopic scan mode in which there are a small number of divided regions or a microscopic scan mode in which there are a large number of divided regions according to complexity of a background including an object to be detected, dividing an input image into one or more regions according to the selected scan mode, merging adjacent regions having similar characteristics among the divided regions, extracting a search region by excluding a region having a high probability that the object to be detected does not exist from the divided or merged regions, extracting feature data including a feature vector for detecting the object in the search region, and detecting the object in the search region using the extracted feature data.
摘要翻译：提供了用于检测对象的系统和方法。该方法包括选择宏数据扫描模式，其中存在少量分割区域或微观扫描模式，其中根据包括要检测的对象的背景的复杂度存在大量分割区域，划分输入图像根据所选择的扫描模式进入一个或多个区域，在分割区域中合并具有相似特征的相邻区域，通过从分割或合并区域排除具有高可能性的待检测对象不存在的区域来提取搜索区域提取包括用于检测搜索区域中的对象的特征向量的特征数据，以及使用所提取的特征数据来检测搜索区域中的对象。

3. 发明申请

US20120159015A1 DIRECT MEMORY ACCESS CONTROLLER AND OPERATING METHOD THEREOF 有权
标题翻译：直接存储器访问控制器及其操作方法
公开(公告)号：US20120159015A1
公开(公告)日：2012-06-21
申请号：US13243470
申请日：2011-09-23
申请人： Ik Jae Chun , Chun-Gi Lyuh , Jung Hee Suk , Sanghun Yoon , Tae Moon Roh
发明人： Ik Jae Chun , Chun-Gi Lyuh , Jung Hee Suk , Sanghun Yoon , Tae Moon Roh
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： Disclosed is an operating method of a direct memory access (DMA) controller having first and second DMA channels. The operating method includes iteratively performing a DMA transfer operation of the first DMA channel based upon loop information and transfer information of the first DMA channel; iteratively performing a DMA transfer operation of the second DMA channel based upon loop information and transfer information of the second DMA channel; reconfiguring the transfer and loop information of the first and second DMA channels; and again performing the iteratively performing a DMA transfer operation of the first DMA channel and the iteratively performing a DMA transfer operation of the first DMA channel based upon the reconfigured transfer and loop information of the first and second DMA channels.
摘要翻译：公开了具有第一和第二DMA通道的直接存储器访问（DMA）控制器的操作方法。操作方法包括：基于第一DMA通道的循环信息和传送信息来迭代地执行第一DMA通道的DMA传送操作; 基于所述第二DMA通道的循环信息和传送信息迭代地执行所述第二DMA通道的DMA传送操作; 重新配置第一和第二DMA通道的传送和循环信息; 并且基于第一和第二DMA通道的重新配置的传输和循环信息，再次执行迭代地执行第一DMA通道的DMA传送操作和迭代地执行第一DMA通道的DMA传送操作。

4. 发明申请

US20120148164A1 IMAGE MATCHING DEVICES AND IMAGE MATCHING METHODS THEREOF 有权
标题翻译：图像匹配装置及其图像匹配方法
公开(公告)号：US20120148164A1
公开(公告)日：2012-06-14
申请号：US13211912
申请日：2011-08-17
申请人： Jung Hee SUK , Sanghun Yoon , Chun-Gi Lyuh , Ik Jae Chun , Tae Moon Roh
发明人： Jung Hee SUK , Sanghun Yoon , Chun-Gi Lyuh , Ik Jae Chun , Tae Moon Roh
IPC分类号： G06K9/64 , G06K9/46
CPC分类号： G06K9/46 , G06K9/4671 , G06K9/6206 , G06K9/64
摘要： Provided is an image matching method of matching at least two images. The image matching method extracts feature points of a reference image and feature points of a target image, changes a feature point, selected from among the feature points of the reference image, to a reference point in the target image, sets a matching candidate region on the basis of the reference point, in the target image, and performs a similarity operation between the selected feature point in the reference image and a plurality of feature points included in the matching candidate region among the feature points of the target image. The image matching method decreases the number of similarity operations performed in the image matching operation, thereby guaranteeing a high-speed operation.
摘要翻译：提供了一种匹配至少两个图像的图像匹配方法。图像匹配方法提取参考图像的特征点和目标图像的特征点，将从参考图像的特征点中选择的特征点改变为目标图像中的参考点，将匹配的候选区域设置在在目标图像中的参考点的基础，并且执行参考图像中的所选特征点与目标图像的特征点中的匹配候选区域中包括的多个特征点之间的相似度操作。图像匹配方法减少了在图像匹配操作中执行的相似度操作的数量，从而保证了高速操作。

5. 发明申请

US20120099790A1 OBJECT DETECTION DEVICE AND SYSTEM 有权
标题翻译：对象检测装置和系统
公开(公告)号：US20120099790A1
公开(公告)日：2012-04-26
申请号：US13010316
申请日：2011-01-20
申请人： Chun-Gi LYUH , Sanghun Yoon , Ik Jae Chun , Jung Hee Suk , Tae Moon Roh , You-sun Kim , Sung-Jea Ko
发明人： Chun-Gi LYUH , Sanghun Yoon , Ik Jae Chun , Jung Hee Suk , Tae Moon Roh , You-sun Kim , Sung-Jea Ko
IPC分类号： G06K9/00
CPC分类号： G06K9/4642 , G06K9/3241
摘要： Provided are an object detection device and system. The object detection device includes an outline image extraction unit, a feature vector calculation unit, and an object judgment unit. The outline image extraction unit extracts an outline image from an input image. The feature vector calculation unit calculates a feature vector from the outline image by using histogram of oriented gradients (HOG) representing a frequency distribution of gradient vectors with respect to pixels of the outline image, and pixel coordinate information varying according to a spatial distribution of the gradient vectors. The object judgment unit judges a target object corresponding to the feature vector with reference to pre-learned data.
摘要翻译：提供了一种对象检测装置和系统。物体检测装置包括轮廓图像提取单元，特征向量计算单元和对象判断单元。轮廓图像提取单元从输入图像提取轮廓图像。特征矢量计算单元通过使用表示相对于轮廓图像的像素的梯度矢量的频率分布的取向梯度（HOG）的直方图来计算来自轮廓图像的特征矢量，以及根据轮廓图像的空间分布而变化的像素坐标信息梯度向量。对象判断单元参照预先学习的数据来判断与特征向量对应的目标对象。

6. 发明申请

US20090150471A1 RECONFIGURABLE ARITHMETIC UNIT AND HIGH-EFFICIENCY PROCESSOR HAVING THE SAME 有权
标题翻译：可重构算术单元和具有相同功能的高效处理器
公开(公告)号：US20090150471A1
公开(公告)日：2009-06-11
申请号：US12136107
申请日：2008-06-10
申请人： Yil Suk YANG , Jung Hee SUK , Chun Gi LYUH , Tae Moon ROH , Jong Dae KIM
发明人： Yil Suk YANG , Jung Hee SUK , Chun Gi LYUH , Tae Moon ROH , Jong Dae KIM
IPC分类号： G06F17/10
CPC分类号： G06F7/57 , G06F7/5324 , G06F7/5338
摘要： Provided are a reconfigurable arithmetic unit and a processor having the same. The reconfigurable arithmetic unit can perform an addition operation or a multiplication operation according to an instruction by sharing an adder. The reconfigurable arithmetic unit includes a booth encoder for encoding a multiplier, a partial product generator for generating a plurality of partial products using the encoded multiplier and a multiplicand, a Wallace tree circuit for compressing the partial products into a first partial product and a second partial product, a first Multiplexer (MUX) for selecting and outputting one of the first partial product and a first addition input according to a selection signal, a second MUX for selecting and outputting one of the second partial product and a second addition input according to the selection signal, and a Carry Propagation Adder (CPA) for adding an output of the first MUX and an output of the second MUX to output an operation result. The arithmetic unit can operate as an adder or a multiplier according to an instruction, and thus can increase the degree of use of entire hardware.
摘要翻译：提供了一种可重构运算单元和具有该可重配置运算单元的处理器。可重构算术单元可以通过共享加法器来执行根据指令的相加操作或乘法运算。可重构算术单元包括用于编码乘数的展位编码器，用于使用编码乘数产生多个部分乘积的部分乘积生成器和被乘数，用于将部分乘积压缩为第一部分乘积的华莱士树电路和第二部分乘积产品，用于根据选择信号选择和输出第一部分积和第一加法输入之一的第一多路复用器（MUX），用于根据选择信号选择和输出第二部分乘积和第二加法输入之一的第二MUX 选择信号和用于添加第一MUX的输出和第二MUX的输出的进位传播加法器（CPA），以输出运算结果。算术单元可以根据指令作为加法器或乘法器进行操作，从而可以增加整个硬件的使用程度。

7. 发明申请

US20080133879A1 SIMD parallel processor with SIMD/SISD/row/column operation modes 审中-公开
标题翻译： SIMD并行处理器采用SIMD / SISD /行/列操作模式
公开(公告)号：US20080133879A1
公开(公告)日：2008-06-05
申请号：US11906381
申请日：2007-10-01
申请人： Yil Suk Yang , Tae Moon Roh , Dae Woo Lee , Jong Dae Kim , Chun Gi Lyuh
发明人： Yil Suk Yang , Tae Moon Roh , Dae Woo Lee , Jong Dae Kim , Chun Gi Lyuh
IPC分类号： G06F9/30
CPC分类号： G06F9/3885 , G06F9/30036 , G06F9/30098 , G06F9/3012 , G06F9/30123 , G06F9/30141 , G06F9/30181 , G06F9/30189
摘要： Provided is a single instruction multiple data (SIMD) parallel processor including a plurality of processing units connected to one another. Each processing unit includes: an instruction register; an instruction decoder; a register files selection circuit; and register files. The SIMD parallel processor can selectively control data of register files required for any one of SIMD, single instruction single data (SISD), row, and column operations in response to an instruction. Since each of the SIMD, SISD, row, and column operations can be effectively performed according to the type of application, the SIMD parallel processor has excellent utility, efficiency, and flexibility.
摘要翻译：提供了包括彼此连接的多个处理单元的单指令多数据（SIMD）并行处理器。每个处理单元包括：指令寄存器; 指令解码器; 寄存器文件选择电路; 并注册文件。 SIMD并行处理器可以选择性地控制响应于指令的SIMD，单指令单数据（SISD），行和列操作中的任何一个所需的寄存器文件的数据。由于可以根据应用类型有效地执行SIMD，SISD，行和列操作，所以SIMD并行处理器具有优异的效用，效率和灵活性。

8. 发明申请

US20080129359A1 LOW-POWER CLOCK GATING CIRCUIT 有权
标题翻译：低功率时钟提升电路
公开(公告)号：US20080129359A1
公开(公告)日：2008-06-05
申请号：US11945387
申请日：2007-11-27
申请人： Dae Woo LEE , Yil Suk YANG , Ik Jae CHUN , Chun Gi LYUH , Tae Moon ROH , Jong Dae KIM
发明人： Dae Woo LEE , Yil Suk YANG , Ik Jae CHUN , Chun Gi LYUH , Tae Moon ROH , Jong Dae KIM
IPC分类号： H03K3/356
CPC分类号： H03K3/0375
摘要： Provided is a low-power clock gating circuit using a Multi-Threshold CMOS (MTCMOS) technique. The low-power clock gating circuit includes a latch circuit of an input stage and an AND gate circuit of an output stage, in which power consumption caused by leakage current in the clock gating circuit is reduced in a sleep mode, and supply of a clock to a unused device of a targeted logic circuit is prevented by the control of a clock enable signal in an active mode, thereby reducing power consumption. The low-power clock gating circuit using an MTCMOS technique uses devices having a low threshold voltage and devices having a high threshold voltage, which makes it possible to implement a high-speed, low-power circuit, unlike a conventional clock gating circuit using a single threshold voltage.
摘要翻译：提供了使用多阈值CMOS（MTCMOS）技术的低功率时钟选通电路。低功率时钟选通电路包括输入级的锁存电路和输出级的与门电路，其中由休眠模式中的时钟门控电路中的漏电流引起的功耗降低，并且提供时钟通过控制活动模式中的时钟使能信号来防止目标逻辑电路的未使用的装置，从而降低功耗。使用MTCMOS技术的低功率时钟选通电路使用具有低阈值电压的器件和具有高阈值电压的器件，这使得可以实现高速，低功率电路，这与使用单阈值电压。

9. 发明授权

US08897577B2 Image recognition device and method of recognizing image thereof 有权
标题翻译：图像识别装置及其图像识别方法
公开(公告)号：US08897577B2
公开(公告)日：2014-11-25
申请号：US13475867
申请日：2012-05-18
申请人： Sanghun Yoon , Chun-Gi Lyuh , Ik Jae Chun , Jung Hee Suk , Tae Moon Roh
发明人： Sanghun Yoon , Chun-Gi Lyuh , Ik Jae Chun , Jung Hee Suk , Tae Moon Roh
IPC分类号： G06K9/00 , G06K9/62
CPC分类号： G06K9/6239 , G06K9/6269
摘要： An image recognition device in accordance with the inventive concept may include an input vector extraction part extracting an input vector from an input image; a compression vector conversion part converting the input vector into a compression vector using a projection vector; a training parameter generation part receiving a training vector to generate a training parameter using a projection vector obtained through a folding operation of the training vector; and an image classification part classifying the compression vector using the training vector to output image recognition data.
摘要翻译：根据本发明构思的图像识别装置可以包括从输入图像提取输入向量的输入向量提取部分; 压缩矢量转换部分，使用投影矢量将输入矢量转换为压缩矢量; 训练参数生成部，使用通过训练矢量的折叠操作得到的投影矢量，接收训练矢量，生成训练参数; 以及图像分类部分，使用训练矢量对压缩矢量进行分类，以输出图像识别数据。

10. 发明授权

US08799529B2 Direct memory access controller and operating method thereof 有权
标题翻译：直接存储器存取控制器及其操作方法
公开(公告)号：US08799529B2
公开(公告)日：2014-08-05
申请号：US13243470
申请日：2011-09-23
申请人： Ik Jae Chun , Chun-Gi Lyuh , Jung Hee Suk , Sanghun Yoon , Tae Moon Roh
发明人： Ik Jae Chun , Chun-Gi Lyuh , Jung Hee Suk , Sanghun Yoon , Tae Moon Roh
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： Disclosed is an operating method of a direct memory access (DMA) controller having first and second DMA channels. The operating method includes iteratively performing a DMA transfer operation of the first DMA channel based upon loop information and transfer information of the first DMA channel; iteratively performing a DMA transfer operation of the second DMA channel based upon loop information and transfer information of the second DMA channel; reconfiguring the transfer and loop information of the first and second DMA channels; and again performing the iteratively performing a DMA transfer operation of the first DMA channel and the iteratively performing a DMA transfer operation of the first DMA channel based upon the reconfigured transfer and loop information of the first and second DMA channels.
摘要翻译：公开了具有第一和第二DMA通道的直接存储器访问（DMA）控制器的操作方法。操作方法包括：基于第一DMA通道的循环信息和传送信息来迭代地执行第一DMA通道的DMA传送操作; 基于所述第二DMA通道的循环信息和传送信息迭代地执行所述第二DMA通道的DMA传送操作; 重新配置第一和第二DMA通道的传送和循环信息; 并且基于第一和第二DMA通道的重新配置的传输和循环信息，再次执行迭代地执行第一DMA通道的DMA传送操作和迭代地执行第一DMA通道的DMA传送操作。

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