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1. 发明授权

US08713295B2 Fabric-backplane enterprise servers with pluggable I/O sub-system 有权
标题翻译：具有可插拔I / O子系统的布线背板企业服务器
公开(公告)号：US08713295B2
公开(公告)日：2014-04-29
申请号：US11736355
申请日：2007-04-17
申请人： Daniel H. Bax , William Jackson Bibb, Jr. , Russell M. Clapp , Tom Gourley , Geoffrey H. Hanson , Allen Hirashiki , Thomas Dean Lovett , Sharad Mehrotra , Shyam Mittur , Nakul Pratap Saraiya
发明人： Daniel H. Bax , William Jackson Bibb, Jr. , Russell M. Clapp , Tom Gourley , Geoffrey H. Hanson , Allen Hirashiki , Thomas Dean Lovett , Sharad Mehrotra , Shyam Mittur , Nakul Pratap Saraiya
IPC分类号： G06F9/24 , G06F9/44
CPC分类号： G06F9/4401 , G06F9/4405 , G06F9/4408 , H04L49/356
摘要： A Cost-Reduced Enterprise Server (CRES) system includes a flexible resource-efficient server having a plurality of Processor Memory Boards (PMBs) coupled to an Input/Output Module (IOM). The IOM provides all networking and storage interfaces for the server. The IOM is implemented as a field-replaceable pluggable module, and thus all Input/Output (I/O) capabilities or resources of a CRES system may be upgraded via replacement of the IOM. Each PMB is dividable into a pair of Symmetric MultiProcessor (SMP) complexes, and each complex is coupled to a respective portion of the I/O resources provided by the IOM. Each portion of the IOM provides a pair of I/O daughter-module connectors compatible with standard I/O interfaces, such as Peripheral Component Interconnect (PCI)-X and PCI-Express. One or more CRES systems may be coupled to one or more Enterprise Server (ES) systems to form a multi-chassis server managed collectively as one or more provisioned servers.
摘要翻译：降低成本的企业服务器（CRES）系统包括具有耦合到输入/输出模块（IOM）的多个处理器存储器板（PMB）的灵活的资源有效率的服务器。 IOM为服务器提供所有网络和存储接口。 IOM实现为现场可更换的可插拔模块，因此可以通过更换IOM来升级CRES系统的所有输入/输出（I / O）功能或资源。每个PMB可分为一对对称多处理器（SMP）复合体，每个复合体耦合到由IOM提供的I / O资源的相应部分。 IOM的每个部分都提供了一对与标准I / O接口兼容的I / O子模块连接器，如外设组件互连（PCI）-X和PCI-Express。一个或多个CRES系统可以耦合到一个或多个企业服务器（ES）系统，以形成作为一个或多个配置服务器集中管理的多机箱服务器。

2. 发明申请

US20130117766A1 Fabric-Backplane Enterprise Servers with Pluggable I/O Sub-System 有权
标题翻译：具有可插拔I / O子系统的布线背板企业服务器
公开(公告)号：US20130117766A1
公开(公告)日：2013-05-09
申请号：US11736355
申请日：2007-04-17
申请人： Daniel H. Bax , William Jackson Bibb, JR. , Russell M. Clapp , Tom Gourley , Geoffrey H. Hanson , Allen Hirashiki , Thomas Dean Lovett , Sharad Mehrotra , Shyam Mittur , Nakul Pratap Saraiya
发明人： Daniel H. Bax , William Jackson Bibb, JR. , Russell M. Clapp , Tom Gourley , Geoffrey H. Hanson , Allen Hirashiki , Thomas Dean Lovett , Sharad Mehrotra , Shyam Mittur , Nakul Pratap Saraiya
IPC分类号： G06F3/00
CPC分类号： G06F9/4401 , G06F9/4405 , G06F9/4408 , H04L49/356
摘要： A Cost-Reduced Enterprise Server (CRES) system includes a flexible resource-efficient server having a plurality of Processor Memory Boards (PMBs) coupled to an Input/Output Module (IOM). The IOM provides all networking and storage interfaces for the server. The IOM is implemented as a field-replaceable pluggable module, and thus all Input/Output (I/O) capabilities or resources of a CRES system may be upgraded via replacement of the IOM. Each PMB is dividable into a pair of Symmetric MultiProcessor (SMP) complexes, and each complex is coupled to a respective portion of the I/O resources provided by the IOM. Each portion of the IOM provides a pair of I/O daughter-module connectors compatible with standard I/O interfaces, such as Peripheral Component Interconnect (PCI)-X and PCI-Express. One or more CRES systems may be coupled to one or more Enterprise Server (ES) systems to form a multi-chassis server managed collectively as one or more provisioned servers.
摘要翻译：降低成本的企业服务器（CRES）系统包括具有耦合到输入/输出模块（IOM）的多个处理器存储器板（PMB）的灵活的资源有效率的服务器。 IOM为服务器提供所有网络和存储接口。 IOM实现为现场可更换的可插拔模块，因此可以通过更换IOM来升级CRES系统的所有输入/输出（I / O）功能或资源。每个PMB可分为一对对称多处理器（SMP）复合体，每个复合体耦合到由IOM提供的I / O资源的相应部分。 IOM的每个部分都提供了一对与标准I / O接口兼容的I / O子模块连接器，如外设组件互连（PCI）-X和PCI-Express。一个或多个CRES系统可以耦合到一个或多个企业服务器（ES）系统，以形成作为一个或多个配置服务器集中管理的多机箱服务器。

3. 发明授权

US06988155B2 Aggregation of hardware events in multi-node systems 失效
标题翻译：多节点系统中硬件事件的聚合
公开(公告)号：US06988155B2
公开(公告)日：2006-01-17
申请号：US09968768
申请日：2001-10-01
申请人： Richard A. Lary , Daniel H. Bax
发明人： Richard A. Lary , Daniel H. Bax
IPC分类号： G06F13/24
CPC分类号： G06F13/24 , G06F9/4812 , H04L67/10 , H04L69/32
摘要： The aggregation of hardware events in multi-node systems is disclosed. An event occurring at a remote node is forwarded to a primary node, by firmware of the remote node writing to a first register of the primary node. The event is propagated from the first register of the primary node to a second register node. In automatic response, an interrupt is generated at the primary node. An interrupt handler of the primary node, in response to generation of the interrupt, then invokes code at the primary node to handle the event occurring at the remote node.
摘要翻译：披露了多节点系统中硬件事件的聚合。在远程节点发生的事件通过远程节点的固件转发到主节点，写入主节点的第一个寄存器。事件从主节点的第一寄存器传播到第二寄存器节点。在自动响应中，主节点产生中断。主节点的中断处理程序响应于中断的产生，然后在主节点处调用代码来处理在远程节点发生的事件。

4. 发明授权

US06701403B2 Service processor access of non-volatile memory 失效
标题翻译：服务处理器访问非易失性存储器
公开(公告)号：US06701403B2
公开(公告)日：2004-03-02
申请号：US09969262
申请日：2001-10-01
申请人： Richard A. Lary , Daniel H. Bax
发明人： Richard A. Lary , Daniel H. Bax
IPC分类号： G06F1200
CPC分类号： G06F13/4239
摘要： Non-volatile memory access, such as firmware access by a service processor, is disclosed. The service processor asserts a controller signal to select either a first non-volatile memory, or a second non-volatile memory. The first non-volatile memory is located behind a first bridge controller and is otherwise accessible by the service processor. The second non-volatile memory is located behind a second bridge controller and is otherwise accessible only by a processor other than the service processor. The service processor then access the selected non-volatile memory, via a bus communicatively coupled to both the non-volatile memories.
摘要翻译：公开了非易失性存储器访问，诸如服务处理器的固件访问。服务处理器断言控制器信号以选择第一非易失性存储器或第二非易失性存储器。第一非易失性存储器位于第一桥控制器的后面，并且可由服务处理器访问。第二非易失性存储器位于第二桥接控制器之后，并且仅由除了服务处理器之外的处理器可访问。服务处理器然后通过通信地耦合到两个非易失性存储器的总线来访问所选择的非易失性存储器。

5. 发明授权

US06445556B1 Voltage protection for computer processors 有权
标题翻译：电脑处理器的电压保护
公开(公告)号：US06445556B1
公开(公告)日：2002-09-03
申请号：US09577237
申请日：2000-05-23
申请人： Daniel H. Bax
发明人： Daniel H. Bax
IPC分类号： H02H900
CPC分类号： G06F1/28 , G06F1/26 , G06F11/00
摘要： A multi processor computer system includes processors 102 in processor receptacles 104, and voltage modules 106 and voltage module receptacle 108. The system accepts both direct voltage processors powered directly from the system power plane, and regulated voltage processors which require a voltage regulator 300. The regulated voltage processors require the voltage regulator while the direct voltage processors cannot operate with a voltage regulator. Voltage module control circuit 110 tests and compares processor type signals from the processor receptacles and voltage module type signals from the voltage module receptacles, and produces a voltage validation signal which indicates the presence of a mismatch between any of the processors and its respective voltage module. The voltage validation signal modifies the conventional processor presence signal from the processor receptacles if a mismatch exists, preventing the system from being powered on.
摘要翻译：多处理器计算机系统包括处理器插座104以及电压模块106和电压模块插座108中的处理器102.系统接受直接从系统电源平面供电的直接电压处理器和需要电压调节器300的调节电压处理器。调节电压处理器需要电压调节器，而直流电压处理器不能用电压调节器工作。电压模块控制电路110测试和比较来自处理器插座的处理器类型信号和来自电压模块插座的电压模块类型信号，并且产生指示任何处理器及其相应电压模块之间存在失配的电压验证信号。如果不匹配存在，则电压验证信号修改来自处理器插座的常规处理器存在信号，从而防止系统上电。

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