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    • 1. 发明授权
    • Network processor for supporting residential gateway applications
    • 用于支持住宅网关应用的网络处理器
    • US08817799B2
    • 2014-08-26
    • US13086753
    • 2011-04-14
    • Asaf KorenIfat NaamanEliezer WeitzAlex GoldsteinYariv Aviram
    • Asaf KorenIfat NaamanEliezer WeitzAlex GoldsteinYariv Aviram
    • H04L12/28
    • H04L45/60H04L12/2834H04L12/2898
    • A network processor for performing residential gateway processing tasks. The network processor includes a first cluster of packet processors and a second cluster of packet processors, wherein each of the first cluster and the second cluster includes a main packet processor and a secondary packet processor, wherein the main packet processor performs at least routing of incoming packets and the secondary packet processor performs off-loading tasks for the main packet processor; a plurality of Ethernet media access control (MAC) adapters for interfacing with a plurality of subscriber devices connected to a residential gateway; an external-network MAC adapter for interfacing with a wide area network (WAN) connected to the network processor; and an ingress handler for at least load balancing the processing of packets between the first cluster and the second cluster.
    • 一种用于执行住宅网关处理任务的网络处理器。 网络处理器包括分组处理器的第一簇和分组处理器的第二簇,其中第一簇和第二簇中的每一个包括主分组处理器和辅分组处理器,其中主分组处理器至少执行路由选择 分组和次分组处理器执行主分组处理器的卸载任务; 用于与连接到住宅网关的多个订户设备进行接口的多个以太网媒体接入控制(MAC)适配器; 用于与连接到网络处理器的广域网(WAN)进行接口的外部网络MAC适配器; 以及用于至少负载平衡在第一集群和第二集群之间的分组的处理的进入处理器。
    • 3. 发明授权
    • Method and apparatus for ensuring CRC error generation by a data
communication station experiencing transmitter exceptions
    • 用于确保经历发射机异常的数据通信站产生CRC错误的方法和装置
    • US5195093A
    • 1993-03-16
    • US655884
    • 1991-02-14
    • Moshe TarrabYehuda ShaikEliezer Weitz
    • Moshe TarrabYehuda ShaikEliezer Weitz
    • G06F11/10H04L1/00
    • H04L1/0061G06F11/10
    • A method for ensuring CRC error generation by a data communication station after a transmitter exception such as an underrun whereby a parity bit is preset to a binary one, and toggled in response to successive binary ones of a serial bit stream. Each byte of the serial bit stream is transmitted sequentially. If a transmitter exception occurs, the byte before the exception is transmitted normally. However, only the first seven bits of the last byte are transmitted. The parity bit is sent as an eighth bit of the last byte, ensuring odd parity for the previous bit stream. Thereafter, a byte even parity is sent to assure that the overall message has odd parity. A receiving station interprets two consecutive bytes having the predetermined data pattern as the CRC, thus ensuring that the receiving station will reject the frame.
    • 一种在诸如欠载的发射机异常之后确保数据通信站产生CRC错误的方法,由此将奇偶校验位预设为二进制位,并且响应于串行比特流的连续的二进制位而被切换。 串行比特流的每个字节被顺序地发送。 如果发生异常发生,异常发生前的字节正常发送。 但是,只发送最后一个字节的前7位。 奇偶校验位作为最后一个字节的第八位发送,确保前一个比特流的奇偶校验。 此后,发送字节偶校验以确保整个消息具有奇校验。 接收站将具有预定数据模式的两个连续字节解释为CRC,从而确保接收站将拒绝该帧。
    • 7. 发明授权
    • Multi channel controller
    • 多通道控制器
    • US06771630B1
    • 2004-08-03
    • US09498075
    • 2000-02-04
    • Eliezer WeitzYoram YeivinYossi SocoletzkiAdi KatzMoti KurnickAvi ShalevAvi Hagai
    • Eliezer WeitzYoram YeivinYossi SocoletzkiAdi KatzMoti KurnickAvi ShalevAvi Hagai
    • H04Q728
    • H04L49/9089G06F13/128G06F13/4018H04J3/1605H04L49/90H04L49/9078
    • A communication controller (111) for handling and processing data packets received from a large number of communication channels (181-188). The communication controller (111) comprising of: a processor (160) for processing data; a serial interface (28), coupled to the communication channels (181-188). A multi channel controller (100, 100′) coupled to the serial interface (28) and the processor (160), for interfacing between the communication channels (181-188) and the processor (160). The communication channels (181-188) and the serial interface (28) send and receive data packets. The processor (160) sends, receives and processes data words. The multi channel controller (100) receives data packets from the serial interface (28), concatenates data packets and sends data words to the processor (160). The multi channel controller (100) receives data words from the processor (160), and transmits data packets to the serial interface (28).
    • 一种用于处理和处理从大量通信信道(181-188)接收的数据分组的通信控制器(111)。 通信控制器(111)包括:处理器(160),用于处理数据; 耦合到通信信道(181-188)的串行接口(28)。 耦合到串行接口(28)和处理器(160)的多通道控制器(100,100'),用于在通信通道(181-188)和处理器(160)之间进行接口。 通信信道(181-188)和串行接口(28)发送和接收数据包。 处理器(160)发送,接收和处理数据字。 多通道控制器(100)从串行接口(28)接收数据包,连接数据包并将数据字发送到处理器(160)。 多通道控制器(100)从处理器(160)接收数据字,并将数据包发送到串行接口(28)。
    • 9. 发明申请
    • Network Processor for Supporting Residential Gateway Applications
    • 用于支持住宅网关应用的网络处理器
    • US20120263462A1
    • 2012-10-18
    • US13086753
    • 2011-04-14
    • Asaf KorenIfat NaamanEliezer WeitzAlex GoldsteinYariv Aviram
    • Asaf KorenIfat NaamanEliezer WeitzAlex GoldsteinYariv Aviram
    • H04L12/56H04J14/00
    • H04L45/60H04L12/2834H04L12/2898
    • A network processor for performing residential gateway processing tasks. The network processor includes a first cluster of packet processors and a second cluster of packet processors, wherein each of the first cluster and the second cluster includes a main packet processor and a secondary packet processor, wherein the main packet processor performs at least routing of incoming packets and the secondary packet processor performs off-loading tasks for the main packet processor; a plurality of Ethernet media access control (MAC) adapters for interfacing with a plurality of subscriber devices connected to a residential gateway; an external-network MAC adapter for interfacing with a wide area network (WAN) connected to the network processor; and an ingress handler for at least load balancing the processing of packets between the first cluster and the second cluster.
    • 一种用于执行住宅网关处理任务的网络处理器。 网络处理器包括分组处理器的第一簇和分组处理器的第二簇,其中第一簇和第二簇中的每一个包括主分组处理器和辅分组处理器,其中主分组处理器至少执行路由选择 分组和次分组处理器执行主分组处理器的卸载任务; 用于与连接到住宅网关的多个订户设备进行接口的多个以太网媒体接入控制(MAC)适配器; 用于与连接到网络处理器的广域网(WAN)进行接口的外部网络MAC适配器; 以及用于至少负载平衡在第一集群和第二集群之间的分组的处理的进入处理器。