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1. 发明申请

US20170272363A1 SYSTEM COMPRISING NODES WITH ACTIVE AND PASSIVE PORTS 审中-公开
公开(公告)号：US20170272363A1
公开(公告)日：2017-09-21
申请号：US15478791
申请日：2017-04-04
申请人： Entropic Communications LLC
发明人： Roelof P. De Jong
IPC分类号： H04L12/801 , H04L12/861 , G06F9/44
CPC分类号： H04L47/10 , G06F9/4494 , H04L49/90 , H04L49/9057 , H04L49/9078
摘要： A data processing system comprising a plurality of interconnected nodes, each node comprising a media processor and one or more ports, each port connected to a respective media processor. Each port is configured to be active or passive, an active port being arranged, upon receipt of data, to transfer the received data to its output, a passive input port being arranged, upon receipt of data, to retain the received data and to transmit the received data to its output when the received data reaches a specific size, and a passive output port being arranged to trigger the receipt of data when the data capacity of the output port reaches a specific size.

2. 发明申请

US20160277322A1 A system and a method of analysing a plurality of data packets 审中-公开
标题翻译：一种分析多个数据分组的系统和方法
公开(公告)号：US20160277322A1
公开(公告)日：2016-09-22
申请号：US15034252
申请日：2014-11-11
申请人： NAPATECH A/S
发明人： Jens Christophersen
IPC分类号： H04L12/935 , H04L12/741 , H04L12/861
CPC分类号： H04L49/3036 , H04L45/74 , H04L49/00 , H04L49/9078
摘要： A system and a method for analysing a plurality of data packets where the data packets are analysed to determine which of a number of subsequent process(es) is/are to further analyse the data packets. Information identifying the subsequent process(es) is added to a FIFO. An unknown data packet type is not immediately recognizable, whereby a storage location is reserved in the FIFO, and the data packet is fed to a separate characterizing process deriving the information relating to the relevant process(es), which information is subsequently fed to the relevant storage location in the FIFO, so that the order of data packets represented in the FIFO is the order of receipt of the data packets. From the FIFO, information is fed to a work list or storage of the relevant subsequent processes to process the pertaining data packets. This processing may also be in the chronological order of receipt of the data packets.
摘要翻译：一种用于分析数据分组被分析的多个数据分组的系统和方法，以确定多个后续处理中的哪一个是/进一步分析数据分组。识别后续过程的信息被添加到FIFO。未知数据分组类型不能被立即识别，由此在FIFO中保留存储位置，并且将数据分组馈送到导出与相关进程相关的信息的单独特征化过程，该信息随后被馈送到 FIFO中的相关存储位置，使得在FIFO中表示的数据分组的顺序是接收数据分组的顺序。从FIFO中，将信息馈送到相关后续处理的工作列表或存储器以处理相关数据分组。该处理也可以是接收数据分组的时间顺序。

3. 发明授权

US09378784B1 Security device using high latency memory to implement high update rate statistics for large number of events 有权
标题翻译：安全设备使用高延迟内存来实现大量事件的高更新率统计
公开(公告)号：US09378784B1
公开(公告)日：2016-06-28
申请号：US13748493
申请日：2013-01-23
申请人： Palo Alto Networks, Inc.
发明人： De Bao Vu , Gyanesh Saharia
IPC分类号： G11C7/10 , H04L12/861 , G06F5/10
CPC分类号： G11C7/1072 , G06F5/10 , G11C7/10 , H04L49/90 , H04L49/9078
摘要： A security device includes a controller configured to determine a flow identifier and an event counter associated with a received data packet and a counter memory including multiple memory banks where each memory bank stores a partial counter value for one or more event counters. The counter memory is indexed by a counter identifier associated with the event counter. A memory controller selects a memory bank in the counter memory that was not the memory bank last selected and the partial counter value associated with the counter identifier in the selected memory bank is updated, the updated partial counter value being written back to the selected memory bank. In one embodiment, the partial counter value is updated and written back within the latency window of the memory bank last selected.
摘要翻译：安全设备包括：控制器，被配置为确定与接收的数据分组相关联的流标识符和事件计数器，以及包括多个存储器组的计数器存储器，其中每个存储体存储一个或多个事件计数器的部分计数器值。计数器存储器由与事件计数器相关联的计数器标识符索引。存储器控制器选择计数器存储器中不是最后选择的存储体的存储器组，并且更新与所选存储体中的计数器标识符相关联的部分计数器值，更新后的部分计数器值被写回所选择的存储体。在一个实施例中，部分计数器值被更新并在最后选择的存储体的等待时间窗口内写回。

4. 发明申请

US20160057058A1 CPP BUS TRANSACTION VALUE HAVING A PAM/LAM SELECTION CODE FIELD 有权
标题翻译：具有PAM / LAM选择代码字段的CPP总线交易值
公开(公告)号：US20160057058A1
公开(公告)日：2016-02-25
申请号：US14464697
申请日：2014-08-20
申请人： Netronome Systems, Inc.
发明人： Salma Mirza , Gavin J. Stark , Steven W. Zagorianakos
IPC分类号： H04L12/801 , H04L12/935 , H04L12/861 , G06F12/10
CPC分类号： H04L47/10 , G06F12/1072 , G06F12/109 , G06F13/4234 , G06F2212/657 , H04L49/3072 , H04L49/9078
摘要： Within a networking device, packet portions from multiple PDRSDs (Packet Data Receiving and Splitting Devices) are loaded into a single memory, so that the packet portions can later be processed by a processing device. Rather than the PDRSDs managing and handling the storing of packet portions into the memory, a packet engine is provided. A device interacting with the packet engine can use a PPI (Packet Portion Identifier) Addressing Mode (PAM) in communicating with the packet engine and in instructing the packet engine to store packet portions. Alternatively, the device can use a Linear Addressing Mode (LAM) to communicate with the packet engine. A PAM/LAM selection code field in a bus transaction value sent to the packet engine indicates whether PAM or LAM will be used.
摘要翻译：在网络设备内，来自多个PDRSD（分组数据接收和分离设备）的分组部分被加载到单个存储器中，使得分组部分稍后可以由处理设备处理。管理和处理分组部分存储到存储器中的PDRSD不是提供分组引擎。与分组引擎交互的设备可以使用PPI（分组部分标识符）寻址模式（PAM）与分组引擎进行通信，并指示分组引擎存储分组部分。或者，设备可以使用线性寻址模式（LAM）与分组引擎进行通信。发送到分组引擎的总线事务值中的PAM / LAM选择代码字段指示是否使用PAM或LAM。

5. 发明授权

US09253107B2 Data communications in a distributed computing environment 有权
标题翻译：分布式计算环境中的数据通信
公开(公告)号：US09253107B2
公开(公告)日：2016-02-02
申请号：US14011219
申请日：2013-08-27
申请人： International Business Machines Corporation
发明人： Charles J. Archer , Michael A. Blocksome , James E. Carey , Philip J. Sanders
IPC分类号： H04L12/26 , H04L12/823 , H04L12/861
CPC分类号： H04L47/32 , H04L47/18 , H04L49/9063 , H04L49/9078 , H04L51/18
摘要： Data communications may be carried out in a distributed computing environment that includes computers coupled for data communications through communications adapters and an active messaging interface (‘AMI’). Such data communications may be carried out by: issuing, by a sender to a receiver, an eager SEND data communications instruction to transfer SEND data, the instruction including information describing data location at the sender and data size; transmitting, by the sender to the receiver, the SEND data as eager data packets; discarding, by the receiver in dependence upon data flow conditions, eager data packets as they are received from the sender; and transferring, in dependence upon the data flow conditions, by the receiver from the sender's data location to a receive buffer by remote direct memory access (“RDMA”), the SEND data.
摘要翻译：数据通信可以在分布式计算环境中进行，该分布式计算环境包括通过通信适配器和活动消息接口（“AMI”）耦合用于数据通信的计算机。这样的数据通信可以通过以下方式来执行：由发送者向接收者发送用于传送SEND数据的急切的SEND数据通信指令，该指令包括描述发送方的数据位置的信息和数据大小; 由发送方向接收方发送SEND数据作为渴望数据包; 接收机根据数据流条件丢弃从发送方接收到的急切数据包; 并且根据数据流条件，通过远程直接存储器访问（“RDMA”）将接收器从发送者的数据位置传送到接收缓冲器，SEND数据。

6. 发明申请

US20150085863A1 EFFICIENT MEMORY BANDWIDTH UTILIZATION IN A NETWORK DEVICE 有权
标题翻译：网络设备中有效的存储带宽利用率
公开(公告)号：US20150085863A1
公开(公告)日：2015-03-26
申请号：US14072744
申请日：2013-11-05
申请人： BROADCOM CORPORATION
发明人： David WU , Darren Duane NEUMAN , Flaviu Dorin TUREAN , Rajesh Shankarrao MAMIDWAR , Anand TONGLE , Predrag KOSTIC
IPC分类号： H04L12/747
CPC分类号： H04L45/742 , H04L49/901 , H04L49/9042 , H04L49/9047 , H04L49/9078
摘要： A system for efficient memory bandwidth utilization may include a depacketizer, a packetizer, and a processor core. The depacketizer may generate header information items from received packets, where the header information items include sufficient information for the processor core to process the packets without accessing the payloads from off-chip memory. The depacketizer may accumulate multiple payloads and may write the multiple payloads to the off-chip memory in a single memory transaction when a threshold amount of the payloads have been accumulated. The processor core may receive the header information items and may generate a single descriptor for accessing multiple payloads corresponding to the header information items from the off-chip memory. The packetizer may generate a header for each payload based at least on on-chip information and without accessing off-chip memory. Thus, the subject system provides efficient memory bandwidth utilization, e.g. at least by reducing the number of off-chip memory accesses.
摘要翻译：用于有效的存储器带宽利用的系统可以包括解包器，打包器和处理器核。解包器可以从接收到的分组中生成报头信息项，其中报头信息项包括用于处理核心处理分组的足够信息，而不从片外存储器访问有效载荷。解复用器可以累积多个有效载荷，并且可以在累积有效载荷的阈值量时在单个存储器事务中将多个有效载荷写入到片外存储器。处理器核心可以接收标题信息项，并且可以生成用于从片外存储器访问对应于标题信息项的多个有效载荷的单个描述符。打包器可以至少基于片上信息并且不访问片外存储器来为每个有效载荷生成头部。因此，主题系统提供有效的存储器带宽利用，例如。至少通过减少片外存储器访问的数量。

7. 发明申请

US20150063100A1 Data Communications In A Distributed Computing Environment 有权
标题翻译：分布式计算环境中的数据通信
公开(公告)号：US20150063100A1
公开(公告)日：2015-03-05
申请号：US14011219
申请日：2013-08-27
申请人： International Business Machines Corporation
发明人： Charles J. Archer , Michael A. Blocksome , James E. Carey , Philip J. Sanders
IPC分类号： H04L12/823
CPC分类号： H04L47/32 , H04L47/18 , H04L49/9063 , H04L49/9078 , H04L51/18
摘要： Data communications may be carried out in a distributed computing environment that includes computers coupled for data communications through communications adapters and an active messaging interface (‘AMI’). Such data communications may be carried out by: issuing, by a sender to a receiver, an eager SEND data communications instruction to transfer SEND data, the instruction including information describing data location at the sender and data size; transmitting, by the sender to the receiver, the SEND data as eager data packets; discarding, by the receiver in dependence upon data flow conditions, eager data packets as they are received from the sender; and transferring, in dependence upon the data flow conditions, by the receiver from the sender's data location to a receive buffer by remote direct memory access (“RDMA”), the SEND data.
摘要翻译：数据通信可以在分布式计算环境中进行，该分布式计算环境包括通过通信适配器和活动消息接口（“AMI”）耦合用于数据通信的计算机。这样的数据通信可以通过以下方式来执行：由发送者向接收者发送用于传送SEND数据的急切的SEND数据通信指令，该指令包括描述发送方的数据位置的信息和数据大小; 由发送方向接收方发送SEND数据作为渴望数据包; 接收机根据数据流条件丢弃从发送方接收到的急切数据包; 并且根据数据流条件，通过远程直接存储器访问（“RDMA”）将接收器从发送者的数据位置传送到接收缓冲器，SEND数据。

8. 发明授权

US08553720B2 Adaptive speed control for MAC-PHY interfaces 有权
标题翻译： MAC-PHY接口的自适应速度控制
公开(公告)号：US08553720B2
公开(公告)日：2013-10-08
申请号：US11696476
申请日：2007-04-04
申请人： Nafea Bishara , William Lo
发明人： Nafea Bishara , William Lo
IPC分类号： H04J3/16 , G01R31/08
CPC分类号： G06F5/065 , G06F12/023 , G06F13/4234 , G06F2205/067 , H04L12/4013 , H04L47/10 , H04L47/22 , H04L49/90 , H04L49/9078 , H04L49/9084 , Y02D50/10
摘要： Apparatus having corresponding methods and computer programs comprise a first first-in first-out buffer (FIFO) to receive and store data from a media access controller (MAC); a physical-layer device (PHY) to transmit a signal representing the data; and a control circuit comprising a read circuit to transfer the data from the first FIFO to the PHY, and a transmit pause circuit to transmit a pause frame to the MAC when an amount of the data stored in the first FIFO exceeds a predetermined threshold.
摘要翻译：具有相应方法和计算机程序的装置包括从媒体接入控制器（MAC）接收和存储数据的第一先进先出缓冲器（FIFO）用于发送表示数据的信号的物理层设备（PHY）; 以及控制电路，包括用于将数据从第一FIFO传送到PHY的读取电路，以及发送暂停电路，用于当存储在第一FIFO中的数据量超过预定阈值时，向MAC发送暂停帧。

9. 发明申请

US20130128896A1 NETWORK SWITCH WITH EXTERNAL BUFFERING VIA LOOPAROUND PATH 有权
标题翻译：网路交换机通过循环路径进行外部缓冲
公开(公告)号：US20130128896A1
公开(公告)日：2013-05-23
申请号：US13746080
申请日：2013-01-21
申请人： LSI Corporation
发明人： Robert J. Munoz
IPC分类号： H04L12/56
CPC分类号： H04L49/9078 , G06F15/167 , H04L47/12 , H04L47/30 , H04L47/31 , H04L49/101 , H04L49/109 , H04L49/506
摘要： Described embodiments process data packets received by a network switch coupled to an external buffering device. The network switch determines a queue of an internal buffer of the network switch associated with a flow of the received packet and determines whether the received packet should be forwarded to the external buffering device. If the received packet should be forwarded to the external buffering device, the network switch sets an external buffering active indicator indicating that the network switch is in an external buffering mode for the flow, tags the received packet with metadata, and forwards the packet to the external buffering device. The external buffering device stores the forwarded packet in a queue of a memory of the external buffering device corresponding to the tagged metadata of the forwarded packet. The network switch processes packets stored in the internal buffer of the network switch.
摘要翻译：描述的实施例处理由耦合到外部缓冲设备的网络交换机接收的数据分组。网络交换机确定与接收到的分组的流相关联的网络交换机的内部缓冲器的队列，并确定接收到的分组是否应转发到外部缓冲设备。如果接收到的数据包应该转发到外部缓冲设备，则网络交换机设置外部缓冲活动指示符，指示网络交换机处于流量的外部缓冲模式，用元数据对接收到的数据包进行标记，并将数据包转发到外部缓冲设备外部缓冲装置将转发的分组存储在与所转发的分组的标记的元数据相对应的外部缓冲装置的存储器的队列中。网络交换机处理存储在网络交换机的内部缓冲区中的数据包。

10. 发明申请

US20130128734A1 SYSTEMS AND METHODS FOR DROPPING DATA USING A DROP PROFILE 失效
标题翻译：使用DROP配置文件删除数据的系统和方法
公开(公告)号：US20130128734A1
公开(公告)日：2013-05-23
申请号：US13717060
申请日：2012-12-17
申请人： JUNIPER NETWORKS, INC.
发明人： Pradeep SINDHU , Debashis BASU , Jayabharat BODDU , Avanindra GODBOLE
IPC分类号： H04L12/56
CPC分类号： H04L47/32 , H04L47/10 , H04L47/23 , H04L47/30 , H04L47/326 , H04L49/90 , H04L49/9078
摘要： A system selectively drops data from queues. The system includes a drop table that stores drop probabilities. The system selects one of the queues to examine and generates an index into the drop table to identify one of the drop probabilities for the examined queue. The system then determines whether to drop data from the examined queue based on the identified drop probability.
摘要翻译：系统有选择地从队列中删除数据。该系统包括存储丢弃概率的丢弃表。系统选择一个队列来检查并生成一个索引到丢包表中，以识别已检查队列的一个丢弃概率。系统然后基于所识别的丢弃概率来确定是否从检查的队列中丢弃数据。

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