专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08359494B2 Parallel fault detection 有权
标题翻译：并行故障检测
公开(公告)号：US08359494B2
公开(公告)日：2013-01-22
申请号：US10323272
申请日：2002-12-18
申请人： Elfido Coss, Jr. , Ernest D. Adams, III , Robert J. Chong , Howard E. Castle , Thomas J. Sonderman , Alexander J. Pasadyn
发明人： Elfido Coss, Jr. , Ernest D. Adams, III , Robert J. Chong , Howard E. Castle , Thomas J. Sonderman , Alexander J. Pasadyn
IPC分类号： G06F11/00
CPC分类号： H01L22/20 , H01L2924/0002 , H01L2924/00
摘要： A method and an apparatus are provided for parallel fault detection. The method comprises receiving data associated with processing of a workpiece by a first processing tool, receiving data associated with processing of a workpiece by a second processing tool and comparing at least a portion of the received data to a common fault model to determine if a fault associated with at least one of the processing of the workpiece by the first processing tool and processing of the workpiece by the second processing tool occurred.
摘要翻译：提供了用于并行故障检测的方法和装置。该方法包括接收与第一处理工具处理工件有关的数据，通过第二处理工具接收与工件的处理有关的数据，并将至少一部分接收到的数据与常见故障模型进行比较，以确定是否存在故障与通过第一处理工具处理工件和由第二处理工具处理工件的至少一个相关联。

2. 发明授权

US06991945B1 Fault detection spanning multiple processes 有权
标题翻译：故障检测跨越多个进程
公开(公告)号：US06991945B1
公开(公告)日：2006-01-31
申请号：US10231911
申请日：2002-08-30
申请人： Howard E. Castle , Matthew A. Purdy , Gregory A. Cherry , Richard J. Markle , Eric O. Green , Michael L. Miller , Brian K. Cusson
发明人： Howard E. Castle , Matthew A. Purdy , Gregory A. Cherry , Richard J. Markle , Eric O. Green , Michael L. Miller , Brian K. Cusson
IPC分类号： H01L21/66
CPC分类号： H01L22/20 , H01L2924/0002 , H01L2924/00
摘要： A method and apparatus is provided for fault detection spanning multiple processes. The method comprises receiving operational data associated with a first process, receiving operational data associated with a second process, which is downstream to the first process and performing fault detection analysis based on the operational data associated with the first process and second process using a common fault detection unit.
摘要翻译：提供了跨越多个过程的故障检测的方法和装置。该方法包括接收与第一过程相关联的操作数据，接收与第一进程相关的操作数据，该第二进程是第一进程的下游，并且基于与第一进程相关联的操作数据和使用公共故障的第二进程来执行故障检测分析检测单元

3. 发明授权

US06947805B1 Dynamic metrology sampling techniques for identified lots, and system for performing same 失效
标题翻译：用于识别批次的动态计量抽样技术和执行相同批次的系统
公开(公告)号：US06947805B1
公开(公告)日：2005-09-20
申请号：US10634038
申请日：2003-08-04
申请人： Howard E. Castle , Naomi M. Jenkins
发明人： Howard E. Castle , Naomi M. Jenkins
IPC分类号： G05B19/418 , G06F19/00 , H01L21/00
CPC分类号： G05B19/41865 , H01L21/67276 , Y02P90/20
摘要： Methods of using dynamic metrology sampling techniques for identified lots, and a system for performing such methods are disclosed. In one illustrative embodiment, the method comprises identifying at least one wafer to be processed, identifying a process tool in which at least one wafer is to be processed, obtaining enhanced metrology data regarding a process operation to be performed in the identified process tool prior to processing the identified at least one wafer in the identified process tool, and positioning at least one wafer in the identified process tool and performing the process operation thereon.
摘要翻译：公开了用于识别批次的动态计量抽样技术的方法和用于执行这些方法的系统。在一个说明性实施例中，该方法包括识别待处理的至少一个晶片，识别其中要处理至少一个晶片的处理工具，获得关于将在所识别的处理工具之前执行的处理操作的增强的度量数据在所识别的处理工具中处理所识别的至少一个晶片，以及将至少一个晶片定位在所识别的处理工具中并在其上执行处理操作。

4. 发明授权

US06953697B1 Advanced process control of the manufacture of an oxide-nitride-oxide stack of a memory device, and system for accomplishing same 失效
标题翻译：存储器件的氧化物 - 氮化物 - 氧化物堆叠的制造的先进工艺控制和用于实现其的系统
公开(公告)号：US06953697B1
公开(公告)日：2005-10-11
申请号：US10277357
申请日：2002-10-22
申请人： Howard E. Castle , Robert J. Chong , Brian K. Cusson , Eric O. Green
发明人： Howard E. Castle , Robert J. Chong , Brian K. Cusson , Eric O. Green
IPC分类号： H01L21/66 , H01L21/8247
CPC分类号： H01L22/12 , Y10S438/954
摘要： The present invention is generally directed to an advanced process control of the manufacture of memory devices, and a system for accomplishing same. In one illustrative embodiment, the method comprises performing at least one process operation to form at least one layer of an oxide-nitride-oxide stack of a memory cell, the stack being comprised of a first layer of oxide positioned above a first layer of polysilicon, a layer of silicon nitride positioned above the first layer of oxide, and a second layer of oxide positioned above the layer of silicon nitride. The method further comprises measuring at least one characteristic of at least one of the first layer of polysilicon, the first oxide layer, the layer of silicon nitride, and the second layer of oxide and adjusting at least one parameter of at least one process operation used to form at least one of the first oxide layer, the layer of silicon nitride and the second oxide layer if the measured at least one characteristic is not within acceptable limits.
摘要翻译：本发明一般涉及存储器件的制造的高级过程控制和用于实现其的系统。在一个说明性实施例中，该方法包括执行至少一个处理操作以形成存储器单元的氧化物 - 氮化物 - 氧化物堆叠的至少一层，所述堆叠由位于第一多晶硅层之上的第一层氧化物位于第一氧化物层之上的氮化硅层和位于氮化硅层上方的第二层氧化物。该方法还包括测量第一多晶硅层，第一氧化物层，氮化硅层和第二氧化物层中的至少一个的至少一个特征，并且调整使用的至少一个工艺操作的至少一个参数如果所测量的至少一个特性不在可接受的限度内，则形成第一氧化物层，氮化硅层和第二氧化物层中的至少一个。

5. 发明授权

US06778876B1 Methods of processing substrates based upon substrate orientation 失效
标题翻译：基于基板取向处理基板的方法
公开(公告)号：US06778876B1
公开(公告)日：2004-08-17
申请号：US10286586
申请日：2002-11-01
申请人： Elfido Coss, Jr. , Howard E. Castle
发明人： Elfido Coss, Jr. , Howard E. Castle
IPC分类号： G06F1900
CPC分类号： H01L21/67288 , H01L21/67259 , H01L21/681 , Y10T29/49014
摘要： The present invention is generally directed to various methods of processing substrates based upon the substrate orientation. In one embodiment, the method comprises determining a defective die pattern of a process tool based upon an orientation of a semiconducting substrate in the tool during processing operations, positioning at least one subsequently processed semiconducting substrate in the process tool at an orientation selected to minimize defective die produced by the process tool, the selected orientation being based upon the determined defective die pattern of the process tool, and performing processing operations in the process tool on at least one subsequently processed substrate while at least one substrate is positioned in the process tool at the selected orientation. In another illustrative embodiment, the method comprises providing a plurality of semiconducting substrates to a processing tool, positioning each of the substrates within the tool at a selected orientation such that at least one electrical performance characteristic of at least one device formed on each of the substrates is optimized when a process operation is performed thereon in the process tool, and performing the processing operation on each of the substrates in the tool while each of the substrates is positioned at the selected orientation.
摘要翻译：本发明一般涉及基于衬底取向处理衬底的各种方法。在一个实施例中，该方法包括基于处理操作期间工具中的半导体衬底的取向来确定工艺工具的有缺陷的芯片图案，将处理工具中的至少一个随后处理的半导体衬底以选择为使缺陷最小化的方向由工艺工具生产的模具，所选择的取向基于所确定的处理工具的有缺陷的模具图案，并且在至少一个随后处理的基板上的处理工具中执行处理操作，同时至少一个基板位于处理工具中所选方向。在另一示例性实施例中，该方法包括向处理工具提供多个半导体衬底，将工件中的每个衬底以选定的取向定位，使得在每个衬底上形成至少一个器件的至少一个电性能特征当在处理工具中对其进行处理操作时进行优化，并且在每个基板位于所选取向的同时对工具中的每个基板执行处理操作。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式