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1. 发明授权

US09329620B2 Circuit for generating peripheral clock for USB and method therefor 有权
标题翻译：用于生成USB外设时钟的电路及其方法
公开(公告)号：US09329620B2
公开(公告)日：2016-05-03
申请号：US14082137
申请日：2013-11-16
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Xiu Yang
IPC分类号： G06F1/00 , G06F1/04
CPC分类号： G06F1/04
摘要： A circuit for generating a peripheral clock for USB, provided on a USB major structure, comprises an internal oscillator, a receiver, a transmitter, a clock counter, and a clock processor; wherein the internal oscillator generates a clock having a settled frequency; the receiver is connected with the internal oscillator and a system unit, and receives a packet transmitted by the system unit; the transmitter is connected with the internal oscillator and the system unit, and transmits a packet of the USB major structure to the system unit; the clock counter is connected with the receiver and the internal oscillator, and counts a length of the packet received; and the clock processor is connected with the clock counter, the internal oscillator, and the transmitter, and controls and adjusts a length of the packet transmitted by the transmitter according to the length of the packet counted by the clock counter.
摘要翻译：一种用于生成用于USB的外围时钟的电路，提供在USB主要结构上，包括内部振荡器，接收器，发射器，时钟计数器和时钟处理器; 其中所述内部振荡器产生具有稳定频率的时钟; 接收机与内部振荡器和系统单元连接，并接收由系统单元发送的分组; 发射机与内部振荡器和系统单元连接，并将USB主结构的数据包发送到系统单元; 时钟计数器与接收器和内部振荡器连接，并对接收到的分组的长度进行计数; 并且时钟处理器与时钟计数器，内部振荡器和发送器连接，并且根据由时钟计数器计数的分组的长度来控制和调整由发送器发送的分组的长度。

2. 发明申请

US20150254975A1 SMART MOBILE TERMINAL REMOTE CONTROL SYSTEM 审中-公开
标题翻译：智能移动终端远程控制系统
公开(公告)号：US20150254975A1
公开(公告)日：2015-09-10
申请号：US14719249
申请日：2015-05-21
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Zhengxian ZOU , Xiaolin XIE
IPC分类号： G08C23/04
CPC分类号： G08C23/04 , G08C2201/30 , G08C2201/93
摘要： A smart mobile terminal remote control system includes a smart mobile terminal, a displaying device, a remote controller and a controller, the displaying device is configured to display an operation interface of the smart mobile terminal in real time, the controller is connected to the smart mobile terminal and the remote controller respectively and configured to emit an infrared light and receive the infrared light reflected by the remote controller, obtain information of the remote controller according to the infrared light received, generate a control command according to the information, and send the control command to the smart mobile terminal which responds to the control command. The smart mobile terminal remote control system makes the smart mobile terminal transfer data to other displaying devices smoothly and get a better displaying effect.
摘要翻译：一种智能移动终端遥控系统，包括智能移动终端，显示装置，遥控器和控制器，所述显示装置被配置为实时地显示所述智能移动终端的操作界面，所述控制器连接到所述智能移动终端和遥控器分别配置为发射红外光并接收由遥控器反射的红外光，根据所接收的红外光获得遥控器的信息，根据该信息生成控制命令，并发送控制命令到响应控制命令的智能移动终端。智能移动终端遥控系统使得智能移动终端平滑地将数据传输到其他显示设备，并获得更好的显示效果。

3. 发明授权

US09083357B2 Frequency locking system 有权
公开(公告)号：US09083357B2
公开(公告)日：2015-07-14
申请号：US14515396
申请日：2014-10-15
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Ziche Zhang
IPC分类号： H03L7/089 , H03L7/091 , H03L7/097 , H04L7/033
CPC分类号： H03L7/0891 , H03L7/091 , H03L7/097 , H03L7/102 , H04L7/033 , H04L7/0331
摘要： A frequency locking system for locking a clock frequency in a CDR circuit without crystal oscillator is provided. Reference data information is inputted into a first low-pass filter; the first low-pass filter is connected to a first swing detector; the first swing detector is connected to a non-inverting terminal of a comparator; an output terminal of the comparator is connected to a charge pump; the charge pump is connected to a first terminal of a capacitor; the capacitor is grounded. The capacitor is also connected to a voltage-controlled oscillator; the voltage-controlled oscillator is connected to a code pattern conversion generator; the code pattern conversion generator is connected to of a second low-pass filter; the second low-pass filter is connected to an input terminal of a second swing detector; an output terminal of the second swing detector is connected to an inverting terminal of the comparator.

4. 发明申请

US20150002193A1 Driver having low power consumption and method thereof 审中-公开
公开(公告)号：US20150002193A1
公开(公告)日：2015-01-01
申请号：US13963389
申请日：2013-08-09
申请人： IPGOAL MICROELECTRONICS (SICHUAN) CO., LTD.
发明人： Fangping Fan
IPC分类号： G05F3/24
CPC分类号： H03F3/45183
摘要： A driver having low power consumption includes a first input terminal, a second input terminal, an output terminal, a power supply terminal, a ground terminal, a driving circuit, an adjusting circuit connected to the driving circuit and a biasing circuit which is connected to the driving circuit and the adjusting circuit. A method for accomplishing low power consumption of a driver is also provided. The method accomplishes an object of low power consumption by dynamically adjusting a driving current of a driver according to a difference between inputted differential signals.

5. 发明授权

US08890732B2 Sampling circuit for ADC 有权
公开(公告)号：US08890732B2
公开(公告)日：2014-11-18
申请号：US14060510
申请日：2013-10-22
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Baoding Yang
IPC分类号： H03M1/00 , H03M1/12
CPC分类号： G11C27/024
摘要： A sampling circuit for ADC includes an external input terminal, a sampling circuit and an auxiliary circuit which are connected with the external input terminal, a clock circuit and an external output terminal which are connected with the sampling circuit, and a clock feedthrough circuit connected with the auxiliary circuit, wherein the clock feedthrough circuit is respectively connected with the clock circuit and the external output terminal. The sampling circuit for ADC of the present invention decreases the impact of clock feedthrough on signal sampling, improves linearity of sampling FET, reduces harmonic distortion of the sampling circuit and improves sampling speed thereof, and improves sampling accuracy of the sampling circuit for ADC.

6. 发明申请

US20140176241A1 High-frequency bandwidth amplifying circuit 审中-公开
标题翻译：高频带宽放大电路
公开(公告)号：US20140176241A1
公开(公告)日：2014-06-26
申请号：US14062756
申请日：2013-10-24
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Ziche Zhang
IPC分类号： H03F3/26 , H03F3/193
CPC分类号： H03F3/195 , H03F3/3016 , H03F2200/294 , H03F2203/30031
摘要： A high-frequency bandwidth amplifier circuit comprises: a push-pull amplifier, a feedback resistor, a first active inductor, and a second active inductor. An input terminal of the push-pull amplifier is connected with an external input terminal. An output terminal of the push-pull amplifier is connected with an output port. A first end of the feedback resistor is connected with the external input terminal A second end of the feedback resistor is connected with the output port. A first end of the first active inductor is connected with an external power source. A second end of the first active inductor is connected with the output port. A first end of the second active inductor is grounded. A second end of the second active inductor is connected with the output port.
摘要翻译：高频带宽放大器电路包括：推挽放大器，反馈电阻器，第一有源电感器和第二有源电感器。推挽放大器的输入端与外部输入端连接。推挽放大器的输出端与输出端口连接。反馈电阻的第一端与外部输入端子A连接反馈电阻的第二端与输出端口连接。第一有源电感器的第一端与外部电源连接。第一个有源电感的第二端与输出端口相连。第二有源电感器的第一端接地。第二有源电感器的第二端与输出端口连接。

7. 发明授权

US08729933B2 Frequency multiplier circuit with function of automatically adjusting duty cycle of output signal and system thereof 有权
标题翻译：具有自动调节输出信号占空比功能的倍频电路及其系统
公开(公告)号：US08729933B2
公开(公告)日：2014-05-20
申请号：US13857972
申请日：2013-04-05
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Fangping Fan
IPC分类号： H03B19/00 , H03B19/10 , H03K5/156
CPC分类号： H03K5/1565 , H03B19/10
摘要： A frequency multiplier circuit with a function of automatically adjusting a duty cycle of an output signal includes an input terminal, a first detecting unit, a second detection unit, a duty cycle adjusting unit and a ground terminal; wherein the frequency multiplier control unit includes a first buffer, an AND gate, a first NOR gate and a second NOR gate; wherein the first detecting unit includes an inverter, a first resistance and a first capacitance; wherein the second detecting unit includes a second buffer, a second resistance and a second capacitance; wherein the duty cycle adjusting unit includes a comparator connected to the first resistance, the first capacitance, the second resistance, the second capacitance and the first buffer. The present invention also provides a frequency multiplier system thereof. The present invention is capable of automatically adjusting a duty cycle of an output signal to 50%.
摘要翻译：具有自动调整输出信号占空比的功能的倍频电路包括输入端子，第一检测单元，第二检测单元，占空比调节单元和接地端子; 其中所述倍频器控制单元包括第一缓冲器，与门，第一或非门和第二或非门; 其中所述第一检测单元包括反相器，第一电阻和第一电容; 其中所述第二检测单元包括第二缓冲器，第二电阻和第二电容; 其中所述占空比调整单元包括连接到所述第一电阻，所述第一电容，所述第二电阻，所述第二电容和所述第一缓冲器的比较器。本发明还提供一种其倍增器系统。本发明能够将输出信号的占空比自动调整为50％。

8. 发明申请

US20140133532A1 Serial data transmission system and method 审中-公开
标题翻译：串行数据传输系统及方法
公开(公告)号：US20140133532A1
公开(公告)日：2014-05-15
申请号：US14079384
申请日：2013-11-13
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Zhaolei Wu
IPC分类号： H04L1/24
CPC分类号： H04L1/24
摘要： A serial data transmission system includes a sending terminal for sending data, a receiving terminal for receiving the data sent by the sending terminal, a first connecting capacitor connected between the sending terminal and the receiving terminal, and a second connected capacitor connected between the sending terminal and the receiving terminal. The sending terminal includes a sending terminal driving unit, and an amplitude detecting unit connected to the sending terminal driving unit. The sending terminal driving unit outputs a pair of differential signals according to signals of the received data. The amplitude detecting unit detects changes in amplitudes of the differential signals outputted by the sending terminal driving unit, and outputs an indicating signal for indicating whether the sending terminal is properly connected to the receiving terminal. A serial data transmission method is further provided.
摘要翻译：串行数据传输系统包括用于发送数据的发送终端，用于接收由发送终端发送的数据的接收终端，连接在发送终端与接收终端之间的第一连接电容器和连接在发送终端之间的第二连接电容器和接收终端。发送终端包括发送终端驱动单元和连接到发送终端驱动单元的振幅检测单元。发送终端驱动单元根据接收到的数据的信号输出一对差分信号。振幅检测单元检测由发送终端驱动单元输出的差分信号的振幅的变化，并且输出用于指示发送终端是否正确连接到接收终端的指示信号。还提供串行数据传输方法。

9. 发明申请

US20230127794A1 BANDGAP REFERENCE STARTING CIRCUIT WITH ULTRA-LOW POWER CONSUMPTION 有权
公开(公告)号：US20230127794A1
公开(公告)日：2023-04-27
申请号：US18069727
申请日：2022-12-21
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Xiaoyu Li , Xiangyang Guo
IPC分类号： G05F1/565 , G05F3/26
摘要： A bandgap reference starting circuit with ultra-low power consumption includes a current generating unit and a first bias voltage generating unit respectively connected with a power supply voltage. The current generating unit generates an nA-level current and a starting voltage for the first bias voltage generating unit. The first bias voltage generating unit is started and generates a first bias voltage according to the starting voltage, and output the first bias voltage to a bandgap reference circuit to start up the bandgap reference circuit. The starting circuit can normally start up a bandgap reference circuit of nA level, and has an nA-level working current, thereby reducing power consumption and saving the cost.

10. 发明授权

US09166749B2 Serial data transmission system and method 有权
标题翻译：串行数据传输系统及方法
公开(公告)号：US09166749B2
公开(公告)日：2015-10-20
申请号：US14079384
申请日：2013-11-13
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Zhaolei Wu
IPC分类号： G06F3/00 , G06F13/00 , G06F13/42 , H04L1/24
CPC分类号： H04L1/24
摘要： A serial data transmission system includes a sending terminal for sending data, a receiving terminal for receiving the data sent by the sending terminal, a first connecting capacitor connected between the sending terminal and the receiving terminal, and a second connected capacitor connected between the sending terminal and the receiving terminal. The sending terminal includes a sending terminal driving unit, and an amplitude detecting unit connected to the sending terminal driving unit. The sending terminal driving unit outputs a pair of differential signals according to signals of the received data. The amplitude detecting unit detects changes in amplitudes of the differential signals outputted by the sending terminal driving unit, and outputs an indicating signal for indicating whether the sending terminal is properly connected to the receiving terminal. A serial data transmission method is further provided.
摘要翻译：串行数据传输系统包括用于发送数据的发送终端，用于接收由发送终端发送的数据的接收终端，连接在发送终端与接收终端之间的第一连接电容器和连接在发送终端之间的第二连接电容器和接收终端。发送终端包括发送终端驱动单元和连接到发送终端驱动单元的振幅检测单元。发送终端驱动单元根据接收到的数据的信号输出一对差分信号。振幅检测单元检测由发送终端驱动单元输出的差分信号的振幅的变化，并且输出用于指示发送终端是否正确连接到接收终端的指示信号。还提供串行数据传输方法。

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