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1. 发明授权

US09329620B2 Circuit for generating peripheral clock for USB and method therefor 有权
标题翻译：用于生成USB外设时钟的电路及其方法
公开(公告)号：US09329620B2
公开(公告)日：2016-05-03
申请号：US14082137
申请日：2013-11-16
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Xiu Yang
IPC分类号： G06F1/00 , G06F1/04
CPC分类号： G06F1/04
摘要： A circuit for generating a peripheral clock for USB, provided on a USB major structure, comprises an internal oscillator, a receiver, a transmitter, a clock counter, and a clock processor; wherein the internal oscillator generates a clock having a settled frequency; the receiver is connected with the internal oscillator and a system unit, and receives a packet transmitted by the system unit; the transmitter is connected with the internal oscillator and the system unit, and transmits a packet of the USB major structure to the system unit; the clock counter is connected with the receiver and the internal oscillator, and counts a length of the packet received; and the clock processor is connected with the clock counter, the internal oscillator, and the transmitter, and controls and adjusts a length of the packet transmitted by the transmitter according to the length of the packet counted by the clock counter.
摘要翻译：一种用于生成用于USB的外围时钟的电路，提供在USB主要结构上，包括内部振荡器，接收器，发射器，时钟计数器和时钟处理器; 其中所述内部振荡器产生具有稳定频率的时钟; 接收机与内部振荡器和系统单元连接，并接收由系统单元发送的分组; 发射机与内部振荡器和系统单元连接，并将USB主结构的数据包发送到系统单元; 时钟计数器与接收器和内部振荡器连接，并对接收到的分组的长度进行计数; 并且时钟处理器与时钟计数器，内部振荡器和发送器连接，并且根据由时钟计数器计数的分组的长度来控制和调整由发送器发送的分组的长度。

2. 发明授权

US09535449B2 Circuit for generating USB peripheral clock and method therefor 有权
标题翻译：用于生成USB外设时钟的电路及其方法
公开(公告)号：US09535449B2
公开(公告)日：2017-01-03
申请号：US14084467
申请日：2013-11-19
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Xiu Yang
IPC分类号： G06F1/00 , G06F1/04
CPC分类号： G06F1/04
摘要： A circuit for generating USB peripheral clock comprises: an internal oscillator, a controllable frequency divider, a frequency multiplier, a receiving counter and a frequency division controller, wherein the internal oscillator generates a clock having a fixed frequency; the controllable frequency divider processes frequency division on the clock generated by the internal oscillator; the frequency multiplier processes frequency multiplication on the clock after frequency division and transmits the clock after frequency multiplication to the USB main structure; the receiving counter receives an SOF packet which is transmitted by a host according to the clock outputted by the frequency multiplier, and counts intervals of receiving the SOF packet; and the frequency division controller compares the difference between the counting result of the receiving counter and a standard interval, controls and regulates frequency division parameters of the controllable frequency divider according to a comparing result thereof.
摘要翻译：一种用于产生USB外围时钟的电路包括：内部振荡器，可控分频器，倍频器，接收计数器和分频控制器，其中内部振荡器产生具有固定频率的时钟; 可控分频器对由内部振荡器产生的时钟进行分频; 倍频器在分频后对时钟进行倍频，并将倍频后的时钟发送到USB主机结构; 接收计数器接收根据由倍频器输出的时钟由主机发送的SOF分组，并计数接收该SOF分组的间隔; 并且分频控制器将接收计数器的计数结果与标准间隔之间的差进行比较，根据其比较结果来控制和调节可控分频器的分频参数。

3. 发明申请

US20140143583A1 Circuit for generating USB peripheral clock and method therefor 审中-公开
标题翻译：用于生成USB外设时钟的电路及其方法
公开(公告)号：US20140143583A1
公开(公告)日：2014-05-22
申请号：US14084467
申请日：2013-11-19
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Xiu Yang
IPC分类号： G06F1/04
CPC分类号： G06F1/04
摘要： A circuit for generating USB peripheral clock comprises: an internal oscillator, a controllable frequency divider, a frequency multiplier, a receiving counter and a frequency division controller, wherein the internal oscillator generates a clock having a fixed frequency; the controllable frequency divider processes frequency division on the clock generated by the internal oscillator; the frequency multiplier processes frequency multiplication on the clock after frequency division and transmits the clock after frequency multiplication to the USB main structure; the receiving counter receives an SOF packet which is transmitted by a host according to the clock outputted by the frequency multiplier, and counts intervals of receiving the SOF packet; and the frequency division controller compares the difference between the counting result of the receiving counter and a standard interval, controls and regulates frequency division parameters of the controllable frequency divider according to a comparing result thereof.
摘要翻译：一种用于产生USB外围时钟的电路包括：内部振荡器，可控分频器，倍频器，接收计数器和分频控制器，其中内部振荡器产生具有固定频率的时钟; 可控分频器对由内部振荡器产生的时钟进行分频; 倍频器在分频后对时钟进行倍频，并将倍频后的时钟发送到USB主机结构; 接收计数器接收根据由倍频器输出的时钟由主机发送的SOF分组，并计数接收该SOF分组的间隔; 并且分频控制器将接收计数器的计数结果与标准间隔之间的差进行比较，根据其比较结果来控制和调节可控分频器的分频参数。

4. 发明授权

US09429979B2 Circuit and method for producing USB host working clock 有权
公开(公告)号：US09429979B2
公开(公告)日：2016-08-30
申请号：US14141186
申请日：2013-12-26
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Xiu Yang
IPC分类号： G06F1/04 , G06F1/08 , G06F1/12 , G06F11/16 , H03L7/00
CPC分类号： G06F1/04 , G06F1/08 , G06F2213/0042 , H03L7/00
摘要： A circuit for producing USB host working clock comprises: an internal oscillator, a controllable frequency divider, a frequency multiplier, a USB host interface, and a frequency division controller. According to the frequency multiplier providing clock, the USB host interface configures with USB peripherals for responding. The frequency division controller is connected to the USB host interface and the controllable frequency divider. The USB host interface transmits a response result that the USB host interface configures with USB peripherals for responding to the frequency division controller. According to the USB host interface feeding back the response result, the frequency division controller regulates a frequency dividing ratio of the controllable frequency divider in set scope of the frequency dividing ratio. After regulating the frequency dividing ratio of the controllable frequency divider, the frequency division controller controls the controllable frequency divider that is processed with frequency division in fixed frequency dividing ratio.

5. 发明申请

US20150117590A1 Shift frequency demultiplier 审中-公开
标题翻译：移位分频器
公开(公告)号：US20150117590A1
公开(公告)日：2015-04-30
申请号：US14141202
申请日：2013-12-26
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Xiu Yang
IPC分类号： H03K23/54
CPC分类号： H03K23/54
摘要： A shift frequency demultiplier includes: an inverter; N-2 registers; and N-4 OR gates; wherein an output terminal of the No. N-2 register is connected to an input terminal of the inverter, an output terminal of the inverter is connected to an input terminal of the No. 1 register and input terminals of the OR gates; the output terminal of the No. 1 register is connected to another input terminal of the No. 1 OR gate, the output terminal of the No. N-4 register is connected to another input terminal of the No. N-4 OR gate; an output terminal of the No. 1 OR gate is connected to the input terminal of the No. 2 register, an output terminal of the No. N-4 OR gate is connected to the input terminal of the No. N-3 register whose the output terminal is connected to an input terminal of the No. N-2 register.
摘要翻译：移位分频器包括：逆变器; N-2个寄存器; 和N-4 OR门; 其特征在于，所述N-2寄存器的输出端子与所述逆变器的输入端子连接，所述逆变器的输出端子连接到所述1号寄存器的输入端子和所述OR门的输入端子; 1号寄存器的输出端子连接到1号或门的另一输入端子，N-4号寄存器的输出端子连接到N-4或门的另一个输入端子; 1号或门的输出端连接到第2号寄存器的输入端，第N-4或门的输出端连接到第N-3号寄存器的输入端输出端子连接到No.N-2寄存器的输入端子。

6. 发明申请

US20150082073A1 Circuit and method for producing USB host working clock 审中-公开
标题翻译：生产USB主机工作时钟的电路及方法
公开(公告)号：US20150082073A1
公开(公告)日：2015-03-19
申请号：US14141186
申请日：2013-12-26
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Xiu Yang
IPC分类号： G06F1/04
CPC分类号： G06F1/04 , G06F1/08 , G06F2213/0042 , H03L7/00
摘要： A circuit for producing USB host working clock comprises: an internal oscillator, a controllable frequency divider, a frequency multiplier, a USB host interface, and a frequency division controller. According to the frequency multiplier providing clock, the USB host interface configures with USB peripherals for responding. The frequency division controller is connected to the USB host interface and the controllable frequency divider. The USB host interface transmits a response result that the USB host interface configures with USB peripherals for responding to the frequency division controller. According to the USB host interface feeding back the response result, the frequency division controller regulates a frequency dividing ratio of the controllable frequency divider in set scope of the frequency dividing ratio. After regulating the frequency dividing ratio of the controllable frequency divider, the frequency division controller controls the controllable frequency divider that is processed with frequency division in fixed frequency dividing ratio.
摘要翻译：一种用于产生USB主机工作时钟的电路包括：内部振荡器，可控分频器，倍频器，USB主机接口和分频控制器。根据提供时钟的倍频器，USB主机接口配置USB外设进行响应。分频控制器连接到USB主机接口和可控分频器。 USB主机接口传送USB主机接口与USB外设配置的响应结果，以响应分频控制器。根据USB主机接口反馈响应结果，分频控制器调节分频比设定范围内可控分频器的分频比。调节可控分频器的分频比后，分频控制器以固定分频比对分频进行控制的可控分频器进行控制。

7. 发明申请

US20140143584A1 Circuit for generating peripheral clock for USB and method therefor 审中-公开
标题翻译：用于生成USB外设时钟的电路及其方法
公开(公告)号：US20140143584A1
公开(公告)日：2014-05-22
申请号：US14082137
申请日：2013-11-16
申请人： IPGoal Microelectronics (Sichuan) Co., Ltd.
发明人： Xiu Yang
IPC分类号： G06F1/04
CPC分类号： G06F1/04
摘要： A circuit for generating a peripheral clock for USB, provided on a USB major structure, comprises an internal oscillator, a receiver, a transmitter, a clock counter, and a clock processor; wherein the internal oscillator generates a clock having a settled frequency; the receiver is connected with the internal oscillator and a system unit, and receives a packet transmitted by the system unit; the transmitter is connected with the internal oscillator and the system unit, and transmits a packet of the USB major structure to the system unit; the clock counter is connected with the receiver and the internal oscillator, and counts a length of the packet received; and the clock processor is connected with the clock counter, the internal oscillator, and the transmitter, and controls and adjusts a length of the packet transmitted by the transmitter according to the length of the packet counted by the clock counter.
摘要翻译：一种用于生成用于USB的外围时钟的电路，提供在USB主要结构上，包括内部振荡器，接收器，发射器，时钟计数器和时钟处理器; 其中所述内部振荡器产生具有稳定频率的时钟; 接收机与内部振荡器和系统单元连接，并接收由系统单元发送的分组; 发射机与内部振荡器和系统单元连接，并将USB主结构的数据包发送到系统单元; 时钟计数器与接收器和内部振荡器连接，并对接收到的分组的长度进行计数; 并且时钟处理器与时钟计数器，内部振荡器和发送器连接，并且根据由时钟计数器计数的分组的长度来控制和调整由发送器发送的分组的长度。

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