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1. 发明申请

US20120204424A1 METHOD FOR MANUFACTURING WIRING BOARD 有权
公开(公告)号：US20120204424A1
公开(公告)日：2012-08-16
申请号：US13457188
申请日：2012-04-26
申请人： Yuji YUKIIRI , Izumi Tanaka
发明人： Yuji YUKIIRI , Izumi Tanaka
IPC分类号： H01B19/00
CPC分类号： H05K3/0035 , H05K1/0366 , H05K3/421 , H05K3/4644 , H05K2201/0209 , H05K2201/09563 , H05K2203/0191 , H05K2203/0264 , H05K2203/066 , H05K2203/1383
摘要： There is prepared an insulation layer generation member having a support film and a semi-cured insulation layer provided on a surface of the support film. Subsequently, the insulation layer generation member is affixed to a pad such that the pad contacts the semi-cured insulation layer. The semi-cured insulation layer is cured, to thus generate an insulation layer. Subsequently, the insulation layer is exposed to laser by way of the support film, thereby opening an opening in the insulation layer.

2. 发明申请

US20120196074A1 GRAPHENE SHEET AND METHOD FOR PRODUCING THE SAME 有权
标题翻译：石墨片及其制造方法
公开(公告)号：US20120196074A1
公开(公告)日：2012-08-02
申请号：US13393249
申请日：2010-08-31
申请人： Hiroki Ago , Yoshito Ito , Izumi Tanaka , Seigi Mizuno , Masaharu Tsuji
发明人： Hiroki Ago , Yoshito Ito , Izumi Tanaka , Seigi Mizuno , Masaharu Tsuji
IPC分类号： B32B15/04 , B32B9/00 , C23C16/26 , C01B31/00 , B82Y40/00 , B82Y30/00
CPC分类号： B82Y40/00 , B82Y30/00 , C01B32/188 , C01B2204/02 , C01B2204/04 , C01B2204/32 , Y10T428/21 , Y10T428/24777 , Y10T428/26 , Y10T428/31678
摘要： To provide a graphene sheet that has a large area, is homogeneous, and has a small amount of domain boundaries, a novel method for producing a graphene sheet suitable for industrial applications, such as application to electronics, that is capable of producing a graphene sheet that has well aligned crystal orientation at a low cost, and a graphene sheet.In the method for producing a graphene sheet of the present invention, a substrate containing a single crystal substrate having formed on the surface thereof an epitaxial metal film is used, and a graphene sheet is grown by making a carbon material into contact with the surface of the epitaxial metal film. In the graphene sheet of the present invention, the graphene sheet is constituted by a number of graphene domains, the domains each have an area of from 0.000001 μm2 to 100,000 mm2, and the orientations of 6-membered rings in the domains are averagely aligned in a single direction over the graphene sheet.
摘要翻译：为了提供具有大面积，均匀的并且具有少量结构域边界的石墨烯片，制备适于工业应用的石墨烯片的新方法，例如应用于电子学，其能够生产石墨烯片以低成本具有良好排列的晶体取向和石墨烯片。在本发明的石墨烯片的制造方法中，使用含有在其表面形成有外延金属膜的单晶基板的基板，通过使碳材料与外延金属膜。在本发明的石墨烯片中，石墨烯片由多个石墨烯畴组成，各畴的面积为0.000001μm2〜100,000mm 2，畴中的6元环的取向平均排列在石墨烯片上的单一方向。

3. 发明授权

US08196296B2 Method for manufacturing wiring board 有权
标题翻译：线路板制造方法
公开(公告)号：US08196296B2
公开(公告)日：2012-06-12
申请号：US12250755
申请日：2008-10-14
申请人： Yuji Yukiiri , Izumi Tanaka
发明人： Yuji Yukiiri , Izumi Tanaka
IPC分类号： H05K3/02 , H05K3/10
CPC分类号： H05K3/0035 , H05K1/0366 , H05K3/421 , H05K3/4644 , H05K2201/0209 , H05K2201/09563 , H05K2203/0191 , H05K2203/0264 , H05K2203/066 , H05K2203/1383
摘要： There is prepared an insulation layer generation member having a support film and a semi-cured insulation layer provided on a surface of the support film. Subsequently, the insulation layer generation member is affixed to a pad such that the pad contacts the semi-cured insulation layer. The semi-cured insulation layer is cured, to thus generate an insulation layer. Subsequently, the insulation layer is exposed to laser by way of the support film, thereby opening an opening in the insulation layer.
摘要翻译：制备了具有支撑膜和设置在支撑膜的表面上的半固化绝缘层的绝缘层产生构件。随后，绝缘层产生件被固定到垫上，使得焊盘接触半固化绝缘层。半固化绝缘层被固化，从而产生绝缘层。随后，通过支撑膜将绝缘层暴露于激光，从而在绝缘层中打开开口。

4. 发明授权

US08049463B2 Stacked battery module and battery pack 有权
标题翻译：堆叠电池模块和电池组
公开(公告)号：US08049463B2
公开(公告)日：2011-11-01
申请号：US11604239
申请日：2006-11-27
申请人： Tomokazu Kumeuchi , Koichi Zama , Isao Tochihara , Izumi Tanaka
发明人： Tomokazu Kumeuchi , Koichi Zama , Isao Tochihara , Izumi Tanaka
IPC分类号： H02J7/00
CPC分类号： H02J7/0029 , H01M2/1653 , H01M4/505 , H01M10/0525 , H01M10/441
摘要： A stacked battery module or a battery pack is formed by laying a plurality of unit batteries of non-aqueous electrolyte batteries in layers with the surfaces thereof having a large area disposed vis-à-vis and electrically connecting them in series and a temperature fuse is arranged in the central part of the stacked battery module with one of its terminals connected to either the positive electrode terminal or the negative electrode terminal of the stacked battery module while the other terminal connected to a charging terminal for supplying a charging current in a charging operation. One of the terminals of the stacked battery module is connected to a discharging terminal for taking out a discharging current in a discharging operation and the other terminal of the stacked battery module is a common terminal for charging and discharging operations.
摘要翻译：堆叠的电池模块或电池组通过将非水电解质电池的多个单元电池分层放置而形成，其中具有大面积的表面相对于它们串联布置并电连接，并且温度保险丝布置在堆叠电池模块的中心部分，其一个端子连接到堆叠电池模块的正极端子或负极端子，而另一端子连接到充电端子，用于在充电操作中提供充电电流。叠层电池模块的一个端子连接到放电端子，用于在放电操作中取出放电电流，并且堆叠的电池模块的另一个端子是用于充电和放电操作的公共端子。

5. 发明授权

US4500899A Semiconductor memory device and process for producing the same 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US4500899A
公开(公告)日：1985-02-19
申请号：US333652
申请日：1981-12-23
申请人： Kazunari Shirai , Izumi Tanaka
发明人： Kazunari Shirai , Izumi Tanaka
IPC分类号： H01L29/78 , H01L21/76 , H01L21/82 , H01L21/8246 , H01L21/8247 , H01L27/112 , H01L29/788 , H01L29/792 , H01L27/02 , H01L27/10
CPC分类号： H01L27/11206 , H01L27/112
摘要： The present invention is an improvement of a semiconductor memory device, preferably a PROM or a mask ROM, wherein: MOS transistors are formed in a semiconductor substrate, are arranged in rows, and are isolated from each other by a plurality of field insulation films arranged in an island pattern; the MOS transistors aligned in one of the rows have one common gate which extends over one row of field insulation films; the MOS transistors aligned in one of the rows have a common first region for forming a drain or a source parallel to the common gates; and a second region for forming another drain or source is surrounded by a pair of common gates and a pair of field insulation films so that a plurality of second regions are isolated from each other. According to the present invention, the field insulation films and the common gates are delineated to coincide with one another at the ends thereof facing the common first region using a mask film extending between a pair of common gates and covering the region between the pair of common gates and the part of the common gates not covered by the mask film.
摘要翻译：本发明是半导体存储器件，优选PROM或掩模ROM的改进，其中：MOS晶体管形成在半导体衬底中，排列成行，并且通过多个场绝缘膜彼此隔离布置在岛屿模式; 在一行中排列的MOS晶体管具有一个公共栅极，该栅极延伸超过一行场绝缘膜; 在一行中对准的MOS晶体管具有用于形成平行于公共栅极的漏极或源极的公共第一区域; 并且用于形成另一个漏极或源极的第二区域由一对公共栅极和一对场绝缘膜围绕，使得多个第二区域彼此隔离。根据本发明，使用在一对公共栅极之间延伸的掩模膜并且覆盖一对共同的一部分之间的区域来描绘场绝缘膜和公共栅极，使其在面向公共第一区域的端部处彼此重合门和公共门的部分未被掩模膜覆盖。

6. 发明授权

US4405995A Semiconductor memory drive 失效
标题翻译：半导体存储器驱动器
公开(公告)号：US4405995A
公开(公告)日：1983-09-20
申请号：US295617
申请日：1981-08-24
申请人： Kazunari Shirai , Izumi Tanaka
发明人： Kazunari Shirai , Izumi Tanaka
IPC分类号： H01L21/8247 , G11C16/04 , H01L29/788 , H01L29/792 , G11C11/40
CPC分类号： G11C16/0416 , H01L29/7881
摘要： An improved semiconductor memory device is provided, which has: (i) a first gate electrode in an electrically floating state, at least a part of which confronts a channel region of a semiconductor device and which is separated by an insulating layer from the channel region; (ii) a second gate electrode (i.e., a control electrode), at least a part of which confronts the first gate electrode and is separated by an insulating layer from the first gate electrode; and (iii) a third gate electrode (i.e., an erasing electrode), at least a part of which confronts the first gate electrode and is separated by an insulating layer from the first gate electrode. The insulating layer, separating at least a part of the erasing electrode from the first gate electrode, has a thickness (usually 50 to 300 A) sufficient to allow the passage of charges from the first gate electrode to the erasing electrode through a tunneling effect, thereby discharging the first gate electrode.
摘要翻译：提供了一种改进的半导体存储器件，其具有：（i）处于浮置状态的第一栅电极，其至少一部分面对半导体器件的沟道区并且被绝缘层与沟道区分隔开 ; （ii）第二栅电极（即，控制电极），其至少一部分面对第一栅电极并由绝缘层与第一栅电极分离; 和（iii）第三栅极电极（即，擦除电极），其中至少一部分面对第一栅电极并由绝缘层与第一栅电极隔开。将擦除电极的至少一部分与第一栅电极分离的绝缘层的厚度（通常为50〜300A），足以允许电荷通过隧道效应从第一栅电极通过到擦除电极，从而使第一栅电极放电。

7. 发明授权

US4271582A Process for producing a semiconductor device 失效
标题翻译：半导体装置的制造方法
公开(公告)号：US4271582A
公开(公告)日：1981-06-09
申请号：US70610
申请日：1979-08-29
申请人： Kazunari Shirai , Izumi Tanaka , Shinpei Tanaka , Keiji Nishimoto
发明人： Kazunari Shirai , Izumi Tanaka , Shinpei Tanaka , Keiji Nishimoto
IPC分类号： H01L29/78 , H01L21/28 , H01L21/3105 , H01L21/318 , H01L21/322 , H01L21/768 , H01L21/22
CPC分类号： H01L21/76802 , H01L21/3105 , H01L21/3185 , H01L21/3221 , H01L21/76877
摘要： In a method of smoothing the edges of a window through a PSG film of a semiconductor device, a masking film is provided under the PSG film, so as to prevent impurities of the PSG film from penetrating into semiconductor substrate during the heating of the PSG film for the smoothing of the edges. A masking film, for example, an Si.sub.3 N.sub.4 film, does not, however, inhibit the penetration of hydrogen gas, which can improve the properties of an MIS semiconductor device.
摘要翻译：在通过半导体器件的PSG膜平滑窗口的边缘的方法中，在PSG膜下面设置掩模膜，以便在PSG膜的加热期间防止PSG膜的杂质渗入半导体衬底用于平滑边缘。然而，掩模膜例如Si 3 N 4膜不会抑制氢气的渗透，这可以提高MIS半导体器件的性能。

8. 发明授权

US08561293B2 Method for manufacturing wiring board 有权
标题翻译：线路板制造方法
公开(公告)号：US08561293B2
公开(公告)日：2013-10-22
申请号：US13457188
申请日：2012-04-26
申请人： Yuji Yukiiri , Izumi Tanaka
发明人： Yuji Yukiiri , Izumi Tanaka
IPC分类号： H01K3/10
CPC分类号： H05K3/0035 , H05K1/0366 , H05K3/421 , H05K3/4644 , H05K2201/0209 , H05K2201/09563 , H05K2203/0191 , H05K2203/0264 , H05K2203/066 , H05K2203/1383
摘要： There is prepared an insulation layer generation member having a support film and a semi-cured insulation layer provided on a surface of the support film. Subsequently, the insulation layer generation member is affixed to a pad such that the pad contacts the semi-cured insulation layer. The semi-cured insulation layer is cured, to thus generate an insulation layer. Subsequently, the insulation layer is exposed to laser by way of the support film, thereby opening an opening in the insulation layer.
摘要翻译：制备了具有支撑膜和设置在支撑膜的表面上的半固化绝缘层的绝缘层产生构件。随后，绝缘层产生件被固定到垫上，使得焊盘接触半固化绝缘层。半固化绝缘层被固化，从而产生绝缘层。随后，通过支撑膜将绝缘层暴露于激光，从而在绝缘层中打开开口。

9. 发明授权

US4326213A Semiconductor device and process for producing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US4326213A
公开(公告)日：1982-04-20
申请号：US964514
申请日：1978-11-29
申请人： Kazunari Shirai , Izumi Tanaka
发明人： Kazunari Shirai , Izumi Tanaka
IPC分类号： H01L27/04 , G11C11/412 , H01L21/02 , H01L21/3205 , H01L21/822 , H01L21/8244 , H01L23/52 , H01L27/06 , H01L27/11 , H01L27/02
CPC分类号： H01L28/20 , G11C11/412 , H01L27/0688 , H01L27/1112 , Y10S257/903
摘要： A polycrystalline silicon is used for a resistor element of a semiconductor device instead of a conventional, diffused resistor or a channel resistor, in which the channel resistance of an MOS transistor is utilized as the resistor. The length of a polycrystalline silicon layer for the resistor element is predetermined by the other polycrystalline silicon layer, formed above the resistor element. The structure of the semiconductor device according to the present invention is suited for a high density integrated circuit.
摘要翻译：多晶硅用于半导体器件的电阻元件，而不是传统的扩散电阻器或沟道电阻器，其中MOS晶体管的沟道电阻用作电阻器。用于电阻元件的多晶硅层的长度由形成在电阻元件上方的另一个多晶硅层预定。根据本发明的半导体器件的结构适用于高密度集成电路。

10. 发明申请

US20120144666A1 METHOD FOR MANUFACTURING WIRING BOARD 审中-公开
标题翻译：制造接线板的方法
公开(公告)号：US20120144666A1
公开(公告)日：2012-06-14
申请号：US13399446
申请日：2012-02-17
申请人： Yuji YUKIIRI , Izumi Tanaka
发明人： Yuji YUKIIRI , Izumi Tanaka
IPC分类号： H05K3/10
CPC分类号： H05K3/0035 , H05K1/0366 , H05K3/421 , H05K3/4644 , H05K2201/0209 , H05K2201/09563 , H05K2203/0191 , H05K2203/0264 , H05K2203/066 , H05K2203/1383
摘要： There is prepared an insulation layer generation member having a support film and a semi-cured insulation layer provided on a surface of the support film. Subsequently, the insulation layer generation member is affixed to a pad such that the pad contacts the semi-cured insulation layer. The semi-cured insulation layer is cured, to thus generate an insulation layer. Subsequently, the insulation layer is exposed to laser by way of the support film, thereby opening an opening in the insulation layer.
摘要翻译：制备了具有支撑膜和设置在支撑膜的表面上的半固化绝缘层的绝缘层产生构件。随后，绝缘层产生件被固定到垫上，使得焊盘接触半固化绝缘层。半固化绝缘层被固化，从而产生绝缘层。随后，通过支撑膜将绝缘层暴露于激光，从而在绝缘层中打开开口。

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