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1. 发明申请

US20140217284A1 METHOD AND APPARATUS FOR DETECTING INFRARED RADIATION WITH GAIN 审中-公开
标题翻译：用于检测带增益的红外辐射的方法和装置
公开(公告)号：US20140217284A1
公开(公告)日：2014-08-07
申请号：US14129225
申请日：2012-07-02
申请人： Franky So , Do Young Kim , Jae Woong Lee , Bhabendra K. Pradhan
发明人： Franky So , Do Young Kim , Jae Woong Lee , Bhabendra K. Pradhan
IPC分类号： H01L31/09 , H01L51/44 , H01L31/18 , H01L27/32 , H04N5/33 , H01L51/00 , H01L31/0224 , H01L31/0352 , H01L51/56
CPC分类号： H01L27/3227 , H01L27/288 , H01L31/022466 , H01L31/022475 , H01L31/022491 , H01L31/035218 , H01L31/09 , H01L31/143 , H01L31/1804 , H01L31/1808 , H01L31/184 , H01L51/0047 , H01L51/0059 , H01L51/0078 , H01L51/0084 , H01L51/4213 , H01L51/422 , H01L51/442 , H01L51/5048 , H01L51/56 , H01L2031/0344 , H04N5/33 , Y02E10/549
摘要： Photodetectors, methods of fabricating the same, and methods using the same to detect radiation are described. A photodetector can include a first electrode, a light sensitizing layer, an electron blocking/tunneling layer, and a second electrode. Infrared-to-visible upconversion devices, methods of fabricating the same, and methods using the same to detect radiation are also described. An Infrared-to-visible upconversion device can include a photodetector and an OLED coupled to the photodetector.
摘要翻译：光检测器及其制造方法以及使用该检测器的方法来检测辐射。光检测器可以包括第一电极，光敏层，电子阻挡层/隧道层和第二电极。还描述了红外至可见上转换装置，其制造方法以及使用该上变频装置的方法来检测辐射。红外到可见的上转换装置可以包括耦合到光电检测器的光电检测器和OLED。

2. 发明申请

US20120217477A1 UP-CONVERSION DEVICE WITH BROAD BAND ABSORBER 有权
标题翻译：具有宽带吸收器的UP转换装置
公开(公告)号：US20120217477A1
公开(公告)日：2012-08-30
申请号：US13272928
申请日：2011-10-13
申请人： FRANKY SO , Do Young Kim , Bhabendra Pradhan , Jae Woong Lee
发明人： FRANKY SO , Do Young Kim , Bhabendra Pradhan , Jae Woong Lee
IPC分类号： H01L51/44 , B82Y15/00
CPC分类号： H01L51/426 , B82Y30/00 , H01L51/50 , H01L2251/5369 , Y02E10/549
摘要： Embodiments of the invention are directed to an IR photodetector that broadly absorbs electromagnetic radiation including at least a portion of the near infrared (NIR) spectrum. The IR photodetector comprises polydispersed QDs of PbS and/or PbSe. The IR photodetector can be included as a layer in an up-conversion device when coupled to a light emitting diode (LED) according to an embodiment of the invention.
摘要翻译：本发明的实施例涉及广泛地吸收包括至少一部分近红外（NIR）光谱的电磁辐射的IR光电检测器。 IR光电检测器包括PbS和/或PbSe的多分散QD。根据本发明的实施例，当耦合到发光二极管（LED）时，IR光电检测器可以被包括为上转换装置中的层。

3. 发明申请

US20110218337A1 LYOCELL FILAMENT FIBER AND CELLULOSE BASED TIRE CORD 审中-公开
标题翻译： LYOCELL纤维和纤维素基轮胎
公开(公告)号：US20110218337A1
公开(公告)日：2011-09-08
申请号：US12674357
申请日：2008-09-08
申请人： Gi-Woong Kim , So-Yeon Kwon , Ok-Hwa Jeon , Young-Se Oh , Jong-Cheol Jeong , Woo-Chul Kim , Il Chung , Jae-Woong Lee
发明人： Gi-Woong Kim , So-Yeon Kwon , Ok-Hwa Jeon , Young-Se Oh , Jong-Cheol Jeong , Woo-Chul Kim , Il Chung , Jae-Woong Lee
IPC分类号： C08B16/00
CPC分类号： D01F2/00 , B60C9/0042 , D01D10/06 , D02G3/48 , D10B2201/00
摘要： Disclosed are a lyocell filament fiber and a cellulose-based tire cord. The lyocell filament fibers and the cellulose based tire cord have good dimensional stability in a highly humid state and thus the tenacity, the elongation, and the modulus are superior to common cellulose based fibers, such as rayon and so on. Their property maintaining rate at the post manufacturing process is high and the processibility is good.
摘要翻译：公开了一种莱赛尔长丝纤维和一种基于纤维素的轮胎帘线。莱赛尔长丝纤维和基于纤维素的轮胎帘线在高湿度状态下具有良好的尺寸稳定性，因此强度，伸长率和模量优于通常的纤维素基纤维，例如人造丝等。后期制造过程中的物业维持率高，加工性好。

4. 发明申请

US20100244915A1 Clock signal generation circuit for reducuing current consumption, and semiconductor device having the same 有权
标题翻译：用于减少电流消耗的时钟信号发生电路和具有相同功能的半导体器件
公开(公告)号：US20100244915A1
公开(公告)日：2010-09-30
申请号：US12659881
申请日：2010-03-24
申请人： Sang-Hyuk Kwon , Byung Hoon Jeong , Jae Woong Lee
发明人： Sang-Hyuk Kwon , Byung Hoon Jeong , Jae Woong Lee
IPC分类号： H03L7/06
CPC分类号： H03L7/0812 , H03L7/07 , H03L7/0802
摘要： In an example embodiment, the semiconductor device includes a clock signal generation circuit. The clock signal generation circuit is configured to generate at least one control clock signal in response to an external clock signal and a read command signal. The clock signal generation circuit includes a plurality of delay circuits, and the clock signal generation circuit is configured to selectively disable at least one of the plurality of delay circuits to reduce power consumption.
摘要翻译：在示例性实施例中，半导体器件包括时钟信号产生电路。时钟信号生成电路被配置为响应于外部时钟信号和读取命令信号而生成至少一个控制时钟信号。时钟信号生成电路包括多个延迟电路，并且时钟信号生成电路被配置为选择性地禁用多个延迟电路中的至少一个以减少功耗。

5. 发明申请

US20090023764A1 Use of Pyrimidinedione Derivative for Preventing or Treating Hepatitis C 有权
标题翻译：吡嘧啶二酮衍生物用于预防或治疗丙型肝炎的用途
公开(公告)号：US20090023764A1
公开(公告)日：2009-01-22
申请号：US12278659
申请日：2007-02-08
申请人： Ho-Seok Kwon , Jae-Woong Lee , Sun-Hwan Lee , Young-Hee Lee , Jeong-Ho Joo , Sun-Gan Chung , Hyun-Tae Kim , Eui-Hwan Cho , Hyun-Nam Myung
发明人： Ho-Seok Kwon , Jae-Woong Lee , Sun-Hwan Lee , Young-Hee Lee , Jeong-Ho Joo , Sun-Gan Chung , Hyun-Tae Kim , Eui-Hwan Cho , Hyun-Nam Myung
IPC分类号： A61K31/513 , A61P31/12
CPC分类号： A61K31/505
摘要： A pyrimidinedione derivative of formula (I) or a pharmaceutically acceptable salt thereof exhibits excellent inhibitory activity against hepatitis C virus.
摘要翻译：式（I）的嘧啶二酮衍生物或其药学上可接受的盐对丙型肝炎病毒具有优异的抑制活性。

6. 发明授权

US07362635B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US07362635B2
公开(公告)日：2008-04-22
申请号：US11499156
申请日：2006-08-04
申请人： Kyung-Hyun Kim , Jae-Woong Lee
发明人： Kyung-Hyun Kim , Jae-Woong Lee
IPC分类号： G11C7/00 , G11C8/00
CPC分类号： G11C29/46 , G11C29/14
摘要： A semiconductor memory device includes a control signal generator for combining command signals applied from an external portion to generate a test signal; a set/reset signal generator for receiving a mode setting signal applied from an external portion in response to the test signal and generating a first set/reset signal when the mode setting signal is a signal that designates an individual set/reset; a test logic portion for storing and then outputting the mode setting signal in response to the test signal; a set/reset master signal generator for receiving the first set/reset signal to output a set/reset master signal for commonly controlling a test mode of internal blocks of the semiconductor memory device; and a test control signal generator for combining an output signal of the test logic portion to generate a plurality of control signals and generating the set/reset master signal as a plurality of test control signals in response to the plurality of control signals.
摘要翻译：半导体存储器件包括：控制信号发生器，用于组合从外部施加的命令信号以产生测试信号; 设置/复位信号发生器，用于响应于测试信号接收从外部施加的模式设置信号，并且当模式设置信号是指定单独设置/复位的信号时产生第一设置/复位信号; 测试逻辑部分，用于响应于测试信号存储并随后输出模式设置信号; 一个设置/复位主信号发生器，用于接收第一设置/复位信号以输出一个设置/复位主信号，用于共同控制半导体存储器件的内部块的测试模式; 以及测试控制信号发生器，用于组合测试逻辑部分的输出信号以产生多个控制信号，并且响应于多个控制信号，将设置/复位主信号生成为多个测试控制信号。

7. 发明申请

US20060146619A1 Semiconductor memory device and method for controlling the same 有权
标题翻译：半导体存储器件及其控制方法
公开(公告)号：US20060146619A1
公开(公告)日：2006-07-06
申请号：US11327247
申请日：2006-01-05
申请人： Min-Soo Kim , Myeong-O Kim , Jae-Woong Lee
发明人： Min-Soo Kim , Myeong-O Kim , Jae-Woong Lee
IPC分类号： G11C7/00 , G11C8/00 , G11C7/22 , G11C8/18
CPC分类号： G11C7/1066 , G11C7/22 , G11C7/222 , G11C11/4076
摘要： A control unit for a semiconductor memory device, a semiconductor memory device and a method for controlling the same. The control unit of a semiconductor memory device includes control signal circuits, each control signal circuit to receive a master signal and to generate at least one of a plurality of control signals in response to the master signal, each of the plurality of core control signals to be generated after a delay specific to the core control signals after a transition of the master signal, the plurality of control signals to control the semiconductor memory device.
摘要翻译：一种用于半导体存储器件的控制单元，半导体存储器件及其控制方法。半导体存储器件的控制单元包括控制信号电路，每个控制信号电路接收主信号并响应于主信号产生多个控制信号中的至少一个，多个核心控制信号中的每一个至在主信号转换之后的核心控制信号的特定延迟之后产生多个控制信号以控制半导体存储器件。

8. 发明授权

US06870205B2 Scalable hierarchical I/O line structure for a semiconductor memory device 有权
标题翻译：半导体存储器件的可分级I / O线结构
公开(公告)号：US06870205B2
公开(公告)日：2005-03-22
申请号：US10337693
申请日：2003-01-07
申请人： Jae-woong Lee , Jong-hak Won
发明人： Jae-woong Lee , Jong-hak Won
IPC分类号： H01L27/108 , G11C7/10 , G11C7/18 , G11C11/401 , G11C11/409 , G11C11/4097 , H01L21/8242 , H01L27/02 , H01L27/10
CPC分类号： G11C11/4097 , G11C7/18 , H01L27/0207
摘要： A semiconductor memory device having a hierarchical I/O line structure is provided. The semiconductor memory array includes a memory cell array which is divided into a plurality of sub-arrays by sub-word line driver areas and bit line sense amplifier areas; local input/output (I/O) lines which are arranged in the bit line sense amplifier areas; and global I/O lines which are arranged in the sub-word line driver areas, wherein at least one end of each of the local I/O lines is formed in a bit line sense amplifier area. The semiconductor memory device may also have a dummy bit line sense amplifier area capable of dividing local I/O lines in a bit line sense amplifier area, and can reduce the number of sub-word line driver areas such that the chip size can be reduced.
摘要翻译：提供具有分层I / O线结构的半导体存储器件。半导体存储器阵列包括存储单元阵列，其通过子字线驱动器区域和位线读出放大器区域被划分为多个子阵列; 布置在位线读出放大器区域中的本地输入/输出（I / O）线; 以及布置在子字线驱动器区域中的全局I / O线，其中每个本地I / O线的至少一端形成在位线读出放大器区域中。半导体存储器件还可以具有能够在位线读出放大器区域中分割本地I / O线的虚拟位线读出放大器区域，并且可以减少子字线驱动器区域的数量，使得芯片尺寸可以减小。

9. 发明授权

US06396766B1 Semiconductor memory architecture for minimizing input/output data paths 有权
标题翻译：半导体存储架构，用于最小化输入/输出数据路径
公开(公告)号：US06396766B1
公开(公告)日：2002-05-28
申请号：US09829650
申请日：2001-04-10
申请人： Jae-woong Lee
发明人： Jae-woong Lee
IPC分类号： G11C800
CPC分类号： G11C5/063 , G11C5/025
摘要： A semiconductor memory device comprising an architecture for minimizing the lengths of the I/O (input/output) data paths and the difference in length between the data paths. In one aspect, a semiconductor memory device comprises first and second pad groups, first, second, third and fourth banks and first and second circuits. The first pad group comprises a portion of the total number of pads and is located in proximity to the center of the chip, and the second pad group comprises the remaining pads. The first, second, third and fourth banks include first and second, third and fourth, fifth and sixth and seventh and eighth blocks having memory cells, respectively, and further include first and second, third and fourth, fifth and sixth and seventh and eighth I/O units for inputting and outputting the data in the first through fourth blocks, respectively. The first circuit is connected between the first pad group and the odd-numbered I/O units of the banks, and performs multiplexing. The second circuit is connected between the second pad group and the even-numbered I/O units of the banks, and performs multiplexing. The banks and circuits are disposed on the semiconductor device such that the data buses connecting the corresponding banks and circuits are substantially the same length and width. Each of the first and second circuits can be replaced with a plurality of I/O sense amplifiers, and the I/O units can be replaced with I/O multiplexers.
摘要翻译：一种半导体存储器件，包括用于最小化I / O（输入/输出）数据路径的长度和数据路径之间的长度差的架构。一方面，一种半导体存储器件包括第一和第二焊盘组，第一，第二，第三和第四组以及第一和第二电路。第一衬垫组包括总数量的焊盘的一部分，并且位于芯片的中心附近，并且第二焊盘组包括剩余焊盘。第一，第二，第三和第四组包括分别具有存储单元的第一和第二，第三和第四，第五和第六和第七和第八块，并且还包括第一和第二，第三和第四，第五和第六和第七和第八 I / O单元，分别用于在第一至第四块中输入和输出数据。第一电路连接在第一焊盘组和组的奇数I / O单元之间，并执行复用。第二电路连接在第二焊盘组和组的偶数I / O单元之间，并执行复用。堤和电路设置在半导体器件上，使得连接对应的堤和电路的数据总线大致相同的长度和宽度。第一和第二电路中的每一个可以被多个I / O读出放大器代替，并且I / O单元可以用I / O复用器代替。

10. 发明授权

US5718860A Process for the preparation of polyester base film for magnetic recording media 失效
标题翻译：制备用于磁记录介质的聚酯基膜的方法
公开(公告)号：US5718860A
公开(公告)日：1998-02-17
申请号：US662862
申请日：1996-06-12
申请人： Jae-Woong Lee , Joon-Hee Han
发明人： Jae-Woong Lee , Joon-Hee Han
IPC分类号： C08J5/18 , B29C47/14 , B29C55/12 , B29C71/00 , B29C71/02 , B29K67/00 , B29K105/16 , B29L7/00 , C08K3/26 , C08K3/36 , C08K7/16 , C08L67/00 , C08L67/02 , G11B5/73 , G11B5/733 , B29C35/06
CPC分类号： B29C71/0063 , B29C2791/001 , B29C47/0021 , B29C47/025 , B29C47/065 , B29C71/02
摘要： A polyester base film for magnetic recording media having improved adhesion to the magnetic layer applied thereon as well as good abrasion and scratch resistance prepared by melt-extruding a polyester resin containing inorganic and organic particles to form a sheet; extending the sheet; and heat-setting the extended film, wherein the heat-setting step is carried out by heat-treating a first surface of the film, which is to be coated with a magnetic material, at a temperature ranging from 170.degree. to 290.degree. C. for 1 to 50 seconds so that the crystallinity thereof ranges from 50 to 70% and heat-treating the other surface of the film at a temperatue which is lower than the first heat-treatment temperature by 20.degree. C. or more for 1 to 200 seconds so that the other surface attains a crystallinity which is lower than that of the first surface by at least 5%.
摘要翻译：一种用于磁性记录介质的聚酯基膜，其具有改进的与其上施加的磁性层的粘附性，以及通过熔融挤出含有无机和有机颗粒的聚酯树脂以形成片材而制备的良好的耐磨性和耐划伤性; 延伸片材; 并且对所述延伸膜进行热定型，其中，所述热定形步骤通过在170〜290℃的温度范围内热处理要涂覆有磁性材料的所述膜的第一表面进行。 1〜50秒，结晶度为50〜70％，在低于第1热处理温度20℃以上的温度下，对膜的另一面进行1〜200次的热处理秒，使得另一表面的结晶度比第一表面的结晶度低至少5％。

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