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    • 3. 发明授权
      US07724574B2 Semiconductor memory device and data write and read method thereof 有权
    • Semiconductor memory device and data write and read method thereof
    • 半导体存储器件及其数据写入和读取方法
    • US07724574B2
    • 2010-05-25
    • US11769758
    • 2007-06-28
    • Jin-Kuk Kim , Woo-Seop Jeong
    • Jin-Kuk Kim , Woo-Seop Jeong
    • G11C16/04
    • G11C29/26 , G11C2029/1202 , G11C2029/1802 , G11C2029/2602
    • A semiconductor memory device includes a memory cell array including a plurality of memory banks, an address input portion which receives a row address and a column address through address pins during a normal mode operation and which receives the row address, the column address and write data through the address pins during a test mode operation, an address decoder which accesses one of the plurality of memory banks during the normal mode operation and at least two of the plurality of memory banks during the test mode operation in response to the row address and the column address, a data input portion which inputs write data applied through data pins to the memory cell array during the normal mode operation and which inputs write data output from the address input portion to the memory cell array during the test mode operation, and a data output portion which outputs read data output from the memory cell array to the data pins during the normal mode operation and the test mode operation.
    • 一种半导体存储器件包括：存储单元阵列，包括多个存储体;地址输入部分，其在正常模式操作期间通过地址引脚接收行地址和列地址，并接收行地址，列地址和写入数据 在测试模式操作期间通过地址引脚，响应于行地址和测试模式操作期间在测试模式操作期间访问在正常模式操作期间多个存储体之一中的一个存储器组中的至少两个存储器组的地址译码器 列地址，数据输入部分，其在正常模式操作期间将通过数据引脚施加的写数据输入到存储单元阵列，并且在测试模式操作期间将从地址输入部分输出的写数据输入到存储单元阵列;以及数据 输出部分，其在正常模式操作和测试模式操作期间将从存储单元阵列输出的读取数据输出到数据引脚 离子。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 6. 发明授权
      US08019948B2 Multi-path accessible semiconductor memory device having mailbox areas and mailbox access control method thereof 失效
    • Multi-path accessible semiconductor memory device having mailbox areas and mailbox access control method thereof
    • 具有邮箱区域和邮箱访问控制方法的多路径可访问半导体存储器件
    • US08019948B2
    • 2011-09-13
    • US12909069
    • 2010-10-21
    • Chi-Sung Oh , Yong-Jun Kim , Kyung-Woo Nam , Jin-Kuk Kim , Soo-Young Kim
    • Chi-Sung Oh , Yong-Jun Kim , Kyung-Woo Nam , Jin-Kuk Kim , Soo-Young Kim
    • G06F12/00 , G11C5/06
    • G11C5/02 , G11C8/12
    • A multipath accessible semiconductor memory device having a mailbox area and a mailbox access control method thereof are provided. The semiconductor memory device includes N number of ports, at least one shared memory area allocated in a memory cell array, and N number of mailbox areas for message communication. The at least one shared memory area is operationally connected to the N number of ports, and is accessible through a plurality of data input/output lines to form a data access path between the at least one shared memory area and one port, having an access right to the at least one memory area, among the N number of ports. The N number of mailbox areas are provided in one-to-one correspondence with the N number of ports and are accessible through the plurality of data input/output lines when an address of a predetermined area of the at least one shared memory area is applied to the semiconductor memory device. An efficient layout of mailboxes and an efficient message access path can be obtained.
    • 提供具有邮箱区域和邮箱访问控制方法的多路径可访问半导体存储装置。 半导体存储器件包括N个端口，分配在存储单元阵列中的至少一个共享存储区域和N个用于消息通信的邮箱区域。 所述至少一个共享存储区域可操作地连接到所述N个端口，并且可通过多个数据输入/输出线路访问，以在所述至少一个共享存储区域和一个端口之间形成数据访问路径， 在N个端口中的至少一个存储区域的权限。 N个邮箱区域与N个端口一一对应地提供，并且当应用至少一个共享存储区域的预定区域的地址时可以通过多个数据输入/输出线路访问邮箱区域 到半导体存储器件。 可以获得邮箱的有效布局和高效的邮件访问路径。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 8. 发明授权
      US07840762B2 Multi-path accessible semiconductor memory device having mailbox areas and mailbox access control method thereof 失效
    • Multi-path accessible semiconductor memory device having mailbox areas and mailbox access control method thereof
    • 具有邮箱区域和邮箱访问控制方法的多路径可访问半导体存储器件
    • US07840762B2
    • 2010-11-23
    • US11843877
    • 2007-08-23
    • Chi-Sung Oh , Yong-Jun Kim , Kyung-Woo Nam , Jin-Kuk Kim , Soo-Young Kim
    • Chi-Sung Oh , Yong-Jun Kim , Kyung-Woo Nam , Jin-Kuk Kim , Soo-Young Kim
    • G06F12/00
    • G11C5/02 , G11C8/12
    • A multipath accessible semiconductor memory device having a mailbox area and a mailbox access control method thereof are provided. The semiconductor memory device includes N number of ports, at least one shared memory area allocated in a memory cell array, and N number of mailbox areas for message communication. The at least one shared memory area is operationally connected to the N number of ports, and is accessible through a plurality of data input/output lines to form a data access path between the at least one shared memory area and one port, having an access right to the at least one memory area, among the N number of ports. The N number of mailbox areas are provided in one-to-one correspondence with the N number of ports and are accessible through the plurality of data input/output lines when an address of a predetermined area of the at least one shared memory area is applied to the semiconductor memory device. An efficient layout of mailboxes and an efficient message access path can be obtained.
    • 提供具有邮箱区域和邮箱访问控制方法的多路径可访问半导体存储装置。 半导体存储器件包括N个端口，分配在存储单元阵列中的至少一个共享存储区域和N个用于消息通信的邮箱区域。 所述至少一个共享存储区域可操作地连接到所述N个端口，并且可通过多个数据输入/输出线路访问，以在所述至少一个共享存储区域和一个端口之间形成数据访问路径， 在N个端口中的至少一个存储区域的权限。 N个邮箱区域与N个端口一一对应地提供，并且当应用至少一个共享存储区域的预定区域的地址时可以通过多个数据输入/输出线路访问邮箱区域 到半导体存储器件。 可以获得邮箱的有效布局和高效的邮件访问路径。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 9. 发明申请
      US20080170460A1 MULTI-PATH ACCESSIBLE SEMICONDUCTOR MEMORY DEVICE HAVING MAILBOX AREAS AND MAILBOX ACCESS CONTROL METHOD THEREOF 失效
    • MULTI-PATH ACCESSIBLE SEMICONDUCTOR MEMORY DEVICE HAVING MAILBOX AREAS AND MAILBOX ACCESS CONTROL METHOD THEREOF
    • 具有邮箱区域和邮箱访问控制方法的多通道可访问半导体存储器件
    • US20080170460A1
    • 2008-07-17
    • US11843877
    • 2007-08-23
    • Chi-Sung OH , Yong-Jun Kim , Kyung-Woo Nam , Jin-Kuk Kim
    • Chi-Sung OH , Yong-Jun Kim , Kyung-Woo Nam , Jin-Kuk Kim
    • G11C8/16 , G06F12/00
    • G11C5/02 , G11C8/12
    • A multipath accessible semiconductor memory device having a mailbox area and a mailbox access control method thereof are provided. The semiconductor memory device includes N number of ports, at least one shared memory area allocated in a memory cell array, and N number of mailbox areas for message communication. The at least one shared memory area is operationally connected to the N number of ports, and is accessible through a plurality of data input/output lines to form a data access path between the at least one shared memory area and one port, having an access right to the at least one memory area, among the N number of ports. The N number of mailbox areas are provided in one-to-one correspondence with the N number of ports and are accessible through the plurality of data input/output lines when an address of a predetermined area of the at least one shared memory area is applied to the semiconductor memory device. An efficient layout of mailboxes and an efficient message access path can be obtained.
    • 提供具有邮箱区域和邮箱访问控制方法的多路径可访问半导体存储装置。 半导体存储器件包括N个端口，分配在存储单元阵列中的至少一个共享存储区域和N个用于消息通信的邮箱区域。 所述至少一个共享存储区域可操作地连接到所述N个端口，并且可通过多个数据输入/输出线路访问，以在所述至少一个共享存储区域和一个端口之间形成数据访问路径， 在N个端口中的至少一个存储区域的权限。 N个邮箱区域与N个端口一一对应地提供，并且当应用至少一个共享存储区域的预定区域的地址时可以通过多个数据输入/输出线路访问邮箱区域 到半导体存储器件。 可以获得邮箱的有效布局和高效的邮件访问路径。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
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