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    • 1. 发明授权
    • Method and apparatus for controlling a selectable voltage audio power output stage
    • 用于控制可选择的电压音频功率输出级的方法和装置
    • US08068622B2
    • 2011-11-29
    • US11611069
    • 2006-12-14
    • John L. MelansonJohn Christopher Tucker
    • John L. MelansonJohn Christopher Tucker
    • H03F99/00
    • H03F1/025
    • A method and apparatus for controlling a selectable voltage audio power output stage provides a mechanism for raising the selected power amplifier output voltage in time for the arrival of signal peaks to avoid clipping. Signal peaks may either be delayed by delaying an increase in volume control level or enabling signal compression for a predetermined time period, so that sufficient time is provided for the amplifier power supply to stabilize at a higher operating voltage when an increase of power supply voltage is selected. Alternatively, a signal level may be determined at an upstream source, such as a decoder or filter that provides information in sufficient advance of the arrival of the peaks, and used to control the power supply selection, so that the higher power supply voltage level is selected in advance of arrival of the signal peaks that would otherwise cause clipping at the power amplifier output.
    • 用于控制可选择的电压音频功率输出级的方法和装置提供了用于在信号峰值到达时及时提升所选择的功率放大器输出电压以避免削波的机制。 信号峰值可以通过延迟音量控制电平的增加或在预定时间段内启用信号压缩来延迟,使得当电源电压的增加是放大器电源稳定在较高的工作电压时,提供足够的时间 选择。 或者,可以在诸如解码器或滤波器的上游源处确定信号电平,所述解码器或滤波器提供足够高的峰值到达之前的信息,并且用于控制电源选择,使得较高的电源电压电平为 在信号峰值的到达之前选择,否则将在功率放大器输出端造成限幅。
    • 3. 发明申请
    • AUDIO PROCESSOR WITH INTERNAL OSCILLATOR-GENERATED AUDIO INTERMEDIATE FREQUENCY REFERENCE
    • 具有内部振荡器产生的音频中频参考的音频处理器
    • US20100182062A1
    • 2010-07-22
    • US12412936
    • 2009-03-27
    • Gautham Devendra KamathJeff W. BaumgartnerJohn Christopher Tucker
    • Gautham Devendra KamathJeff W. BaumgartnerJohn Christopher Tucker
    • H03L7/00
    • G06F17/00H03H17/0628H03L1/02
    • An integrated circuit audio processor having an internal-oscillator generated intermediate frequency reference provides for operation of an audio processor without requiring an external master clock. Input audio streams are sample-rate converted to an intermediate sample rate derived from the internal oscillator, which may be an LC oscillator. One or more output audio streams are generated from the one or more input audio streams at the intermediate sample rate and are converted from the intermediate sample rate to corresponding output sample rates. A divider generates the intermediate sample rate from the oscillator output, and is programmed to control the intermediate sample rate to ensure that the intermediate sample rate is in the proper range for operation of the integrated circuit. The divider can be programmed to accommodate changes in process, voltage and/or temperature of the IC, so that the intermediate sample rate is maintained near an expected frequency.
    • 具有内部振荡器产生的中频参考的集成电路音频处理器提供音频处理器的操作而不需要外部主时钟。 输入音频流被采样率转换成从内部振荡器得到的中间采样速率,内部振荡器可以是LC振荡器。 从中间采样率的一个或多个输入音频流产生一个或多个输出音频流,并从中间采样率转换为对应的输出采样率。 分压器从振荡器输出产生中间采样率,并且被编程为控制中间采样率,以确保中间采样率在集成电路的操作的适当范围内。 分频器可以被编程以适应IC的过程,电压和/或温度的变化,使得中间采样率保持在预期频率附近。
    • 7. 发明授权
    • Audio processor with internal oscillator-generated audio intermediate frequency reference
    • 具有内部振荡器产生音频中频参考的音频处理器
    • US08452429B2
    • 2013-05-28
    • US12412936
    • 2009-03-27
    • Gautham Devendra KamathJeff W. BaumgartnerJohn Christopher Tucker
    • Gautham Devendra KamathJeff W. BaumgartnerJohn Christopher Tucker
    • G06F17/00
    • G06F17/00H03H17/0628H03L1/02
    • An integrated circuit audio processor having an internal-oscillator generated intermediate frequency reference provides for operation of an audio processor without requiring an external master clock. Input audio streams are sample-rate converted to an intermediate sample rate derived from the internal oscillator, which may be an LC oscillator. One or more output audio streams are generated from the one or more input audio streams at the intermediate sample rate and are converted from the intermediate sample rate to corresponding output sample rates. A divider generates the intermediate sample rate from the oscillator output, and is programmed to control the intermediate sample rate to ensure that the intermediate sample rate is in the proper range for operation of the integrated circuit. The divider can be programmed to accommodate changes in process, voltage and/or temperature of the IC, so that the intermediate sample rate is maintained near an expected frequency.
    • 具有内部振荡器产生的中频参考的集成电路音频处理器提供音频处理器的操作而不需要外部主时钟。 输入音频流被采样率转换成从内部振荡器得到的中间采样速率,内部振荡器可以是LC振荡器。 从中间采样率的一个或多个输入音频流产生一个或多个输出音频流,并从中间采样率转换为对应的输出采样率。 分压器从振荡器输出产生中间采样率,并且被编程为控制中间采样率,以确保中间采样率在集成电路的操作的适当范围内。 分频器可以被编程以适应IC的过程,电压和/或温度的变化,使得中间采样率保持在预期频率附近。
    • 9. 发明授权
    • Discrete-time delta-sigma modulator with improved anti-aliasing at lower quantization rates
    • 离散时间Δ-Σ调制器,在较低量化速率下具有改进的抗锯齿
    • US08130127B1
    • 2012-03-06
    • US12827522
    • 2010-06-30
    • Robin Matthew TsangJohn Christopher TuckerJohn L. Melanson
    • Robin Matthew TsangJohn Christopher TuckerJohn L. Melanson
    • H03M3/00
    • H03M3/322H03M3/452
    • A discrete time delta-sigma modulator circuit, which may be used to implement an analog-to-digital converter (ADC) provides improved anti-aliasing performance when lower quantization rates are selected, by maintaining the clocking rate of a first stage in the delta-sigma modulator loop filter at a rate higher than would ordinarily be selected for a lower quantization rate. To accomplish the anti-aliasing improvement, the ratio between the quantization rate and the clocking rate of the first integrator is reduced at the lower quantization rate, resulting in a first true alias image at a multiple of the quantization rate, permitting anti-aliasing filters to more effectively attenuate the alias image, and attenuating the images spaced at the quantization rate via the averaging operation of the first integrator.
    • 可用于实现模数转换器(ADC)的离散时间Δ-Σ调制器电路通过将第一级的时钟速率保持在三角形(delta)中来提供较低量化速率时提供的改进的抗混叠性能 Σ调制器环路滤波器的速率高于通常为较低量化速率选择的速率。 为了实现抗锯齿改进,第一积分器的量化速率与时钟速率之间的比例以较低的量化速率降低,从而产生了以量化速率倍数的第一真实混叠图像,从而允许抗混叠滤波器 以更有效地衰减别名图像,并且通过第一积分器的平均化操作来衰减以量化速率间隔的图像。
    • 10. 发明申请
    • METHOD AND APPARATUS FOR CONTROLLING A SELECTABLE VOLTAGE AUDIO POWER OUTPUT STAGE
    • 用于控制可选择的电压音频功率输出级的方法和装置
    • US20080144861A1
    • 2008-06-19
    • US11611069
    • 2006-12-14
    • John L. MelansonJohn Christopher Tucker
    • John L. MelansonJohn Christopher Tucker
    • H03F21/00
    • H03F1/025
    • A method and apparatus for controlling a selectable voltage audio power output stage provides a mechanism for raising the selected power amplifier output voltage in time for the arrival of signal peaks to avoid clipping. Signal peaks may either be delayed by delaying an increase in volume control level or enabling signal compression for a predetermined time period, so that sufficient time is provided for the amplifier power supply to stabilize at a higher operating voltage when an increase of power supply voltage is selected. Alternatively, a signal level may be determined at an upstream source, such as a decoder or filter that provides information in sufficient advance of the arrival of the peaks, and used to control the power supply selection, so that the higher power supply voltage level is selected in advance of arrival of the signal peaks that would otherwise cause clipping at the power amplifier output.
    • 用于控制可选择的电压音频功率输出级的方法和装置提供了用于在信号峰值到达时及时提升所选择的功率放大器输出电压以避免削波的机制。 信号峰值可以通过延迟音量控制电平的增加或在预定时间段内启用信号压缩来延迟,使得当电源电压的增加是放大器电源稳定在较高的工作电压时,提供足够的时间 选择。 或者,可以在诸如解码器或滤波器的上游源处确定信号电平,所述解码器或滤波器提供足够高的峰值到达之前的信息,并且用于控制电源选择,使得较高的电源电压电平为 在信号峰值的到达之前选择,否则将在功率放大器输出端造成限幅。