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1. 发明授权

US09793802B2 MEMS capacitive sensor biasing circuit including an integrated inductor 有权
公开(公告)号：US09793802B2
公开(公告)日：2017-10-17
申请号：US13110360
申请日：2011-05-18
申请人： John M. Muza
发明人： John M. Muza
IPC分类号： H02M3/158
CPC分类号： H02M3/158
摘要： A MEMS capacitive sensor biasing circuit. The circuit includes a high-voltage (HV) NMOS switch, an inductor, a diode, and a capacitor. The HV NMOS switch has a source coupled to ground. The inductor has a first node coupled to a drain of the HV NMOS switch, and a second node coupled to a DC power source supplying a first DC voltage. The diode has an anode coupled to the first node of the inductor and the drain of the HV NMOS switch. The capacitor has a first node coupled to a cathode of the diode, and a second node coupled to the ground.

2. 发明授权

US06275102B1 Distortion correction loop for amplifier circuits 有权
标题翻译：用于放大器电路的失真校正回路
公开(公告)号：US06275102B1
公开(公告)日：2001-08-14
申请号：US09491543
申请日：2000-01-26
申请人： John M. Muza
发明人： John M. Muza
IPC分类号： H03F136
CPC分类号： H03F3/45475 , H03F1/34 , H03F2203/45138
摘要： The distortion correction circuit includes: a main amplifier 30 having a first resistor 36 coupled from an output of the main amplifier 30 to a first input of the main amplifier 30, and a second resistor 34 coupled between the first input of the main amplifier 30 and a first input signal node; a correction loop amplifier 32 having an output coupled to a second input of the main amplifier 30, an output of the main amplifier 30 coupled to a first input of the correction loop amplifier 32, a second input of the correction loop amplifier 32 coupled to a second input signal node.
摘要翻译：失真校正电路包括：主放大器30，其具有从主放大器30的输出端连接到主放大器30的第一输入端的第一电阻器36，以及耦合在主放大器30的第一输入端和第二电阻器34之间的第二电阻器34 第一输入信号节点; 具有耦合到主放大器30的第二输入的输出的校正回路放大器32，耦合到校正回路放大器32的第一输入的主放大器30的输出，耦合到校正回路放大器32的校正回路放大器32的第二输入第二输入信号节点。

3. 发明申请

US20120308046A1 CLASS D MICRO-SPEAKER 有权
标题翻译： D类微型扬声器
公开(公告)号：US20120308046A1
公开(公告)日：2012-12-06
申请号：US13150287
申请日：2011-06-01
申请人： John M. Muza
发明人： John M. Muza
IPC分类号： H04R3/00
CPC分类号： H04R19/02 , H04R3/00
摘要： A micro-speaker. The micro-speaker includes a first plate, a second plate, and a diaphragm. The first plate is biased to a first voltage. The second plate is biased to a second voltage. The diaphragm is positioned between the first plate and the second plate and is configured to receive a digital signal. The digital signal causes the diaphragm to cycle between fully displaced toward the first plate and fully displaced toward the second plate, creating air pressure pulses that mimic the digital signal.
摘要翻译：微型扬声器。微型扬声器包括第一板，第二板和隔膜。第一板被偏压到第一电压。第二板偏压到第二电压。隔膜位于第一板和第二板之间，并被配置为接收数字信号。数字信号使得隔膜在完全向第一板移位并且朝向第二板完全移位之间循环，产生模拟数字信号的空气压力脉冲。

4. 发明授权

US06396352B1 CMOS power amplifier for driving low impedance loads 有权
标题翻译： CMOS功率放大器用于驱动低阻抗负载
公开(公告)号：US06396352B1
公开(公告)日：2002-05-28
申请号：US09638104
申请日：2000-08-11
申请人： John M. Muza
发明人： John M. Muza
IPC分类号： H03F304
CPC分类号： H03F3/211 , H03F1/223 , H03F3/345
摘要： The two-stage power amplifier includes: a first stage transconductor 60; and a second stage having at least two parallel output branches 57-59 supplying current to an output node 89, each output branch has an input coupled to an output of the first stage transconductor 60.
摘要翻译：两级功率放大器包括：第一级跨导器60; 以及具有至少两个平行输出分支57-59的第二级，其输出节点89提供电流，每个输出分支具有耦合到第一级跨导器60的输出的输入。

5. 发明授权

US06255909B1 Ultra low voltage CMOS class AB power amplifier with parasitic capacitance internal compensation 有权
标题翻译：超低电压CMOS AB类功率放大器，具有寄生电容内部补偿
公开(公告)号：US06255909B1
公开(公告)日：2001-07-03
申请号：US09705465
申请日：2000-11-03
申请人： John M. Muza
发明人： John M. Muza
IPC分类号： H03F318
CPC分类号： H03F3/303 , H03F1/086
摘要： An ultra low voltage CMOS, class AB power amplifier has internal compensation using only parasitic gate capacitance.
摘要翻译：超低压CMOS，AB类功率放大器仅使用寄生栅极电容进行内部补偿。

6. 发明申请

US20120308047A1 SELF-TUNING MEMS MICROPHONE 审中-公开
标题翻译：自调谐MEMS麦克风
公开(公告)号：US20120308047A1
公开(公告)日：2012-12-06
申请号：US13150293
申请日：2011-06-01
申请人： John M. Muza
发明人： John M. Muza
IPC分类号： H04R3/00
CPC分类号： H04R29/004 , H04R19/005 , H04R2410/05
摘要： A self-tuning MEMS microphone. The microphone includes a capacitive sensor, an amplifier, a signal converter, a frequency generator, a micro-speaker, and a controller. The capacitive sensor is configured to detected a sound wave and output an electric signal based on the sound wave. The amplifier is coupled to the capacitive sensor, and configured to amplify the electric signal. The signal converter is coupled to the amplifier, and configured to adjust a frequency response of the amplified electric signal. The frequency generator is configured to output an AC electric signal. The micro-speaker is coupled to the frequency generator, and configured to convert the AC electric signal into a sound wave. The controller is coupled to the signal converter and the frequency generator. The controller is configured to direct the frequency generator to output the AC electric signal at a predetermined frequency and to detect an amplified electric signal generated by the capacitive sensor based on the AC electric signal.
摘要翻译：自调谐麦克风。麦克风包括电容式传感器，放大器，信号转换器，频率发生器，微型扬声器和控制器。电容传感器被配置为检测声波并基于声波输出电信号。放大器耦合到电容传感器，并且被配置为放大电信号。信号转换器耦合到放大器，并被配置为调节放大的电信号的频率响应。频率发生器被配置为输出AC电信号。微型扬声器耦合到频率发生器，并且被配置为将AC电信号转换成声波。控制器耦合到信号转换器和频率发生器。控制器被配置为引导频率发生器以预定频率输出AC电信号，并且基于AC电信号检测由电容传感器产生的放大电信号。

7. 发明授权

US06259322B1 Current efficient, ultra low noise differential gain amplifier architecture 有权
标题翻译：目前高效，超低噪声的差分增益放大器架构
公开(公告)号：US06259322B1
公开(公告)日：2001-07-10
申请号：US09429557
申请日：1999-10-28
申请人： John M. Muza
发明人： John M. Muza
IPC分类号： H03F345
CPC分类号： H03F3/265 , H03F3/45183 , H03F3/45475 , H03F2200/372 , H03F2203/45356 , H03F2203/45498 , H03F2203/45646 , H03F2203/45658
摘要： A low noise, low current, high bandwidth differential amplifier circuit (30), including a first amplifier (44) driving a first transistor X1 and having a first current source I2 coupled to an input of the first amplifier (44). A first feedback resistor R3 is coupled between the first current source I2 and the first transistor X1, and a second resistor R4 is coupled to the first resistor R3. A second amplifier (46) drives a second transistor X2, and has a second current source I3 coupled to an input of the second amplifier 46. A third feedback resistor R5 is coupled between the second current source I3 and the second transistor X2. A fourth resistor R6 is coupled to the third resistor R5. The first R3 and third R5 feedback resistors are driven by the first I2 and second I3 current sources rather than by the first (44) and second (46) amplifiers, respectively, allowing the first and second amplifiers (44, 46) to be single stage amplifiers. A buffering stage (62) having a high pass filter may be coupled to the output signal. The invention is particularly useful for applications such as mixed signal or analog circuits.
摘要翻译：一种低噪声，低电流，高带宽差分放大器电路（30），包括驱动第一晶体管X1的第一放大器（44）并具有耦合到第一放大器（44）的输入端的第一电流源I2。第一反馈电阻器R3耦合在第一电流源I2和第一晶体管X1之间，第二电阻器R4耦合到第一电阻器R3。第二放大器（46）驱动第二晶体管X2，并且具有耦合到第二放大器46的输入端的第二电流源I 3。第三反馈电阻器R5耦合在第二电流源I3和第二晶体管X2之间。第四电阻器R6耦合到第三电阻器R5。第一R3和第三R5反馈电阻分别由第一I2和第二I3电流源而不是由第一（44）和第二（46）放大器驱动，从而允许第一和第二放大器（44,46）为单个舞台放大器。具有高通滤波器的缓冲级（62）可以耦合到输出信号。本发明对于诸如混合信号或模拟电路的应用特别有用。

8. 发明授权

US6084467A Analog amplifier clipping circuit 有权
标题翻译：模拟放大器限幅电路
公开(公告)号：US6084467A
公开(公告)日：2000-07-04
申请号：US414409
申请日：1999-10-07
申请人： John M. Muza
发明人： John M. Muza
IPC分类号： H03G11/00 , H03F3/45
CPC分类号： H03G11/00
摘要： An analog clipping circuit includes: a main amplifier 20; a feedback resistor 26 coupled between a first input of the main amplifier 20 and an output of the main amplifier 20; a first current source 50 coupled in parallel with the feedback resistor 26; a first clipping amplifier 42 coupled to the first current source 50 for controlling the first current source 50, the first clipping amplifier 42 having a first input coupled to an output of the main amplifier 20 and a second input coupled to a first reference node; a second current source 54 coupled in parallel with the feedback resistor 26; and a second clipping amplifier 44 coupled to the second current source 54 for controlling the second current source 54, the second clipping amplifier 44 having a first input coupled to an output of the main amplifier 20 and a second input coupled to a reference node.
摘要翻译：模拟限幅电路包括：主放大器20; 耦合在主放大器20的第一输入端和主放大器20的输出端之间的反馈电阻器26; 与反馈电阻器26并联耦合的第一电流源50; 耦合到第一电流源50以控制第一电流源50的第一限幅放大器42，第一限幅放大器42具有耦合到主放大器20的输出的第一输入和耦合到第一参考节点的第二输入; 与反馈电阻器26并联耦合的第二电流源54; 以及耦合到第二电流源54以用于控制第二电流源54的第二限幅放大器44，第二限幅放大器44具有耦合到主放大器20的输出的第一输入和耦合到参考节点的第二输入。

9. 发明授权

US08629011B2 Epitaxial silicon CMOS-MEMS microphones and method for manufacturing 有权
标题翻译：外延硅CMOS-MEMS麦克风及其制造方法
公开(公告)号：US08629011B2
公开(公告)日：2014-01-14
申请号：US13161194
申请日：2011-06-15
申请人： Brett M. Diamond , Franz Laermer , Andrew J. Doller , Michael J. Daley , Phillip Sean Stetson , John M. Muza
发明人： Brett M. Diamond , Franz Laermer , Andrew J. Doller , Michael J. Daley , Phillip Sean Stetson , John M. Muza
IPC分类号： H01L21/339
CPC分类号： H04R19/005 , B81B2201/0257 , B81B2203/0127 , B81C1/00158 , B81C2201/0119 , B81C2201/0177 , B81C2203/0714 , B81C2203/075 , B81C2203/0778 , H04R19/04 , H04R31/00
摘要： A method of manufacturing a microphone using epitaxially grown silicon. A monolithic wafer structure is provided. A wafer surface of the structure includes poly-crystalline silicon in a first horizontal region and mono-crystalline silicon in a second horizontal region surrounding a perimeter of the first horizontal region. A hybrid silicon layer is epitaxially deposited on the wafer surface. Portions of the hybrid silicon layer that contact the poly-crystalline silicon use the poly-crystalline silicon as a seed material and portions that contact the mono-crystalline silicon use the mono-crystalline silicon as a seed material. As such, the hybrid silicon layer includes both mono-crystalline silicon and poly-crystalline silicon in the same layer of the same wafer structure. A CMOS/membrane layer is then deposited on top of the hybrid silicon layer.
摘要翻译：使用外延生长硅制造麦克风的方法。提供了一种单片晶圆结构。该结构的晶片表面包括第一水平区域中的多晶硅和围绕第一水平区域的周边的第二水平区域中的单晶硅。杂化硅层外延沉积在晶片表面上。接触多晶硅的混合硅层的部分使用多晶硅作为种子材料，并且接触单晶硅的部分使用单晶硅作为种子材料。这样，混合硅层在同一晶片结构的相同层中包括单晶硅和多晶硅两者。然后将CMOS /膜层沉积在混合硅层的顶部。

10. 发明授权

US08405449B2 Resettable high-voltage capable high impedance biasing network for capacitive sensors 有权
标题翻译：用于电容式传感器的可复位高压能力高阻抗偏置网络
公开(公告)号：US08405449B2
公开(公告)日：2013-03-26
申请号：US13040466
申请日：2011-03-04
申请人： John M. Muza
发明人： John M. Muza
IPC分类号： G05F1/10
CPC分类号： H04R19/005
摘要： A high-voltage MEMS biasing network. The network has a reset mode wherein a capacitive sensor is charged, and a functional mode wherein the MEMS biasing network provides a high impedance between the capacitive sensor and a bias voltage source. The network includes a biasing circuit, a mirror circuit, and a control circuit. The biasing circuit and the mirror circuit have a charging state and a high impedance state. The control circuit includes a first branch that controls the biasing circuit and a second branch that controls the mirror circuit. The biasing network receives a logic control signal, the first branch puts the biasing circuit into the charging state when the logic control signal is a first logic signal, and puts the biasing circuit into the high impedance state when the logic control signal is a second logic signal.
摘要翻译：高压MEMS偏压网络。网络具有其中电容传感器被充电的复位模式，以及其中MEMS偏压网络在电容传感器和偏置电压源之间提供高阻抗的功能模式。网络包括偏置电路，反射镜电路和控制电路。偏置电路和反射镜电路具有充电状态和高阻抗状态。控制电路包括控制偏置电路的第一分支和控制镜电路的第二分支。偏置网络接收逻辑控制信号时，当逻辑控制信号为第一逻辑信号时，第一分支将偏置电路置于充电状态，当逻辑控制信号为第二逻辑时，使偏置电路处于高阻抗状态信号。

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