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1. 发明授权

US08599693B2 Packet transmission device and packet transmission method 有权
标题翻译：分组传输设备和分组传输方式
公开(公告)号：US08599693B2
公开(公告)日：2013-12-03
申请号：US12954994
申请日：2010-11-29
申请人： Tsutomu Noguchi , Katsumi Imamura , Hideyo Fukunaga , Yoko Ohta , Yoshito Kachita , Naoya Matsusue
发明人： Tsutomu Noguchi , Katsumi Imamura , Hideyo Fukunaga , Yoko Ohta , Yoshito Kachita , Naoya Matsusue
IPC分类号： G01R31/08
CPC分类号： H04L47/52 , H04L47/10 , H04L47/215
摘要： The packet transmission device including: a first and a second storage module to store a token value; a token controller to add a predetermined token value to a first total token value, and subtract a predetermined token value from the first total value in response to the output of the packet; an overrun state controller to add an excess of the first total token value over a predetermined upper limit value to a second total token value, in the case where the first total token value added by addition control is greater than or equal to the predetermined upper limit value; and an underrun state controller to subtract a predetermined token value from the second total token value and add the subtracted token value to the first total token value, in the case where the subtracted first total token value is less than the predetermined upper limit value.
摘要翻译：所述分组传输装置包括：存储令牌值的第一和第二存储模块; 令牌控制器，用于将预定的令牌值添加到第一总令牌值，并且响应于所述分组的输出从所述第一总值中减去预定的令牌值; 超额状态控制器，在通过相加控制添加的第一总令牌值大于或等于预定上限的情况下，将超过预定上限值的超过第一总令牌值添加到第二总令牌值值; 以及欠运行状态控制器，用于从所述第二总令牌值中减去预定的令牌值，并且在减去的所述第一总令牌值小于所述预定上限值的情况下将所述减去的令牌值加到所述第一总令牌值。

2. 发明申请

US20100082864A1 SELECTION CIRCUIT AND PACKET PROCESSING APPARATUS 有权
标题翻译：选择电路和分组处理设备
公开(公告)号：US20100082864A1
公开(公告)日：2010-04-01
申请号：US12507872
申请日：2009-07-23
申请人： Takeshi Sumou , Katsumi Imamura , Hideyo Fukunaga
发明人： Takeshi Sumou , Katsumi Imamura , Hideyo Fukunaga
IPC分类号： G06F13/00
CPC分类号： G06F13/4286
摘要： An aspect of the embodiment utilizes a selection circuit that includes a first storage circuit for storing information of m×n bits each corresponding to a choice. The storage circuit indicates whether the corresponding choice is in a selectable state or not. A first round robin circuit for executing a round robin process on the second storage circuit selects one of the bits contained in the corresponding bit string and indicates that a choice is in a selectable state. A second round robin circuit executes the round robin process on the bit string having the m-bit width to select one of the bits indicating that the corresponding choice, and a control circuit controls the first and the second round robin circuit.
摘要翻译：本实施例的一个方面利用了选择电路，其包括用于存储每个对应于选择的m×n位的信息的第一存储电路。存储电路指示相应的选择是否处于可选状态。用于在第二存储电路上执行循环处理的第一循环电路选择包含在相应位串中的一个位，并指示选择处于可选状态。第二循环电路对具有m位宽的位串执行循环处理，以选择表示相应选择的位之一，并且控制电路控制第一和第二循环电路。

3. 发明授权

US07885280B2 Packet relaying apparatus and packet relaying method 有权
标题翻译：分组中继装置和分组中继方法
公开(公告)号：US07885280B2
公开(公告)日：2011-02-08
申请号：US12320488
申请日：2009-01-27
申请人： Hideyo Fukunaga , Takeshi Sumou , Tsutomu Noguchi , Katsumi Imamura
发明人： Hideyo Fukunaga , Takeshi Sumou , Tsutomu Noguchi , Katsumi Imamura
IPC分类号： H04L12/28
CPC分类号： H04L47/10 , H04L47/22 , H04L47/50 , H04L47/527 , H04L47/60 , H04L49/90 , H04L49/9036 , H04L49/9078
摘要： A packet relaying apparatus includes queues holding packet information, and queue control units controlling dequeueing. The dequeueing means transmission of packet information from a queue of a previous stage to a queue of a next stage. The packet relaying apparatus further includes a packet information control unit that, on receiving packet information to be dequeued at the time of dequeueing, returns discard information and data volume corresponding to the received packet information, a first bandwidth adjusting unit that, on determining that the received packet has been discarded, discards the packet information, maintains a usable bandwidth, and transfers the discard information and the data volume to the previous stage, and a second bandwidth adjusting unit that, on receiving the discard information and the data volume from the next stage, adds the data volume to the usable bandwidth and transfers the discard information and the data volume to a previous stage.
摘要翻译：分组中继装置包括保持分组信息的队列，以及控制出队的队列控制单元。出队意味着将分组信息从先前阶段的队列传输到下一个队列。分组中继装置还包括：分组信息控制单元，在接收到出队时出队的分组信息时，返回与所接收的分组信息相对应的丢弃信息和数据量;第一带宽调整单元，接收到的分组被丢弃，丢弃分组信息，保持可用带宽，并将丢弃信息和数据量传送到前一级;以及第二带宽调整单元，在从下一个接收到丢弃信息和数据量时，将数据量添加到可用带宽，并将丢弃信息和数据量传送到前一级。

4. 发明授权

US07778174B2 Shaper circuit and shaper circuit combination 有权
标题翻译：整形电路和整形电路组合
公开(公告)号：US07778174B2
公开(公告)日：2010-08-17
申请号：US11448923
申请日：2006-06-07
申请人： Yoko Ohta , Katsumi Imamura , Yasushi Kurokawa , Hideyo Fukunaga
发明人： Yoko Ohta , Katsumi Imamura , Yasushi Kurokawa , Hideyo Fukunaga
IPC分类号： H04J1/16
CPC分类号： H04L47/10 , H04L47/215 , H04L47/22 , H04L47/2441
摘要： A shaper circuit includes a storage part storing a current token, an add token, and a max token, a subtraction part subtracting a packet length of a dequeue target from the current token stored in the storage part and storing the current token in the storage part, an addition part adding the add token stored in the storage part to the current token stored in the storage part at constant periodic intervals and storing the current token in the storage part, a comparison part comparing the result of the addition with the max token stored in the storage part and preventing the addition result from exceeding the max token, and a determining part outputting a dequeue permission request. A number of bits in a decimal part of the current token are set and a number of bits in an integer part of the add token are set.
摘要翻译：成形器电路包括存储当前令牌，添加令牌和最大令牌的存储部件，从存储在存储部件中的当前令牌中减去出队目标的分组长度的减法部分，并将当前令牌存储在存储部分中一个附加部分，将存储在存储部分中的添加令牌以恒定的周期性间隔添加到存储部分中存储的当前令牌，并将当前令牌存储在存储部分中;比较部分，将加法结果与存储的最大令牌进行比较并且防止相加结果超过最大令牌，以及确定部分输出出队许可请求。设置当前令牌的小数部分中的位数，并设置加法令牌的整数部分中的位数。

5. 发明申请

US20090257441A1 PACKET FORWARDING APPARATUS AND METHOD FOR DISCARDING PACKETS 有权
标题翻译：分组前向装置和分组分组的方法
公开(公告)号：US20090257441A1
公开(公告)日：2009-10-15
申请号：US12361655
申请日：2009-01-29
申请人： Akihiro Hata , Hiroshi Tomonaga , Katsumi Imamura
发明人： Akihiro Hata , Hiroshi Tomonaga , Katsumi Imamura
IPC分类号： H04L12/56
CPC分类号： H04L47/10 , H04L47/283 , H04L47/32 , H04L49/254 , H04L49/503 , H04L49/90 , H04L49/9047 , H04L49/9078
摘要： The packet forwarding apparatus of the present invention includes a packet buffer for temporarily storing packets to be forwarded, a timer for measuring the time of every predetermined unit period, a plurality of first queues corresponding to each of a plurality of address groups that form the packet buffer, a plurality of second queues that are provided corresponding to the property of the packets, a first controller for executing the writing of the packets, and a second controller for executing the discarding of the packets. According to this invention, through managing the first queues and the second queues, packets in the packet buffer can be discarded without the packets being read from the packet buffer.
摘要翻译：本发明的分组转发装置包括用于临时存储要转发的分组的分组缓冲器，用于测量每个预定单位周期的时间的定时器，对应于形成分组的多个地址组中的每一个的多个第一队列缓冲器，对应于分组的属性提供的多个第二队列，用于执行分组的写入的第一控制器，以及用于执行丢弃分组的第二控制器。根据本发明，通过管理第一队列和第二队列，可以丢弃分组缓冲器中的分组，而不从分组缓冲器读取分组。

6. 发明申请

US20090252035A1 Packet relaying apparatus and packet relaying method 有权
标题翻译：分组中继装置和分组中继方法
公开(公告)号：US20090252035A1
公开(公告)日：2009-10-08
申请号：US12320488
申请日：2009-01-27
申请人： Hideyo Fukunaga , Takeshi Sumou , Tsutomu Noguchi , Katsumi Imamura
发明人： Hideyo Fukunaga , Takeshi Sumou , Tsutomu Noguchi , Katsumi Imamura
IPC分类号： H04L12/24
CPC分类号： H04L47/10 , H04L47/22 , H04L47/50 , H04L47/527 , H04L47/60 , H04L49/90 , H04L49/9036 , H04L49/9078
摘要： A packet relaying apparatus includes queues holding packet information, and queue control units controlling dequeueing. The dequeueing means transmission of packet information from a queue of a previous stage to a queue of a next stage. The packet relaying apparatus further includes a packet information control unit that, on receiving packet information to be dequeued at the time of dequeueing, returns discard information and data volume corresponding to the received packet information, a first bandwidth adjusting unit that, on determining that the received packet has been discarded, discards the packet information, maintains a usable bandwidth, and transfers the discard information and the data volume to the previous stage, and a second bandwidth adjusting unit that, on receiving the discard information and the data volume from the next stage, adds the data volume to the usable bandwidth and transfers the discard information and the data volume to a previous stage.
摘要翻译：分组中继装置包括保持分组信息的队列，以及控制出队的队列控制单元。出队意味着将分组信息从先前阶段的队列传输到下一个队列。分组中继装置还包括：分组信息控制单元，在接收到出队时出队的分组信息时，返回与所接收的分组信息相对应的丢弃信息和数据量;第一带宽调整单元，接收到的分组被丢弃，丢弃分组信息，保持可用带宽，并将丢弃信息和数据量传送到前一级;以及第二带宽调整单元，在从下一个接收到丢弃信息和数据量时，将数据量添加到可用带宽，并将丢弃信息和数据量传送到前一级。

7. 发明申请

US20080170577A1 Station Device, Message Transfer Method, and Program Storage Medium Storing Program Thereof 审中-公开
标题翻译：站设备，消息传输方法和程序存储介质存储程序
公开(公告)号：US20080170577A1
公开(公告)日：2008-07-17
申请号：US11971379
申请日：2008-01-09
申请人： Takeshi Sumou , Yoshiyuki Karakawa , Kousuke Nakamura , Katsumi Imamura , Junichi Kawaguchi , Hideyo Fukunaga
发明人： Takeshi Sumou , Yoshiyuki Karakawa , Kousuke Nakamura , Katsumi Imamura , Junichi Kawaguchi , Hideyo Fukunaga
IPC分类号： H04L12/56
CPC分类号： H04L12/42
摘要： An Ethernet frame nester nests Ethernet frames addressed to a plurality of remote station devices affiliated with a shared station device on the basis of the correspondence relation between a MAC address of the station device and MAC addresses of the remote station devices stored in a table and the transmission destination addresses of the Ethernet frames. The Ethernet frame nester then converts them into an RPR frame. When receiving an RPR frame addressed to the own station device, an Ethernet frame extractor extracts Ethernet frames from the RPR frame and transmits each Ethernet frame to the addressed remote station devices.
摘要翻译：以太网帧节点根据站设备的MAC地址和存储在表中的远程站设备的MAC地址之间的对应关系，嵌套到寻址到与共享站设备相关联的多个远程站设备的以太网帧，以太网帧的传输目的地址。以太网帧nester然后将它们转换成RPR帧。以太网帧提取器在接收到本站设备的RPR帧时，从RPR帧中提取以太网帧，并将每个以太网帧发送到寻址的远程站设备。

8. 发明申请

US20070223375A1 Shaper circuit and shaper circuit combination 有权
标题翻译：整形电路和整形电路组合
公开(公告)号：US20070223375A1
公开(公告)日：2007-09-27
申请号：US11448923
申请日：2006-06-07
申请人： Yoko Ohta , Katsumi Imamura , Yasushi Kurokawa , Hideyo Fukunaga
发明人： Yoko Ohta , Katsumi Imamura , Yasushi Kurokawa , Hideyo Fukunaga
IPC分类号： H04L12/26 , H04J1/16 , H04L12/56
CPC分类号： H04L47/10 , H04L47/215 , H04L47/22 , H04L47/2441
摘要： A shaper circuit for controlling input packets using a token bucket algorithm is disclosed. The shaper circuit includes a parameter storage part for storing a current token, an add token, and a max token, a dequeue subtraction part for subtracting a packet length of a dequeue target from the current token stored in the parameter storage part and storing the current token in the parameter storage part, an add token addition part for adding the add token stored in the parameter storage part to the current token stored in the parameter storage part at constant periodic intervals and storing the current token in the parameter storage part, a max token comparison part for comparing the result of the addition of the add token addition part with the max token stored in the parameter storage part and preventing the addition result from exceeding the max token, and a dequeue permission determining part for outputting a dequeue permission request when the result of the subtraction of the dequeue subtraction part is no less than 0 and when the result of the addition of the add token addition part is no less than 0. The number of bits in each of the current token, the add token, and the max token stored in the parameter storage part are variable.
摘要翻译：公开了一种使用令牌桶算法来控制输入分组的整形电路。成形器电路包括用于存储当前令牌，添加令牌和最大令牌的参数存储部分，用于从存储在参数存储部分中的当前令牌中减去出队目标的分组长度的出队减法部分，并存储当前令牌在参数存储部分中，添加令牌添加部分，用于将存储在参数存储部分中的添加令牌以恒定的周期性间隔添加到存储在参数存储部分中的当前令牌，并将当前令牌存储在参数存储部分中，标记比较部分，用于将添加令牌添加部分的添加结果与存储在参数存储部分中的最大令牌进行比较，并防止加法结果超过最大令牌;以及出局许可确定部分，用于当减除出队部分的结果不小于0，添加令牌的结果加到该部分不小于0.当前令牌，添加令牌和存储在参数存储部分中的最大令牌中的每一个中的位数是可变的。

9. 发明授权

US08306045B2 Packet forwarding apparatus and method for discarding packets 有权
标题翻译：用于丢弃分组的分组转发装置和方法
公开(公告)号：US08306045B2
公开(公告)日：2012-11-06
申请号：US12361655
申请日：2009-01-29
申请人： Akihiro Hata , Hiroshi Tomonaga , Katsumi Imamura
发明人： Akihiro Hata , Hiroshi Tomonaga , Katsumi Imamura
IPC分类号： G06F3/00 , G06F5/00 , H04L12/28 , H04L12/56
CPC分类号： H04L47/10 , H04L47/283 , H04L47/32 , H04L49/254 , H04L49/503 , H04L49/90 , H04L49/9047 , H04L49/9078
摘要： The packet forwarding apparatus of the present invention includes a packet buffer for temporarily storing packets to be forwarded, a timer for measuring the time of every predetermined unit period, a plurality of first queues corresponding to each of a plurality of address groups that form the packet buffer, a plurality of second queues that are provided corresponding to the property of the packets, a first controller for executing the writing of the packets, and a second controller for executing the discarding of the packets. According to this invention, through managing the first queues and the second queues, packets in the packet buffer can be discarded without the packets being read from the packet buffer.
摘要翻译：本发明的分组转发装置包括用于临时存储要转发的分组的分组缓冲器，用于测量每个预定单位周期的时间的定时器，对应于形成分组的多个地址组中的每一个的多个第一队列缓冲器，对应于分组的属性提供的多个第二队列，用于执行分组的写入的第一控制器，以及用于执行丢弃分组的第二控制器。根据本发明，通过管理第一队列和第二队列，可以丢弃分组缓冲器中的分组，而不从分组缓冲器读取分组。

10. 发明申请

US20110128847A1 PACKET TRANSMISSION DEVICE AND PACKET TRANSMISSION METHOD 有权
标题翻译：分组传输设备和分组传输方法
公开(公告)号：US20110128847A1
公开(公告)日：2011-06-02
申请号：US12954994
申请日：2010-11-29
申请人： Tsutomu Noguchi , Katsumi Imamura , Hideyo Fukunaga , Yoko Ohta , Yoshito Kachita , Naoya Matsusue
发明人： Tsutomu Noguchi , Katsumi Imamura , Hideyo Fukunaga , Yoko Ohta , Yoshito Kachita , Naoya Matsusue
IPC分类号： H04L12/26
CPC分类号： H04L47/52 , H04L47/10 , H04L47/215
摘要： The packet transmission device including: a first and a second storage module to store a token value; a token controller to add a predetermined token value to a first total token value, and subtract a predetermined token value from the first total value in response to the output of the packet; an overrun state controller to add an excess of the first total token value over a predetermined upper limit value to a second total token value, in the case where the first total token value added by addition control is greater than or equal to the predetermined upper limit value; and an underrun state controller to subtract a predetermined token value from the second total token value and add the subtracted token value to the first total token value, in the case where the subtracted first total token value is less than the predetermined upper limit value.
摘要翻译：所述分组传输装置包括：存储令牌值的第一和第二存储模块; 令牌控制器，用于将预定的令牌值添加到第一总令牌值，并且响应于所述分组的输出从所述第一总值中减去预定的令牌值; 超额状态控制器，在通过相加控制添加的第一总令牌值大于或等于预定上限的情况下，将超过预定上限值的超过第一总令牌值添加到第二总令牌值值; 以及欠运行状态控制器，用于从所述第二总令牌值中减去预定的令牌值，并且在减去的所述第一总令牌值小于所述预定上限值的情况下将所述减去的令牌值加到所述第一总令牌值。

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