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1. 发明授权

US09495793B2 Method and device for generating an image view for 3D display 有权
标题翻译：用于生成3D显示图像视图的方法和设备
公开(公告)号：US09495793B2
公开(公告)日：2016-11-15
申请号：US13993368
申请日：2011-12-21
申请人： Laurent Pasquier , Yves Mathieu , Jean Gobert
发明人： Laurent Pasquier , Yves Mathieu , Jean Gobert
IPC分类号： G06T15/08 , G06T15/20 , H04N13/00 , G06T15/04
CPC分类号： G06T15/08 , G06T15/04 , G06T15/205 , H04N13/111
摘要： There is described a method for generating an image view from at least one input image for a 3D display using a backward processing enabling post processing for handling holes in the image view.
摘要翻译：描述了一种用于使用后处理使至少一个用于3D显示的输入图像生成图像视图的方法，该后处理使得后处理能够处理图像视图中的孔。

2. 发明申请

US20140293018A1 Method and Device for Generating an Image View for 3D Display 有权
标题翻译：用于生成3D显示的图像视图的方法和设备
公开(公告)号：US20140293018A1
公开(公告)日：2014-10-02
申请号：US13993368
申请日：2011-12-21
申请人： Laurent Pasquier , Yves Mathieu , Jean Gobert
发明人： Laurent Pasquier , Yves Mathieu , Jean Gobert
IPC分类号： G06T15/08 , G06T15/04
CPC分类号： G06T15/08 , G06T15/04 , G06T15/205 , H04N13/111
摘要： There is described a method for generating an image view from at least one input image for a 3D display using a backward processing enabling post processing for handling holes in the image view.
摘要翻译：描述了一种用于使用后处理使至少一个用于3D显示的输入图像生成图像视图的方法，该后处理使得后处理能够处理图像视图中的孔。

3. 发明授权

US07319697B2 Data communication system according to a packet-switching principle 有权
标题翻译：数据通信系统根据分组交换原理
公开(公告)号：US07319697B2
公开(公告)日：2008-01-15
申请号：US10321201
申请日：2002-12-17
申请人： Marc Duranton , Laurent Pasquier , Valerie Rivierre , Qin Zhao
发明人： Marc Duranton , Laurent Pasquier , Valerie Rivierre , Qin Zhao
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L69/04 , H04L29/06 , H04L69/22
摘要： The present invention relates to a communicating data system comprising devices (11, 12, 13, 14) for routing said data that are interconnected by communication links, the data being transmitted in packets and a packet comprising a header. A transmitting part of a first routing device (12) comprises first storage means suitable for storing a value of at least one parameter from said header and for transmitting a coded value corresponding thereto, and first entropy coding compression means which are suitable for recoding the uncoded value, the recoded value being stored instead of the coded value after the latter is transmitted along a communication link (15). A receiving part of a second routing device (13), that is connected to the first routing device by the communication link, comprises second storage means suitable for storing the coded value coming from the communication link (15) and for transmitting the uncoded value corresponding thereto, and second entropy coding compression means which are suitable for recoding the uncoded value, the recoded value being stored instead of the coded value.
摘要翻译：通信数据系统技术领域本发明涉及一种通信数据系统，其包括用于路由通过通信链路互连的所述数据的装置（11,12,13,14），所述数据以分组方式发送，以及包括报头的分组。第一路由设备（12）的发送部分包括适于存储来自所述报头的至少一个参数的值并用于发送与其对应的编码值的第一存储装置，以及适于重新编码未编码的第一熵编码压缩装置值，在沿着通信链路（15）发送后，重新编码的值被存储而不是编码值。通过通信链路连接到第一路由设备的第二路由设备（13）的接收部分包括适于存储来自通信链路（15）的编码值的第二存储装置，并且用于发送对应的未编码值以及适于重新编码未编码值的第二熵编码压缩装置，代替编码值存储重新编码的值。

4. 发明申请

US20050154857A1 Data processing system 有权
标题翻译：数据处理系统
公开(公告)号：US20050154857A1
公开(公告)日：2005-07-14
申请号：US10510587
申请日：2003-03-31
申请人： Marc Duranton , Laurent Pasquier , Valerie Rivierre , Qin Zhao
发明人： Marc Duranton , Laurent Pasquier , Valerie Rivierre , Qin Zhao
IPC分类号： G06F9/30 , G06F9/38 , G06F12/06 , G06F15/00
CPC分类号： G06F9/30141 , G06F9/30112 , G06F9/3012 , G06F9/3885
摘要： The invention relates to a processing system comprising a calculation device comprising at least one calculation unit (13), a storage device and a system for switching between the storage device and the calculation device. In order to reduce the size of the switching system, the storage device comprises several banks of registers (21, 22) for storing words, the switching system comprises at least one switching device (24) associated with each bank of registers and the calculation units exchange a word with a bank of registers by means of the associated switching device.
摘要翻译：本发明涉及一种包括计算装置的处理系统，所述计算装置包括至少一个计算单元（13），存储装置和用于在所述存储装置和所述计算装置之间切换的系统。为了减小开关系统的尺寸，存储装置包括用于存储字的多组寄存器（21,22），该开关系统包括与每一组寄存器相关的至少一个开关装置（24）和计算单元通过相关的交换设备与一组寄存器交换一个字。

5. 发明授权

US5893509A Apparatus for making wire connections on semiconductor chips 失效
标题翻译：用于在半导体芯片上进行电线连接的装置
公开(公告)号：US5893509A
公开(公告)日：1999-04-13
申请号：US837369
申请日：1997-04-17
申请人： Laurent Pasquier
发明人： Laurent Pasquier
IPC分类号： H01L21/60 , B23K20/00 , H05K13/06
CPC分类号： H01L24/78 , B23K20/005 , H01L2224/48091 , H01L2224/78301 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01013 , H01L2924/0102 , H01L2924/01023 , H01L2924/01033 , H01L2924/01039 , H01L2924/01082 , H01L2924/14 , Y10T403/32163 , Y10T403/45
摘要： In an apparatus known as a wire bonder, a new type of one-piece joint element (20) is used as the articulated link (G) between a support unit (pivoting rocker 30) and a bonding unit (10) that carries a capillary (12). One or more such joint elements (20) define a virtual pivot axis (A2) for the unit (10), which lies outside the unit and thus provides a passage in the apparatus wide enough for relatively wide workpieces (chips 1 on substrate 2). A joint element (20a) is made in one piece and has at least two elastically flexible blades (22a) converging toward each other relative to a symmetry plane (S), and the blades are connected to each other by two rigid sections (23a, 24a). One of the rigid sections (23a) is attached to (and removable from) the support unit (30), the other (24a) is attached to (and removable from) the bonding unit (10), so that the joint element (20) is easy to fit or exchange.
摘要翻译：在称为引线接合机的装置中，新型的一体式连接元件（20）用作支撑单元（枢转摇杆30）和承载毛细管的接合单元（10）之间的铰接连杆（G）（12）。一个或多个这样的关节元件（20）限定用于单元（10）的虚拟枢转轴线（A2），其位于单元外部，从而在相对较宽的工件（衬底2上的芯片1）上足够宽的设备中提供通道，。关节元件（20a）制成一体并且具有至少两个相对于对称平面（S）朝向彼此会聚的弹性柔性叶片（22a），并且叶片通过两个刚性部分（23a， 24a）。刚性部分（23a）中的一个附接到支撑单元（或可移除的）支撑单元（30），另一个（24a）附接到（或从其移除）接合单元（10），使得接头元件（20））容易适应或交换。

6. 发明申请

US20060036665A1 Data processing circuit 有权
标题翻译：数据处理电路
公开(公告)号：US20060036665A1
公开(公告)日：2006-02-16
申请号：US10522463
申请日：2003-07-09
申请人： Marc Duranton , Laurent Pasquier , Valerie Rivierre , Qin Zhao
发明人： Marc Duranton , Laurent Pasquier , Valerie Rivierre , Qin Zhao
IPC分类号： G06F17/10
CPC分类号： H03H17/0294
摘要： The invention relates to a data processing system for performing a polyphase filtering. This circuit comprises functional units (304, 305, 306) able to perform polyphase filterings, and a memory device (301, 302, 308) for storing data and coefficients. The functional units receive in parallel data and coefficients coming from the memory device, calculate results from the data and coefficients and supply these results to the memory device.
摘要翻译：本发明涉及一种用于执行多相滤波的数据处理系统。该电路包括能够执行多相滤波的功能单元（304,305,306）以及用于存储数据和系数的存储器件（301,302,308）。功能单元接收来自存储器件的并行数据和系数，从数据和系数计算结果并将这些结果提供给存储器件。

7. 发明授权

US07126503B2 Digital sampling frequency converter 失效
标题翻译：数字采样变频器
公开(公告)号：US07126503B2
公开(公告)日：2006-10-24
申请号：US10539197
申请日：2003-12-05
申请人： Laurent Pasquier , Marc Duranton , Qin Zhao
发明人： Laurent Pasquier , Marc Duranton , Qin Zhao
IPC分类号： H03M7/00
CPC分类号： H03H17/0275 , H03H17/0294 , H03H17/0685
摘要： The present invention relates to a converter converting an input digital signal into an output digital signal. Said converter comprises in particular a set of shift registers able to contain samples of the input or output digital signal. It also comprises a calculation unit able to supply a shift signal (4) to said set of registers. Said calculation unit comprises a first storage unit (51) able to contain a value of a conversion ratio or of its inverse, so that the value stored is between 0 and 1. It also comprises a second storage unit (52) able to contain, at a cycle time i+1, i being an integer, a future signal (8) equal to a sum of a current signal (7) contained in the second unit at a cycle time i and of the content of the first storage unit. The shift signal then results from an exclusive OR function (54) between a most significant bit of the current signal (71) and a most significant bit of the future signal (81).
摘要翻译：本发明涉及将输入数字信号转换为输出数字信号的转换器。所述转换器特别包括能够包含输入或输出数字信号的采样的一组移位寄存器。它还包括能够向所述寄存器组提供移位信号（4）的计算单元。所述计算单元包括能够包含转换比值或其逆的第一存储单元（51），使得存储的值在0和1之间。它还包括第二存储单元（52）在周期时间i + 1，i是整数，等于在循环时间i包含在第二单元中的当前信号（7）和第一存储单元的内容之和的未来信号（8）。然后，移位信号由当前信号（71）的最高有效位和未来信号（81）的最高有效位之间的异或功能（54）产生。

8. 发明申请

US20060221079A1 Method and system for filling in a parallelogram 审中-公开
标题翻译：填充平行四边形的方法和系统
公开(公告)号：US20060221079A1
公开(公告)日：2006-10-05
申请号：US10554013
申请日：2004-04-15
申请人： Qin Zhao , Laurent Pasquier , Marc Duranton
发明人： Qin Zhao , Laurent Pasquier , Marc Duranton
IPC分类号： G06T11/20
CPC分类号： G06T11/40
摘要： The invention relates to a method of tracing and filling in a parallelogram (ABCD), comprising a first vertex (A), a second vertex (B), a third vertex (C) and a fourth vertex (D) on a discrete grid of a graphics screen from knowledge of the coordinates of its vertices. The method according to the invention comprises a step (10) of calculating the coordinates of the points on a first segment (AB) between the first vertex (A) and the second vertex (B), a step (11) of calculating the coordinates of the points on a second segment (AC) between the first vertex (A) and the third vertex (C), a step (12) of calculating the coordinates of the points on a third segment (BD) between the second vertex (BD) and the fourth vertex D and an iterative step (20) of calculating the coordinates of the points on a segment parallel to the segment AB and included within the parallelogram ABCD. Advantageously, the steps of calculating coordinates of the points on a segment use a so-called mid-point algorithm or Bresenham's algorithm.
摘要翻译：本发明涉及一种跟踪和填充平行四边形（ABCD）的方法，包括在离散网格上的第一顶点（A），第二顶点（B），第三顶点（C）和第四顶点（D）从其顶点的坐标知识的图形屏幕。根据本发明的方法包括：计算第一顶点（A）和第二顶点（B）之间的第一段（AB）上的点的坐标的步骤（10）;计算坐标在第一顶点（A）和第三顶点（C）之间的第二段（AC）上的点的第二顶点（BD）之间的第三段（BD）上的点的坐标的步骤（12））和第四顶点D以及迭代步骤（20），其计算平行于段AB且包括在平行四边形ABCD内的段上的点的坐标。有利地，计算段上的点的坐标的步骤使用所谓的中点算法或Bresenham算法。

9. 发明申请

US20060132172A1 Digital sampling frequency converter 失效
公开(公告)号：US20060132172A1
公开(公告)日：2006-06-22
申请号：US10539197
申请日：2003-12-05
申请人： Laurent Pasquier , Marc Duranton , Qin Zhao
发明人： Laurent Pasquier , Marc Duranton , Qin Zhao
IPC分类号： H03K19/003 , H03K17/16
CPC分类号： H03H17/0275 , H03H17/0294 , H03H17/0685
摘要： The present invention relates to a converter converting an input digital signal into an output digital signal. Said converter comprises in particular a set of shift registers able to contain samples of the input or output digital signal. It also comprises a calculation unit able to supply a shift signal (4) to said set of registers. Said calculation unit comprises a first storage unit (51) able to contain a value of a conversion ratio or of its inverse, so that the value stored is between 0 and 1. It also comprises a second storage unit (52) able to contain, at a cycle time i+1, i being an integer, a future signal (8) equal to a sum of a current signal (7) contained in the second unit at a cycle time i and of the content of the first storage unit. The shift signal then results from an exclusive OR function (54) between a most significant bit of the current signal (71) and a most significant bit of the future signal (81).

10. 发明申请

US20060115150A1 Calculation method of a cumulative histogram 审中-公开
标题翻译：累积直方图的计算方法
公开(公告)号：US20060115150A1
公开(公告)日：2006-06-01
申请号：US10517285
申请日：2003-06-05
申请人： Olivier Gay-Bellile , Laurent Pasquier
发明人： Olivier Gay-Bellile , Laurent Pasquier
IPC分类号： G06K9/00
CPC分类号： G06T5/40
摘要： The invention relates to a calculation method of a cumulative histogram. Such a method comprises calculation stages in which at least two additions are used in parallel. Each addition permits to calculate an addition result. The additions are made either with two histogram values or with one histogram value and one addition result calculated during a previous calculation stage, or with two addition results calculated during one or two previous calculation stages.
摘要翻译：本发明涉及累积直方图的计算方法。这种方法包括计算阶段，其中并行使用至少两个添加。每个添加允许计算加法结果。添加物可以用两个直方图值或一个直方图值和一个在先前计算阶段计算的相加结果，或者在一个或两个先前计算阶段计算的两个加法结果。

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