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1. 发明授权

US08315567B2 Method and system for wireless communication with an integrated circuit under evaluation 有权
标题翻译：用于与评估中的集成电路进行无线通信的方法和系统
公开(公告)号：US08315567B2
公开(公告)日：2012-11-20
申请号：US10672656
申请日：2003-09-26
申请人： Lawrence Allen Rigge
发明人： Lawrence Allen Rigge
IPC分类号： H04B7/00 , H01Q1/40
CPC分类号： H04W24/08 , H04W24/00
摘要： A method and apparatus are provided for wireless communication between an integrated circuit device and a monitoring station. Each integrated circuit device has one or more antennas that permit wireless communication with an external monitoring station. A signal destined for an integrated circuit device is transmitted by the monitoring station using an associated antenna. An antenna associated with the destination integrated circuit receives the transmitted signal. The antenna(s) may be embodied, for example, as pins that are external to the integrated circuit device, or printed or etched on the integrated circuit device itself. Greater bandwidth can be achieved, if necessary, by pooling the bandwidth of several antennas.
摘要翻译：提供了一种用于集成电路设备和监控站之间的无线通信的方法和装置。每个集成电路设备具有允许与外部监视站的无线通信的一个或多个天线。用于集成电路装置的信号由监测站使用相关天线发送。与目的地集成电路相关联的天线接收所发送的信号。天线可以例如被实现为集成电路器件外部的引脚，或者在集成电路器件本身上印刷或蚀刻。如果需要，可以通过汇集多个天线的带宽来实现更大的带宽。

2. 发明授权

US06092179A Core processor with customizable function unit 失效
标题翻译：具有可定制功能单元的核心处理器
公开(公告)号：US06092179A
公开(公告)日：2000-07-18
申请号：US963091
申请日：1997-11-03
申请人： Alan Joel Greenberger , Lawrence Allen Rigge , Mark Ernest Thierbach
发明人： Alan Joel Greenberger , Lawrence Allen Rigge , Mark Ernest Thierbach
IPC分类号： G06F7/57 , G06F9/318 , G06F9/38 , G06F13/16 , G06F13/40 , G06F15/78
CPC分类号： G06F7/57 , G06F9/30181 , G06F9/3877 , G06F9/3885 , G06F9/3897
摘要： An application-specific single chip digital processor having flexible design expansion capability with minimal impact on the performance of a processor core. The processor core has an ALU and a register file (accumulators). The output of the ALU is connected to a multiplexer whose output is connected to the input of the register file. The output of the register file connects to one input of the ALU. A function unit, separate from the core, has an input connected to the output of the register file and an output connected to another input to the multiplexer. The core operates with a predefined instruction set. The function unit, which may be redesigned depending on the application, operates with a reserved (uncommitted) instruction set under control of the core.
摘要翻译：具有灵活设计扩展能力的应用专用单芯片数字处理器，对处理器内核的性能影响最小。处理器内核具有ALU和寄存器文件（累加器）。 ALU的输出连接到多路复用器，其输出端连接到寄存器文件的输入。寄存器文件的输出连接到ALU的一个输入。与核心分离的功能单元具有连接到寄存器文件的输出的输入和连接到多路复用器的另一输入的输出。内核使用预定义的指令集进行操作。可以根据应用重新设计的功能单元在核心控制下使用保留（未提交）指令集。

3. 发明授权

US08738023B2 Method and apparatus for automatic determination of optimal user device location in a wireless network 有权
标题翻译：用于在无线网络中自动确定最佳用户设备位置的方法和装置
公开(公告)号：US08738023B2
公开(公告)日：2014-05-27
申请号：US10668544
申请日：2003-09-23
申请人： Thaddeus John Gabara , Lawrence Allen Rigge
发明人： Thaddeus John Gabara , Lawrence Allen Rigge
IPC分类号： H04W24/00
CPC分类号： H04W4/02 , H04W24/08
摘要： Techniques are disclosed for automatic generation of a location-indicative instruction displayable to one or more users in a communication system which includes a wireless network comprising a plurality of user devices adapted for communication with at least one access point device. A test of a communication link between at least one of the user devices and the access point device is initiated. Based at least in part on a result of the test, an instruction displayable to a user associated with a given one of the user devices is generated, the instruction being indicative of a location at which the given user device is expected to obtain a particular level of data throughput performance.
摘要翻译：公开了用于自动生成可显示给通信系统中的一个或多个用户的位置指示指令的技术，该通信系统包括包括适于与至少一个接入点设备进行通信的多个用户设备的无线网络。开始对至少一个用户设备和接入点设备之间的通信链路的测试。至少部分地基于测试的结果，生成可向用户显示与给定的一个用户设备相关联的指令，该指令指示给定用户设备预期获得特定级别的位置的数据吞吐量性能。

4. 发明授权

US07404146B2 Input device for portable handset 有权
标题翻译：便携式手机输入装置
公开(公告)号：US07404146B2
公开(公告)日：2008-07-22
申请号：US10855458
申请日：2004-05-27
申请人： David James Bennetts , Lawrence Allen Rigge , Paul Robert Smith , Richard Verney
发明人： David James Bennetts , Lawrence Allen Rigge , Paul Robert Smith , Richard Verney
IPC分类号： G06F3/00 , G06F3/048 , A63B57/00 , A63B69/36
CPC分类号： G06F3/0489 , G06F3/0362 , H04B1/385 , H04M1/72583
摘要： There is disclosed an input device including a display for displaying a plurality of icons, and a selector for selecting a displayed icon. At least a portion of the display is an electronic display. The device is adapted such that the selector moves relative to the display between a plurality of positions. At least one position corresponds to a displayed icon. The device further includes a function selection means. A function associated with an icon corresponding to a current position of the selector is selected when the function selection means is enabled.
摘要翻译：公开了一种包括用于显示多个图标的显示器的输入装置和用于选择所显示的图标的选择器。显示器的至少一部分是电子显示器。该装置适于使得选择器相对于多个位置之间的显示器移动。至少一个位置对应于显示的图标。该装置还包括功能选择装置。当功能选择装置被使能时，选择与选择器的当前位置对应的图标相关联的功能。

5. 发明授权

US5802382A Flexible single chip digital processor architecture 失效
标题翻译：灵活的单片机数字处理器架构
公开(公告)号：US5802382A
公开(公告)日：1998-09-01
申请号：US415098
申请日：1995-03-31
申请人： Alan Joel Greenberger , Lawrence Allen Rigge , Mark Ernest Thierbach
发明人： Alan Joel Greenberger , Lawrence Allen Rigge , Mark Ernest Thierbach
IPC分类号： G06F7/57 , G06F9/318 , G06F9/38 , G06F13/16 , G06F13/40 , G06F15/78 , G06F9/44 , G06F13/38
CPC分类号： G06F7/57 , G06F9/30181 , G06F9/3877 , G06F9/3885 , G06F9/3897
摘要： An application-specific single chip digital processor having flexible design expansion capability with minimal impact on the performance of a processor core. The processor core has an ALU and a register file (accumulators). The output of the ALU is connected to a multiplexer whose output is connected to the input of the register file. The output of the register file connects to one input of the ALU. A function unit, separate from the core, has an input connected to the output of the register file and an output connected to another input to the multiplexer. The core operates with a predefined instruction set. The function unit, which may be redesigned depending on the application, operates with a reserved (uncommitted) instruction set under control of the core.
摘要翻译：具有灵活设计扩展能力的应用专用单芯片数字处理器，对处理器内核的性能影响最小。处理器内核具有ALU和寄存器文件（累加器）。 ALU的输出连接到多路复用器，其输出端连接到寄存器文件的输入。寄存器文件的输出连接到ALU的一个输入。与核心分离的功能单元具有连接到寄存器文件的输出的输入和连接到多路复用器的另一输入的输出。内核使用预定义的指令集进行操作。可以根据应用重新设计的功能单元在核心控制下使用保留（未提交）指令集。

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