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    • 2. 发明授权
    • Liquid crystal display apparatus and method of driving LCD panel
    • 液晶显示装置及其驱动方法
    • US07580018B2
    • 2009-08-25
    • US10829177
    • 2004-04-22
    • Hiroshi TakedaMachihiko Yamaguchi
    • Hiroshi TakedaMachihiko Yamaguchi
    • G09G3/36
    • G09G3/3648G09G2310/02G09G2320/0223
    • In a liquid crystal display apparatus, a set of write-in voltages are generated corresponding to a horizontal line signal of an input video frame so that they appear at end points of the column lines of a LCD panel. The row lines of the LCD panel are successively selected and the write-in voltages are supplied from the end points of the column lines to the liquid crystal cells of the selected row line for a variable write-in period. In order to compensate for shades-of-gray differences between the top and bottom of the LCD panel, the write-in period is increasingly varied as a function of the geometric distance from the selected row line to the end points of the column lines. The write-in period may be increasingly variable from a nominal value, or from a less-than-nominal value to the nominal value, or a combination of both.
    • 在液晶显示装置中,对应于输入视频帧的水平线信号产生一组写入电压,使得它们出现在LCD面板的列线的端点处。 连续选择LCD面板的行线,并将写入电压从列线的端点供给到所选行行的液晶单元,用于可变写入周期。 为了补偿LCD面板的顶部和底部之间的灰度差异,写入周期随着从所选行线到列线的端点的几何距离的函数而变化。 写入周期可能从标称值或从小于标称值到标称值或两者的组合变得越来越大。
    • 4. 发明授权
    • Display apparatus displaying pseudo gray levels and method for displaying the same
    • 显示伪灰度级的显示装置及其显示方法
    • US06788306B2
    • 2004-09-07
    • US09987600
    • 2001-11-15
    • Machihiko YamaguchiYouji Hirano
    • Machihiko YamaguchiYouji Hirano
    • G09G502
    • G09G3/2011G09G3/2025G09G3/2059G09G3/3611
    • A display apparatus is composed of a pseudo gray level data processor generating pseudo gray level data having m bits based on input gray level data having n bits. The pseudo gray level data processor includes a state variable generator generating a state variable data having n−m bits, based on lower n−m bits of the input gray level data, an adder calculating a sum of the lower n−m bits of the input gray level data and the state variable data to output a carry bit representative of carry-over of the sum, and a pseudo gray level data calculator generating the pseudo gray level data based on the input gray level data and the carry bit. The pseudo gray level data calculator defines the pseudo gray level data such that the pseudo gray level data equals upper m bits of the input gray level data in a first case when the carry bit is “0” and the input gray level belongs to first gray levels of the 2n gray levels, and such that upper m−1 bits of the pseudo gray level data equals upper m−1 bits of the input gray level data and LSB (least significant bit) of the pseudo gray level data is selected from “0” and “1” in a second case when the carry bit is “1” and the input gray level data belongs to the first gray levels.
    • 显示装置由伪灰度级数据处理器构成,该伪灰度级数据处理器基于具有n位的输入灰度级数据产生具有m位的伪灰度级数据。 伪灰度级数据处理器包括状态变量发生器,其基于输入灰度级数据的较低的nm位产生具有nm位的状态变量数据,加法器计算输入灰度级数据的低位位数和 状态变量数据,以输出代表和的进位的进位位;以及伪灰度级数据计算器,基于输入的灰度级数据和进位位产生伪灰度级数据。 伪灰度级数据计算器定义伪灰度级数据,使得当进位位为“0”并且输入灰度级属于第一灰色时,伪灰度级数据等于输入灰度级数据的高位m位 并且使得伪灰度级数据的上位m-1位等于输入灰度级数据的高位m-1位,伪灰度级数据的LSB(最低有效位)为 在进位位为“1”的第二种情况下,从“0”和“1”中选择,输入的灰度级数据属于第一灰度级。
    • 5. 发明授权
    • Image display method and image display device
    • 图像显示方法和图像显示装置
    • US07126572B2
    • 2006-10-24
    • US10396329
    • 2003-03-26
    • Koichi KogaNoboru OkuzonoMachihiko Yamaguchi
    • Koichi KogaNoboru OkuzonoMachihiko Yamaguchi
    • G09G3/36G09G5/10
    • G09G3/2025G09G3/2003G09G3/2077G09G3/2092G09G3/3648G09G5/02G09G2320/0233G09G2320/0247
    • A display panel 13 having a plurality of pixels 14 each divided into P (P=3) sub-pixels 15a, 15b and 15c, and a source driver 12 for driving each pixel 14 in accordance with three J (=8)-bit data values corresponding to the sub-pixels 15a, 15b, and 15c, and a signal processing circuit 12 for distributing K(=12)-bit (K>J) input image data as M (M=6) time-shared frame data values and supplying the frame data values to the source driver 12 are arranged. 2K−J (=16) gray levels insufficient due to the difference between the numbers of bits of K-bit input image data and J-bit driving signals of the source driver 12 is realized by combinations of time-shared frame data of (P×M=18) ways performed for the sub-pixels 15a, 15b, and 15c in accordance with the M time-shared frame data values.
    • 具有分成P(P = 3)个子像素15a,15b和15c的多个像素14的显示面板13以及根据三个J(= 8)驱动每个像素14的源极驱动器12, 对应于子像素15 a,15 b和15 c的位数据值,以及用于将K(= 12)位(K> J)输入图像数据分配为M(M = 6)的信号处理电路12, 布置了时间共享帧数据值并将帧数据值提供给源驱动器12。 由于K位输入图像数据的位数和源极驱动器12的J位驱动信号之间的差异,由于时间 - 频率的组合实现了2kHz(= 16)的灰度级, 根据M个时间共享帧数据值对子像素15 a,15 b和15 c执行的(PxM = 18)方式的共享帧数据。
    • 6. 发明授权
    • Liquid crystal display control circuit
    • 液晶显示控制电路
    • US06894673B2
    • 2005-05-17
    • US10192101
    • 2002-07-10
    • Koichi KogaNoboru OkuzonoMachihiko Yamaguchi
    • Koichi KogaNoboru OkuzonoMachihiko Yamaguchi
    • G02F1/133G09G3/20G09G3/36H04N5/66
    • G09G3/3611G09G3/3677
    • A liquid crystal display control circuit receives a data enable signal DE in synchronization with per-line based display data from a computer, and thereby controls a liquid crystal display. A gate drive signal outputted from a gate driver 23 is generated according to a vertical clock signal VCK in synchronization with a rise of the signal DE. In order to avoid a variation in the period of charging the pixel electrodes which is caused by a delay in the rise timing of the signal DE and a delay in the signal VCK after the last line, a gate enable signal generation circuit 10 is provided in the liquid crystal display control circuit 1, whereby the extended output of the pulse of the gate drive signal caused by the above-mentioned delays is inhibited. This avoids display inhomogeneity caused by a variation in the data enable signal and the like.
    • 液晶显示控制电路与来自计算机的基于行的显示数据同步地接收数据使能信号DE,从而控制液晶显示器。 与信号DE的上升同步地,根据垂直时钟信号VCK产生从栅极驱动器23输出的栅极驱动信号。 为了避免由于信号DE的上升时间的延迟和最后一行之后的信号VCK中的延迟引起的像素电极的充电周期的变化,栅极使能信号生成电路10被设置在 液晶显示控制电路1,由此抑制由上述延迟引起的栅极驱动信号的脉冲的扩展输出。 这避免了由数据使能信号等的变化引起的显示不均匀性。