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1. 发明授权

US08479139B1 Automatic routing system with variable width interconnect 有权
标题翻译：具有可变宽度互连的自动路由系统
公开(公告)号：US08479139B1
公开(公告)日：2013-07-02
申请号：US12833886
申请日：2010-07-09
申请人： Graham Baldsdon , Jeremy Birch , Mark Williams , Mark Waller , Tim Parker , Fumiaki Sato
发明人： Graham Baldsdon , Jeremy Birch , Mark Williams , Mark Waller , Tim Parker , Fumiaki Sato
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , G06F2217/78
摘要： A system automatically routes interconnect of an integrated circuit design using variable width interconnect lines. For example, a first automatically routed interconnect may have a different width from a second automatically routed interconnect. The system will vary the width of the interconnect lines based on certain factors or criteria. These factors include current or power handling, reliability, electromigration, voltage drops, self-heating, optical proximity effects, or other factors, or combinations of these factors. The system may use a gridded or a gridless (or shape-based) approach.
摘要翻译：系统使用可变宽度的互连线路自动路由集成电路设计的互连。例如，第一自动路由互连可以具有与第二自动路由互连不同的宽度。系统将根据某些因素或标准改变互连线的宽度。这些因素包括电流或功率处理，可靠性，电迁移，电压降，自热，光学邻近效应或其他因素，或这些因素的组合。该系统可以使用网格或无网格（或基于形状的）方法。

2. 发明授权

US07984411B2 Integrated circuit routing and compaction 有权
标题翻译：集成电路布线和压实
公开(公告)号：US07984411B2
公开(公告)日：2011-07-19
申请号：US12552183
申请日：2009-09-01
申请人： Mark Waller
发明人： Mark Waller
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： An iterative technique is used to automatically route nets and alter spacing of an integrated circuit design to achieve a fully routed and compact result. After identifying cells rows and channel, which are gaps between the rows, the technique determines which nets should be routed in which areas. Spine routing is used for nets than span more than one row or channel. Alter the space between rows, larger or smaller, which will allow routing of the nets.
摘要翻译：迭代技术用于自动路由网络并改变集成电路设计的间距，以实现完全路由和紧凑的结果。在识别单元行和通道（哪些是行之间的间隙）之后，该技术确定哪些网络应在哪些区域中路由。脊线路由用于网络跨越多个行或通道。改变更大或更小的行之间的空间，这将允许网络的路由。

3. 发明授权

US07802208B1 Design automation using spine routing 有权
标题翻译：使用脊柱路由设计自动化
公开(公告)号：US07802208B1
公开(公告)日：2010-09-21
申请号：US11838704
申请日：2007-08-14
申请人： Mark Waller , Tim Parker , Mark Williams , Jeremy Birch , Graham Balsdon , Fumiako Sato
发明人： Mark Waller , Tim Parker , Mark Williams , Jeremy Birch , Graham Balsdon , Fumiako Sato
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： A method and technique of routing interconnects of an integrated circuit providing improved routing quality. In an embodiment of the invention, the technique provides linear spine interconnect routing. In memory array blocks, such as in DRAM and SRAM memory designs, connected pins are generally separated by large distances in a first direction and small distances in a second direction, or a spine or channel region. A route area is defined within the spine region. In one embodiment, obstacles in the route area are identified and corresponding forbidden areas are demarcated. The linear spine interconnect is routed in the first direction within the route area while avoiding the forbidden areas. Pins are connected to the spine interconnect by stitching interconnects. Stitching interconnects are generally routed in the second direction.
摘要翻译：提供提供改进的路由质量的集成电路的互连路由的方法和技术。在本发明的一个实施例中，该技术提供线性脊柱互连路由。在诸如DRAM和SRAM存储器设计的存储器阵列块中，连接的引脚通常在第一方向上分开大距离，在第二方向或脊柱或通道区域上分开小距离。在脊椎区域内定义路线区域。在一个实施例中，识别路线区域中的障碍物并且划定对应的禁止区域。线性脊线互连在路线区域内沿第一方向路由，同时避免禁止区域。引脚通过缝合互连连接到脊柱互连。缝合互连通常沿第二方向布线。

4. 发明授权

US07363607B2 Method of automatically routing nets according to parasitic constraint rules 有权
标题翻译：根据寄生约束规则自动布线网络的方法
公开(公告)号：US07363607B2
公开(公告)日：2008-04-22
申请号：US11164518
申请日：2005-11-28
申请人： Jeremy Birch , Mark Waller , Mark Williams , Graham Balsdon , Fumiaki Sato , Tim Parker
发明人： Jeremy Birch , Mark Waller , Mark Williams , Graham Balsdon , Fumiaki Sato , Tim Parker
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： A system of automatically routing interconnect of a integrated circuit design while taking into consideration the parasitic issues of the wiring as it is created. The system will be able to select an appropriate wiring pattern so that signals meet their performance requirements.
摘要翻译：一种自动布线集成电路设计互连的系统，同时考虑到它所产生的布线的寄生问题。该系统将能够选择合适的布线图案，使信号满足其性能要求。

5. 发明申请

US20060294488A1 Integrated Circuit Routing and Compaction 有权
公开(公告)号：US20060294488A1
公开(公告)日：2006-12-28
申请号：US11425828
申请日：2006-06-22
申请人： Mark Waller
发明人： Mark Waller
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： An iterative technique is used to automatically route nets and alter spacing of an integrated circuit design to achieve a fully routed and compact result. After identifying cells rows and channel, which are gaps between the rows, the technique determines which nets should be routed in which areas. Spine routing is used for nets than span more than one row or channel. Alter the space between rows, larger or smaller, which will allow routing of the nets.

6. 发明授权

US07131096B1 Method of automatically routing nets according to current density rules 有权
标题翻译：根据当前密度规则自动布线网络的方法
公开(公告)号：US07131096B1
公开(公告)日：2006-10-31
申请号：US10709843
申请日：2004-06-01
申请人： Graham Balsdon , Jeremy Birch , Mark Williams , Mark Waller , Tim Parker , Fumiaki Sato
发明人： Graham Balsdon , Jeremy Birch , Mark Williams , Mark Waller , Tim Parker , Fumiaki Sato
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： A technique will automatically route interconnect of an integrated circuit while taking into consideration current density rules. In an implementation, the technique uses a shape-based approach where a grid is not used. Based on data input including current density and a frequency of each net, the technique will determine the current requirements for each net. In an implementation, the technique forms a Steiner tree for a net, and routs using the Steiner tree. The technique widens nets having greater current requirements; adjacent wiring may be pushed aside to create sufficient space for wider nets.
摘要翻译：一种技术将自动路由集成电路的互连，同时考虑电流密度规则。在实现中，该技术使用基于形状的方法，其中不使用网格。基于数据输入，包括电流密度和每个网络的频率，该技术将确定每个网络的当前要求。在实现中，该技术为网络形成Steiner树，并使用Steiner树进行路由。该技术扩大了具有更大电流要求的网络; 可以将相邻的布线推到一边以产生用于更宽的网的足够的空间。

7. 发明授权

US5911978A Hair treatment composition 失效
标题翻译：头发处理组成
公开(公告)号：US5911978A
公开(公告)日：1999-06-15
申请号：US959863
申请日：1997-10-29
申请人： Stuart William Carr , Melvin Carvell , Paul Alfred Cornwell , Therese Desmond , Andrew Mark Waller , Johann Wilhelm Wiechers
发明人： Stuart William Carr , Melvin Carvell , Paul Alfred Cornwell , Therese Desmond , Andrew Mark Waller , Johann Wilhelm Wiechers
IPC分类号： A61K8/00 , A61K8/44 , A61K8/58 , A61K8/73 , A61K8/81 , A61Q5/00 , A61Q5/02 , C11D3/20 , A61K7/07 , A61K7/00
CPC分类号： A61K8/737 , A61K8/27 , A61K8/44 , A61K8/447 , A61K8/8158 , A61Q5/02 , A61K2800/5426 , A61K2800/58
摘要： A rinse-off hair treatment composition for improved delivery of amino-acid to the hair and/or scalp comprising:(a) a particulate metal-amino acid complex;(b) at least one surfactant; and(c) a deposition aid.
摘要翻译：一种用于改善向毛发和/或头皮递送氨基酸的漂洗毛发处理组合物，其包含：（a）金属 - 氨基酸复合物; （b）至少一种表面活性剂; 和（c）沉积助剂。

8. 发明授权

US1383251A Mechanically-propelled plow 失效
标题翻译：机械推进犁
公开(公告)号：US1383251A
公开(公告)日：1921-06-28
申请号：US19353417
申请日：1917-09-27
申请人： MARK WALLER FRANCIS
发明人： MARK WALLER FRANCIS
IPC分类号： A01B3/44
CPC分类号： A01B3/44

9. 发明授权

US08490036B2 System and technique of pattern matching and pattern replacement 有权
标题翻译：模式匹配和模式替换的系统和技术
公开(公告)号：US08490036B2
公开(公告)日：2013-07-16
申请号：US12689150
申请日：2010-01-18
申请人： Mark Waller
发明人： Mark Waller
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： A system and technique to specifies patterns to search for in an integrated circuit layout, and specifies proposed replacement patterns. A description file includes specifications for one or more patterns to be searched for. In the description file, for each pattern, there may be one or more proposed replacement patterns. The description file is read. Pattern matches, if any, in a layout are found. A proposed replacement pattern is tested in place of a matched pattern. If acceptable, the proposed pattern may be used to replace the matched pattern.
摘要翻译：一种用于指定在集成电路布局中搜索的模式并指定所提出的替换模式的系统和技术。描述文件包括要搜索的一个或多个模式的规范。在描述文件中，对于每个模式，可以存在一个或多个所提出的替换模式。描述文件被读取。找到布局中的模式匹配（如果有）。测试提出的替换图案来代替匹配的图案。如果可以接受，则可以使用所提出的模式来替换匹配的模式。

10. 发明申请

US20120110539A1 Automatically Routing Nets with Variable Spacing 有权
标题翻译：自动路由可变间距网络
公开(公告)号：US20120110539A1
公开(公告)日：2012-05-03
申请号：US13346491
申请日：2012-01-09
申请人： Jeremy Birch , Mark Waller , Graham Balsdon
发明人： Jeremy Birch , Mark Waller , Graham Balsdon
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： A technique will automatically route interconnect of an integrated circuit and adjust spacing between tracks or interconnect in order to improve performance or reduce electromigration effects. By increasing spacing between certain tracks or moving tracks, performance can improve because a track will be more noise immunity from nearby tracks on the same layer or on different layers. The automatic router will adjust spacing between tracks depending on one or more factors. These factors may include current associated with a track, width of a track, capacitance, inductance, and electromigration. In a specific implementation, the technique uses a shape-based approach where a grid is not used. The technique may further vary the width of the tracks.
摘要翻译：一种技术将自动路由集成电路的互连，并调整磁道或互连之间的间距，以提高性能或减少电迁移效应。通过增加某些轨道或移动轨道之间的间距，性能可以提高，因为轨道将在相同层或不同层上的附近轨道具有更高的抗噪声能力。自动路由器将根据一个或多个因素来调整轨道之间的间距。这些因素可以包括与轨道相关的电流，轨道的宽度，电容，电感和电迁移。在具体实现中，该技术使用基于形状的方法，其中不使用网格。该技术可以进一步改变轨道的宽度。

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