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    • 10. 发明授权
    • Method of automatic shape-based routing of interconnects in spines for integrated circuit design
    • 用于集成电路设计的脊柱互连的自动形状路由的方法
    • US07257797B1
    • 2007-08-14
    • US10908895
    • 2005-05-31
    • Mark WallerTim ParkerMark WilliamsJeremy BirchGraham BalsdonFumiaki Sato
    • Mark WallerTim ParkerMark WilliamsJeremy BirchGraham BalsdonFumiaki Sato
    • G06F17/50
    • G06F17/5077
    • A method and technique of routing interconnects of an integrated circuit providing improved routing quality. In an embodiment of the invention, the technique provides linear spine interconnect routing. In memory array blocks, such as in DRAM and SRAM memory designs, connected pins are generally separated by large distances in a first direction and small distances in a second direction, or a spine or channel region. A route area is defined within the spine region. In one embodiment, obstacles in the route area are identified and corresponding forbidden areas are demarcated. The linear spine interconnect is routed in the first direction within the route area while avoiding the forbidden areas. Pins are connected to the spine interconnect by stitching interconnects. Stitching interconnects are generally routed in the second direction.
    • 提供提供改进的路由质量的集成电路的互连路由的方法和技术。 在本发明的一个实施例中,该技术提供线性脊柱互连路由。 在诸如DRAM和SRAM存储器设计的存储器阵列块中,连接的引脚通常在第一方向上分开大距离,在第二方向或脊柱或通道区域上分开小距离。 在脊椎区域内定义路线区域。 在一个实施例中,识别路线区域中的障碍物并且划定对应的禁止区域。 线性脊线互连在路线区域内沿第一方向路由,同时避免禁止区域。 引脚通过缝合互连连接到脊柱互连。 缝合互连通常沿第二方向布线。