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    • 3. 发明授权
    • Power delivery over digital interaction interface for video and audio (DiiVA)
    • 视频和音频数字交互接口(DiiVA)
    • US08680712B2
    • 2014-03-25
    • US12636063
    • 2009-12-11
    • Dongyun LeeEdward PakJohn HahnMayank Gupta
    • Dongyun LeeEdward PakJohn HahnMayank Gupta
    • H02J1/00G06F3/00
    • H02J3/02G06F13/14H04L12/10H04L12/40045H04L2012/2849H04N5/63H04N7/108H04N21/436Y10T307/492Y10T307/56
    • A system for delivering power over a network of devices connected through a serial link includes a first and second differential pairs of wires. Each differential pair of wires is double AC coupled by a HPF on one side and by another HPF on an opposite side. An LPF connects a portion of each differential pair of wires between the HPFs to a voltage source, and another LPF connects that portion of each differential pair to a load. The system further includes a third and fourth differential pairs of wires. All four differential pairs of wires are located within a single cable, such as a CAT6 cable. The first, second and third differential pair of wires are used for video links, and the fourth differential pair of wires are used for the bi-directional hybrid link. A power delivery circuit in each device includes a voltage source, a power relay switch, a signature resistor for detection, and a load detector.
    • 用于通过串联链路连接的设备的网络上传送电力的系统包括第一和第二差分线对。 每条差分对导线在一侧由HPF双相交流耦合,另一侧的另一HPF耦合。 LPF将HPF之间的每对差分对导线的一部分连接到电压源,另一个LPF将每个差分对的该部分连接到负载。 该系统还包括第三和第四差动对的导线。 所有四条差分对的导线位于单根电缆内,如CAT6电缆。 第一,第二和第三差分线对用于视频链路,并且第四差分对导线用于双向混合链路。 每个装置中的电力输送电路包括电压源,功率继电器开关,用于检测的签名电阻器和负载检测器。
    • 8. 发明申请
    • POWER DELIVERY OVER DIGITAL INTERACTION INTERFACE FOR VIDEO AND AUDIO (DiiVA)
    • 视频和音频数字交互界面的电源传输(DiiVA)
    • US20100283324A1
    • 2010-11-11
    • US12636063
    • 2009-12-11
    • Dongyun LeeEdward PakJohn HahnMayank Gupta
    • Dongyun LeeEdward PakJohn HahnMayank Gupta
    • H02J1/08
    • H02J3/02G06F13/14H04L12/10H04L12/40045H04L2012/2849H04N5/63H04N7/108H04N21/436Y10T307/492Y10T307/56
    • A system for delivering power over a network of devices connected through a serial link includes a first and second differential pairs of wires. Each differential pair of wires is double AC coupled by a HPF on one side and by another HPF on an opposite side. An LPF connects a portion of each differential pair of wires between the HPFs to a voltage source, and another LPF connects that portion of each differential pair to a load. The system further includes a third and fourth differential pairs of wires. All four differential pairs of wires are located within a single cable, such as a CAT6 cable. The first, second and third differential pair of wires are used for video links, and the fourth differential pair of wires are used for the bi-directional hybrid link. A power delivery circuit in each device includes a voltage source, a power relay switch, a signature resistor for detection, and a load detector.
    • 用于通过串联链路连接的设备的网络上传送电力的系统包括第一和第二差分线对。 每条差分对的导线在一侧由HPF双相交流耦合,另一侧的另一个HPF耦合。 LPF将HPF之间的每对差分对导线的一部分连接到电压源,另一个LPF将每个差分对的该部分连接到负载。 该系统还包括第三和第四差动对的导线。 所有四条差分对的导线位于单根电缆内,如CAT6电缆。 第一,第二和第三差分线对用于视频链路,并且第四差分对导线用于双向混合链路。 每个装置中的电力输送电路包括电压源,功率继电器开关,用于检测的签名电阻器和负载检测器。
    • 9. 发明授权
    • Low-power cache system and method
    • 低功耗缓存系统及方法
    • US07487369B1
    • 2009-02-03
    • US09562071
    • 2000-05-01
    • Mayank GuptaEdward T. PakJavier VillagomezPeter H. Voss
    • Mayank GuptaEdward T. PakJavier VillagomezPeter H. Voss
    • G06F1/32G06F12/00
    • G06F1/3203G06F1/3275G06F12/0802G06F2212/1028Y02D10/13Y02D10/14
    • The invention provides a cache architecture that selectively powered-up a portion of data array in a pipelined cache architecture. A tag array is first powered-up, but the data array is not powered-up during this time, to determine whether there is a tag hit from the decoded index address comparing to the tag compare data. If there is a tag hit, during a later time, a data array is then powered-up at that time to enable a cache line which corresponds with the tag hit for placing onto a data bus. The power consumed by the tag represents a fraction of the power consumed by the data array. A significant power is conserved during the time in which the tag array is assessing whether a tag hit occurs while the data array is not powered-on at this point.
    • 本发明提供一种高速缓存架构,其选择性地加电流水线高速缓存结构中的数据阵列的一部分。 标签阵列首先被加电,但在此期间数据阵列未上电,以确定与标签比较数据相比,是否存在来自解码的索引地址的标签命中。 如果有一个标签命中,在稍后的时间内,数据阵列然后被加电,以启用与标签命中对应的高速缓存行放置在数据总线上。 标签消耗的功率代表数据阵列消耗的功率的一小部分。 在标签阵列评估在此时数据阵列未通电的情况下是否发生标签命中的时间内,节省了大量功率。
    • 10. 发明申请
    • METHOD OF ASSEMBLY AND THERMAL MANAGEMENT OF CT DETECTOR ELECTRONICS CIRCUITS
    • CT检测电子电路的组装和热管理方法
    • US20070098137A1
    • 2007-05-03
    • US11163905
    • 2005-11-03
    • ASHUTOSH JOSHIJOE LACEYMARK KAPPELMAYANK GUPTA
    • ASHUTOSH JOSHIJOE LACEYMARK KAPPELMAYANK GUPTA
    • H05G1/60H01J35/10A61B6/00H01J35/12G01N23/00G21K1/12
    • A61B6/4488A61B6/035
    • Disclosed herein is a method for assembly of Computed Tomography (CT) Detector electronic circuits. A thermally conductive adhesive is dispensed on a first side of a first circuit board, the first circuit board having a plurality of ball grid arrays and a plurality of thermal sensors attached to the first side of the first circuit board. The thermally conductive adhesive is also dispensed on a first side of a second circuit board, the second circuit board having a plurality of ball grid arrays and a plurality of thermal sensors attached to the first side of the second circuit board. A first heat sink is mounted to the first side of the first circuit board. A second heat sink mounted to the first side of the second circuit board. The adhesive is cured on the first and the second circuit boards. The first circuit board is attached to the second circuit board, wherein the second side of the first circuit board is adjacent to the second side of the second circuit board.
    • 本文公开了一种用于组装计算机断层摄影(CT)检测器电子电路的方法。 在第一电路板的第一侧上分配导热粘合剂,第一电路板具有多个球栅阵列和附接到第一电路板的第一侧的多个热传感器。 导热粘合剂也被分配在第二电路板的第一侧上,第二电路板具有多个球栅阵列和附接到第二电路板的第一侧的多个热传感器。 第一散热器安装到第一电路板的第一侧。 安装到第二电路板的第一侧的第二散热器。 粘合剂在第一和第二电路板上固化。 第一电路板附接到第二电路板,其中第一电路板的第二侧与第二电路板的第二侧相邻。