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    • 3. 发明申请
    • Asynchronous Communication Using Standard Boundary Architecture Cells
    • 使用标准边界结构单元的异步通信
    • US20100023821A1
    • 2010-01-28
    • US12178833
    • 2008-07-24
    • Steven Michael DouskeyMichael John HamiltonBrandon Edward Schenck
    • Steven Michael DouskeyMichael John HamiltonBrandon Edward Schenck
    • G01R31/3177G06F11/25
    • G01R31/318594G01R31/318558
    • An adaptation of standard boundary cell architecture defined by the IEEE 1149.1 Joint Test Action Group (JTAG) interface standard to provide paths to functional circuitry via the re-use of JTAG standard test data registers (TDR) and interface. Existing multi-core processor solutions are covered, but an expansion for a more generic solution is provided. In general, an integrated circuit is provided with a plurality of function registers along with a plurality of I/O units. The I/O units are arranged in a serial communications chain located around the boundary of the integrated circuit's functional circuitry. Each of the I/O units include JTAG standard serial TDR in serial communication with adjacent I/O units. Moreover, each I/O unit includes JTAG standard parallel TDR that is associated with and in parallel communication with the I/O unit's JTAG standard serial TDR. Further still, a digital logic interface is configured to control the direct transfer of data between the JTAG standard parallel TDR and a corresponding one of the plurality of function registers. As a result of the re-use of existing boundary scan architecture, a significant reduction in wiring congestion is realized. Thus, asynchronous communication is provided without sacrificing valuable integrated circuit real estate.
    • 由IEEE 1149.1联合测试动作组(JTAG)接口标准定义的标准边界单元架构的适配,以通过重新使用JTAG标准测试数据寄存器(TDR)和接口为功能电路提供路径。 现有的多核处理器解决方案已被覆盖,但是提供了一个更通用的解决方案的扩展。 通常,集成电路具有多个功能寄存器以及多个I / O单元。 I / O单元布置在位于集成电路功能电路边界周围的串行通信链路中。 每个I / O单元包括与相邻I / O单元串行通信的JTAG标准串行TDR。 此外,每个I / O单元都包括与I / O单元的JTAG标准串行TDR相关联并与之并联的JTAG标准并行TDR。 此外,数字逻辑接口被配置为控制在JTAG标准并行TDR和多个功能寄存器中的相应一个之间的数据的直接传送。 由于重新利用现有的边界扫描架构,实现了布线拥塞的显着降低。 因此,提供异步通信而不牺牲有价值的集成电路的不动产。
    • 4. 发明授权
    • Asynchronous communication using standard boundary architecture cells
    • 使用标准边界架构单元的异步通信
    • US07949918B2
    • 2011-05-24
    • US12178833
    • 2008-07-24
    • Steven Michael DouskeyMichael John HamiltonBrandon Edward Schenck
    • Steven Michael DouskeyMichael John HamiltonBrandon Edward Schenck
    • G01R31/28
    • G01R31/318594G01R31/318558
    • An adaptation of standard boundary cell architecture defined by the IEEE 1149.1 Joint Test Action Group (JTAG) interface standard to provide paths to functional circuitry via the re-use of JTAG standard test data registers (TDR) and interface. Existing multi-core processor solutions are covered, but an expansion for a more generic solution is provided. In general, an integrated circuit is provided with a plurality of function registers along with a plurality of I/O units. The I/O units are arranged in a serial communications chain located around the boundary of the integrated circuit's functional circuitry. Each of the I/O units include JTAG standard serial TDR in serial communication with adjacent I/O units. Moreover, each I/O unit includes JTAG standard parallel TDR that is associated with and in parallel communication with the I/O unit's JTAG standard serial TDR. Further still, a digital logic interface is configured to control the direct transfer of data between the JTAG standard parallel TDR and a corresponding one of the plurality of function registers. As a result of the re-use of existing boundary scan architecture, a significant reduction in wiring congestion is realized. Thus, asynchronous communication is provided without sacrificing valuable integrated circuit real estate.
    • 由IEEE 1149.1联合测试动作组(JTAG)接口标准定义的标准边界单元架构的适配,以通过重新使用JTAG标准测试数据寄存器(TDR)和接口为功能电路提供路径。 现有的多核处理器解决方案已被覆盖,但是提供了一个更通用的解决方案的扩展。 通常,集成电路具有多个功能寄存器以及多个I / O单元。 I / O单元布置在位于集成电路功能电路边界周围的串行通信链路中。 每个I / O单元包括与相邻I / O单元串行通信的JTAG标准串行TDR。 此外,每个I / O单元都包括与I / O单元的JTAG标准串行TDR相关联并与之并联的JTAG标准并行TDR。 此外,数字逻辑接口被配置为控制在JTAG标准并行TDR和多个功能寄存器中的相应一个之间的数据的直接传送。 由于重新利用现有的边界扫描架构,实现了布线拥塞的显着降低。 因此,提供异步通信而不牺牲有价值的集成电路的不动产。