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1. 发明授权

US09698799B2 Phase locked loop frequency calibration circuit and method 有权
公开(公告)号：US09698799B2
公开(公告)日：2017-07-04
申请号：US15191457
申请日：2016-06-23
申请人： SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
发明人： Ruijin Liu , Xu Zhang , Jingjing Tao , Jiejie Lv
IPC分类号： H03L7/06 , H03L7/10 , H03L7/099 , H03L7/089 , H03L7/093 , H03L7/181 , H03L7/08
CPC分类号： H03L7/102 , H03L7/08 , H03L7/0891 , H03L7/093 , H03L7/099 , H03L7/181 , H03L2207/06
摘要： A phase locked loop frequency calibration circuit and a method are provided. The circuit includes a timer, a counter, a control module, a frequency divider and a voltage controlled oscillator; output of voltage controlled oscillator is connected with first input of frequency divider, output of frequency divider is connected with first input of counter, second input of frequency divider, first input of timer and second input of counter are respectively connected with first output of control module, third input of counter is connected with output of timer, output of counter is connected with first input of control module, a reference clock signal is respectively sent to second input of timer and second input of control module, the number of clocks used by frequency divider to perform frequency division on output clock signal of voltage controlled oscillator is sent to third input of control module.

2. 发明申请

US20160277223A1 CARRIER FREQUENCY OFFSET PROCESSING METHOD AND APPARATUS AND RECEIVER 有权
标题翻译：载波频率偏移处理方法及装置及接收机
公开(公告)号：US20160277223A1
公开(公告)日：2016-09-22
申请号：US15164741
申请日：2016-05-25
申请人： SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
发明人： LIWEI SHEN , Ruijin Liu , Song Pan
IPC分类号： H04L27/152 , H04L27/148 , H04B1/10
CPC分类号： H04L27/152 , H03J1/0008 , H04B1/1027 , H04L27/148
摘要： The invention provides a carrier frequency offset processing method, an apparatus and a receiver. The method comprises: receiving, through a software and hardware interface, an estimated value of frequency offset of a data packet transmitted by an automatic frequency offset control module; collecting the received estimated value of frequency offset of the data packet and performing statistical analysis to obtain a statistical value of carrier frequency offset between a receiving module and a transmitting module; and dynamically adjusting, according to the statistical value of carrier frequency offset, a bandwidth of a low-pass filter through the software and hardware interface. The invention realizes dynamic adjustment of the bandwidth of the low-pass filter in the process of a receiver receiving signals, solving the problem of the impact on processing performance brought by the fixed bandwidth of a low-pass filter in the prior art.
摘要翻译：本发明提供一种载波频率偏移处理方法，装置和接收机。该方法包括：通过软件和硬件接口接收由自动频率偏移控制模块发送的数据分组的频偏的估计值; 收集接收到的数据分组的频率偏移的估计值，并进行统计分析以获得接收模块和发射模块之间的载波频率偏移的统计值; 并根据载波频率偏移的统计值，通过软硬件接口动态调整低通滤波器的带宽。本发明实现了接收机接收信号过程中低通滤波器带宽的动态调整，解决了现有技术中低通滤波器固定带宽对处理性能的影响的问题。

3. 发明授权

US09564857B2 Low noise amplifier and chip 有权
标题翻译：低噪声放大器和芯片
公开(公告)号：US09564857B2
公开(公告)日：2017-02-07
申请号：US14981820
申请日：2015-12-28
申请人： SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
发明人： Jingjing Tao , Xu Zhang , Ruijin Liu
IPC分类号： H03F3/04 , H03F1/02 , H03F3/30 , H03F3/45 , H03F3/16 , H03F1/26
CPC分类号： H03F1/0205 , H03F1/0266 , H03F1/26 , H03F3/16 , H03F3/3001 , H03F3/45179 , H03F2200/294 , H03F2200/555 , H03F2203/30015
摘要： A low noise amplifier and a chip. The amplifier includes a biasing circuit unit, a first amplifying circuit unit, a first adjusting unit, a first signal input, a second signal input and a first signal output; the biasing circuit unit includes a first voltage output and a second voltage output; the first amplifying circuit unit includes a first N-type transistor, a first P-type transistor, a first output capacitor, a second output capacitor, a first impedance and a second impedance; gates of first N-type and P-type transistors are connected to first voltage output and first signal input, and second voltage output and first signal input, respectively, via adjusting unit; source of first N-type transistor is connected to source of first P-type transistor and second signal input; drains of first N-type and P-type transistors are connected respectively to impedance, and to first signal output and second signal output via output capacitor.
摘要翻译：低噪声放大器和芯片。放大器包括偏置电路单元，第一放大电路单元，第一调整单元，第一信号输入端，第二信号输入端和第一信号输出端; 偏置电路单元包括第一电压输出和第二电压输出; 第一放大电路单元包括第一N型晶体管，第一P型晶体管，第一输出电容器，第二输出电容器，第一阻抗和第二阻抗; 第一N型和P型晶体管的栅极分别经由调节单元连接到第一电压输出和第一信号输入，第二电压输出和第一信号输入; 第一N型晶体管的源极连接到第一P型晶体管的源极和第二信号输入端; 第一N型和P型晶体管的漏极分别连接到阻抗，并且通过输出电容器首先将信号输出和第二信号输出。

4. 发明申请

US20160112010A1 LOW NOISE AMPLIFIER AND CHIP 有权
标题翻译：低噪声放大器和芯片
公开(公告)号：US20160112010A1
公开(公告)日：2016-04-21
申请号：US14981820
申请日：2015-12-28
申请人： SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
发明人： JINGJING TAO , XU ZHANG , RUIJIN LIU
IPC分类号： H03F1/02 , H03F3/16
CPC分类号： H03F1/0205 , H03F1/0266 , H03F1/26 , H03F3/16 , H03F3/3001 , H03F3/45179 , H03F2200/294 , H03F2200/555 , H03F2203/30015
摘要： A low noise amplifier and a chip. The amplifier includes a biasing circuit unit, a first amplifying circuit unit, a first adjusting unit, a first signal input, a second signal input and a first signal output; the biasing circuit unit includes a first voltage output and a second voltage output; the first amplifying circuit unit includes a first N-type transistor, a first P-type transistor, a first output capacitor, a second output capacitor, a first impedance and a second impedance; gates of first N-type and P-type transistors are connected to first voltage output and first signal input, and second voltage output and first signal input, respectively, via adjusting unit; source of first N-type transistor is connected to source of first P-type transistor and second signal input; drains of first N-type and P-type transistors are connected respectively to impedance, and to first signal output and second signal output via output capacitor.
摘要翻译：低噪声放大器和芯片。放大器包括偏置电路单元，第一放大电路单元，第一调整单元，第一信号输入端，第二信号输入端和第一信号输出端; 偏置电路单元包括第一电压输出和第二电压输出; 第一放大电路单元包括第一N型晶体管，第一P型晶体管，第一输出电容器，第二输出电容器，第一阻抗和第二阻抗; 第一N型和P型晶体管的栅极分别经由调整单元连接到第一电压输出和第一信号输入，第二电压输出和第一信号输入; 第一N型晶体管的源极连接到第一P型晶体管的源极和第二信号输入端; 第一N型和P型晶体管的漏极分别连接到阻抗，并且通过输出电容器首先将信号输出和第二信号输出。

5. 发明授权

US11012266B2 Sub-carrier estimation method and apparatus in multi-carrier communication system 有权
公开(公告)号：US11012266B2
公开(公告)日：2021-05-18
申请号：US16221389
申请日：2018-12-14
申请人： SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
发明人： Song Pan , Liwei Shen , Guangsheng Chen
IPC分类号： H04L12/26 , H04L25/03 , H04L27/26
摘要： Provided are a sub-carrier estimation method in a multi-carrier communication system and an apparatus. The method includes: receiving a data frame transmitted by a transmitting end, and extracting a training sequence from the data frame; performing fast Fourier transform operation on the training sequence and a preset reference sequence, respectively, to obtain frequency domain data of the training sequence and frequency domain data of the reference sequence, and conjugately multiplying the two kinds of frequency domain data; extracting real part of conjugate multiplication result; averaging values in each column of an M×N array, respectively, to obtain an output array of 1 row and N columns; and estimating, according to the value in each column of the output array of 1 row and N columns, whether valid data is transmitted over N sub-carriers corresponding to the output array of 1 row and N columns.

6. 发明授权

US09722831B2 Carrier frequency offset processing method and apparatus and receiver 有权
公开(公告)号：US09722831B2
公开(公告)日：2017-08-01
申请号：US15164741
申请日：2016-05-25
申请人： SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
发明人： Liwei Shen , Ruijin Liu , Song Pan
IPC分类号： H04L27/14 , H04L27/152 , H04B1/10 , H03J1/00 , H04L27/148
CPC分类号： H04L27/152 , H03J1/0008 , H04B1/1027 , H04L27/148
摘要： The invention provides a carrier frequency offset processing method, an apparatus and a receiver. The method comprises: receiving, through a software and hardware interface, an estimated value of frequency offset of a data packet transmitted by an automatic frequency offset control module; collecting the received estimated value of frequency offset of the data packet and performing statistical analysis to obtain a statistical value of carrier frequency offset between a receiving module and a transmitting module; and dynamically adjusting, according to the statistical value of carrier frequency offset, a bandwidth of a low-pass filter through the software and hardware interface. The invention realizes dynamic adjustment of the bandwidth of the low-pass filter in the process of a receiver receiving signals, solving the problem of the impact on processing performance brought by the fixed bandwidth of a low-pass filter in the prior art.

7. 发明授权

US11641295B1 Method and device for estimating carrier frequency offset, and computer readable storage medium 有权
公开(公告)号：US11641295B1
公开(公告)日：2023-05-02
申请号：US17543906
申请日：2021-12-07
申请人： SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
发明人： Liwei Shen , Guangsheng Chen , Song Pan
IPC分类号： H04L27/00 , H04L27/14
摘要： A method and device for estimating a carrier frequency offset, and a computer-readable storage medium are provided. The method includes: determining a target area where a phase discrimination signal is located, wherein the target area is one of N numbers of candidate areas, the N numbers of candidate areas correspond to different value ranges, an union range of the N numbers of candidate areas is [π, −π], and N≥2; determining a first estimation value of a direct current component corresponding to the phase discrimination signal based on the target area; and performing a carrier frequency offset compensation on the phase discrimination signal based on the first estimation value of the direct current component.

8. 发明申请

US20230111713A1 Method and Device for Estimating Carrier Frequency Offset, and Computer Readable Storage Medium 有权
公开(公告)号：US20230111713A1
公开(公告)日：2023-04-13
申请号：US17543906
申请日：2021-12-07
申请人： SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
发明人： Liwei SHEN , Guangsheng CHEN , Song PAN
IPC分类号： H04L27/00 , H04L27/14
摘要： A method and device for estimating a carrier frequency offset, and a computer-readable storage medium are provided. The method includes: determining a target area where a phase discrimination signal is located, wherein the target area is one of N numbers of candidate areas, the N numbers of candidate areas correspond to different value ranges, an union range of the N numbers of candidate areas is [π, −π], and N≥2; determining a first estimation value of a direct current component corresponding to the phase discrimination signal based on the target area; and performing a carrier frequency offset compensation on the phase discrimination signal based on the first estimation value of the direct current component.

9. 发明申请

US20190123942A1 SUB-CARRIER ESTIMATION METHOD AND APPARATUS IN MULTI-CARRIER COMMUNICATION SYSTEM 审中-公开
公开(公告)号：US20190123942A1
公开(公告)日：2019-04-25
申请号：US16221389
申请日：2018-12-14
申请人： SHANGHAI EASTSOFT MICROELECTRONICS CO, LTD.
发明人： SONG PAN , LIWEI SHEN , GUANGSHENG SHEN
IPC分类号： H04L25/03 , H04L27/26
摘要： Provided are a sub-carrier estimation method in a multi-carrier communication system and an apparatus. The method includes: receiving a data frame transmitted by a transmitting end, and extracting a training sequence from the data frame; performing fast Fourier transform operation on the training sequence and a preset reference sequence, respectively, to obtain frequency domain data of the training sequence and frequency domain data of the reference sequence, and conjugately multiplying the two kinds of frequency domain data; extracting real part of conjugate multiplication result; averaging values in each column of an M×N array, respectively, to obtain an output array of 1 row and N columns; and estimating, according to the value in each column of the output array of 1 row and N columns, whether valid data is transmitted over N sub-carriers corresponding to the output array of 1 row and N columns.

10. 发明申请

US20160308542A1 PHASE LOCKED LOOP FREQUENCY CALIBRATION CIRCUIT AND METHOD 有权
标题翻译：相位锁定频率校准电路和方法
公开(公告)号：US20160308542A1
公开(公告)日：2016-10-20
申请号：US15191457
申请日：2016-06-23
申请人： SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
发明人： Ruijin Liu , Xu Zhang , Jingjing Tao , Jiejie Lv
IPC分类号： H03L7/10 , H03L7/181 , H03L7/099 , H03L7/093 , H03L7/089
CPC分类号： H03L7/102 , H03L7/08 , H03L7/0891 , H03L7/093 , H03L7/099 , H03L7/181 , H03L2207/06
摘要： A phase locked loop frequency calibration circuit and a method are provided. The circuit includes a timer, a counter, a control module, a frequency divider and a voltage controlled oscillator; output of voltage controlled oscillator is connected with first input of frequency divider, output of frequency divider is connected with first input of counter, second input of frequency divider, first input of timer and second input of counter are respectively connected with first output of control module, third input of counter is connected with output of timer, output of counter is connected with first input of control module, a reference clock signal is respectively sent to second input of timer and second input of control module, the number of clocks used by frequency divider to perform frequency division on output clock signal of voltage controlled oscillator is sent to third input of control module.
摘要翻译：提供了一种锁相环频率校准电路及方法。电路包括定时器，计数器，控制模块，分频器和压控振荡器; 压控振荡器的输出与分频器的第一输入端连接，分频器的输出与计数器的第一输入，分频器的第二输入，定时器的第一输入和计数器的第二输入分别与控制模块的第一输出计数器的第三个输入与定时器的输出相连，计数器的输出与控制模块的第一个输入相连，参考时钟信号分别发送到定时器的第二个输入端和控制模块的第二个输入端，频率使用的时钟数分压器对压控振荡器的输出时钟信号进行分频，发送到控制模块的第三输入。

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