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1. 发明授权

US11545998B2 Offset value determination in a check node processing unit for message-passing decoding of non-binary codes 有权
公开(公告)号：US11545998B2
公开(公告)日：2023-01-03
申请号：US17276255
申请日：2019-10-07
申请人： UNIVERSITE DE BRETAGNE SUD
发明人： Hassan Harb , Emmanuel Boutillon , Cédric Marchand
IPC分类号： H03M13/11 , H03M13/00
摘要： Embodiments of the invention provide an elementary check node processing unit (300) implemented in a check node processing unit of a non-binary error correcting code decoder, the elementary check node processing unit (300) being linked to a variable node processing unit (305) and being configured to receive a first message and a second message, each message comprising at least two components. The elementary check node processing unit (300) comprises a calculation unit (301) which determines two or more auxiliary components from the components comprised in the first message and from the components comprised in the second message, an auxiliary component comprising an auxiliary reliability metrics. The calculation unit (301) also determines, in association with each of the two or more auxiliary components, decoding performance values. The elementary check node processing unit (300) also comprises a selection unit (303) which selects, among the two or more auxiliary components, the auxiliary component that is associated with the optimal decoding performance values and determines an offset value from the auxiliary reliability metrics comprised in the selected auxiliary component. The elementary check node processing unit (300) then transmits the offset value and a selected set of auxiliary components among the two or more auxiliary components to the variable node processing unit (305).

2. 发明申请

US20170317695A1 METHODS AND DEVICES FOR ERROR CORRECTING CODES DECODING 审中-公开
公开(公告)号：US20170317695A1
公开(公告)日：2017-11-02
申请号：US15498589
申请日：2017-04-27
申请人： UNIVERSITE DE BRETAGNE SUD
发明人： Cédric MARCHAND , Emmanuel BOUTILLON
IPC分类号： H03M13/37 , H03M13/15 , H03M13/11
CPC分类号： H03M13/3746 , H03M13/1102 , H03M13/1117 , H03M13/1171 , H03M13/1575 , H03M13/6502
摘要： Embodiments of the invention provide a check node processing unit implemented in a decoder, said decoder being configured to decode a signal encoded using an error correcting code, said signal comprising symbols, the check node processing unit being configured to receive at least two input messages and to generate at least one output message, each message comprising a plurality of components, each component comprising a value of a symbol and a reliability metrics associated with said symbol, wherein the check node processing unit comprises: a data structure (31) configured to store said input messages, the components of the input messages being associated with an integer index in the data structure; a data processing unit (33) configured to apply one or more iterations of a transformation operation to at least a part of the data structure, each iteration of the transformation operation being performed to arrange the components of said input messages in said data structure (31) depending on at least some of the components of the messages associated with a given value of the integer index, which provides a transformed data structure; a calculation unit (35) configured to determine said at least one output message from the components comprised in said transformed data structure.

3. 发明申请

US20160336967A1 DECODING OF NON-BINARY LDPC CODES 审中-公开
标题翻译：非二进制LDPC编码的解码
公开(公告)号：US20160336967A1
公开(公告)日：2016-11-17
申请号：US15110349
申请日：2015-01-07
申请人： UNIVERSITE DE BRETAGNE SUD , CENTER NATIONAL DE LA RECHERCHE SCIENTIFIQUE - CNRS -
发明人： Emmanuel Boutillon , Oussama Abassi , Laura Conde-Canencia
IPC分类号： H03M13/11
CPC分类号： H03M13/1128 , H03M13/1117 , H03M13/1171
摘要： A method is proposed for managing a parity-check node calculation unit of an error-correcting code decoder having a nrepresentation as a bipartite graph comprising at least one parity-check node, the parity-check node being configured to receive first and second input messages, and to produce an output message, the elements of the input and output messages of the parity-check N node comprising a symbol and a measure of reliability associated with the symbol, the first and second input messages containing lists of elements ordered by their measure of reliability. The method comprises: initializing a plurality of nbub FIFO memories with elements calculated from combinations of elements of the first and second input messages, and iteratively determining the values of the output message.
摘要翻译：提出一种用于管理纠错码解码器的奇偶校验节点计算单元的方法，所述纠错码解码器具有作为包括至少一个奇偶校验节点的二分图的n表示，所述奇偶校验节点被配置为接收第一和第二输入消息并且为了产生输出消息，奇偶校验N节点的输入和输出消息的元素包括与该符号相关联的符号和可靠性度量，第一和第二输入消息包含由其度量所排序的元素列表的可靠性。该方法包括：通过从第一和第二输入消息的元素的组合计算的元素来初始化多个nbub FIFO存储器，并迭代地确定输出消息的值。

4. 发明申请

US20160312041A1 A Coating Composition 审中-公开
标题翻译：涂料组合物
公开(公告)号：US20160312041A1
公开(公告)日：2016-10-27
申请号：US15101535
申请日：2014-12-01
申请人： PPG Coatings Europe B.V. , Universite de Bretagne-Sud
发明人： Fabrice Azemar , Isabelle Linossier , Karine Rehel , Fabienne Fay
IPC分类号： C09D5/16 , B05D7/24 , B63B59/04 , C09D183/10
CPC分类号： C09D5/1675 , B05D7/24 , B63B59/04 , C08G63/6952 , C08G77/445 , C09D167/04 , C09D183/10
摘要： A self-polishing and/or antifouling coating composition comprising a binder, wherein the binder comprises a copolymer comprising (i) units of A and (ii) units of B and/or C: wherein R1 and R2 are each independently H, a C1-C6 alkyl group or phenyl, R3 is H, a C1-C6 alkyl group or phenyl, R4 is optional and, when present, is a C1-C3 alkylene group, R′3 is H, a C1-C6 alkyl group or phenyl, and R′4 is optional and, when present, is a C1-C3 alkylene group.

5. 发明申请

US20220088789A1 SYSTEM FOR THE TEMPORARY STORAGE OF OBJECTS 有权
公开(公告)号：US20220088789A1
公开(公告)日：2022-03-24
申请号：US17433098
申请日：2020-02-24
申请人： UNIVERSITE DE BRETAGNE SUD
发明人： Pierre BOMEL , Eric MARTIN
IPC分类号： B25J9/16 , G05B19/4155
摘要： A temporary-storage system that includes a temporary-storage belt, a control unit and signalling means. The temporary-storage belt comprises a plurality of regularly distributed sensors. During a loading phase, the control unit receives information coming from at least one of the sensors when an object is deposited on the temporary-storage belt and records a trace of the deposition of the object in association with a reference to each of the sensors activated by the deposition. During an unloading phase, the control unit determines a sequence of removal of the objects and, for each object to be removed, identifies the sensors referenced, transmits to the signalling means signalling information identifying the position of the object, and receives information coming from at least one of the sensors when the object is removed.

6. 发明授权

US11245421B2 Check node processing methods and devices with insertion sort 有权
公开(公告)号：US11245421B2
公开(公告)日：2022-02-08
申请号：US17255101
申请日：2019-07-04
申请人： UNIVERSITE DE BRETAGNE SUD
发明人： Emmanuel Boutillon , Cédric Marchand , Hassan Harb
IPC分类号： H03M13/11
摘要： A sorting device and method for determining elementary check node components in an elementary check node processor implemented in a non-binary error correcting code decoder by sorting auxiliary components are presented. The auxiliary components are stored in a plurality of FIFO memories, each FIFO memory being assigned a FIFO number index. Each auxiliary component stored in a given FIFO memory comprises an auxiliary symbol, a reliability metrics representing the reliability of the auxiliary symbol, and the FIFO number index assigned to the given FIFO memory. The sorting device is configured to sort the auxiliary components by a plurality of multiplexers arranged sequentially. Each multiplexer is configured to initialize a candidate elementary check node component from the components of a FIFO memory corresponding to the auxiliary component which comprise the most reliable auxiliary symbol and to perform one or more iterations of the illustrated receiving, updating and sorting steps.

7. 发明授权

US11133827B2 Simplified, presorted, syndrome-based, extended min-sum (EMS) decoding of non-binary LDPC codes 有权
公开(公告)号：US11133827B2
公开(公告)日：2021-09-28
申请号：US16622410
申请日：2018-06-07
申请人： UNIVERSITE DE BRETAGNE SUD
发明人： Emmanuel Boutillon , Cédric Marchand
IPC分类号： H03M13/11 , H03M13/15
摘要： Embodiments of the invention provide a check node processing unit configured to determine at least one check node message to decode a signal encoded using a NB-LDPC code, the check node processing unit comprising: a data link to one or more message presorting units to determine permuted variable node messages by applying permutations to at least three variable node messages generated by variable node processing units; a syndrome calculation unit to determine a set of syndromes comprising binary values from the permuted variable node messages; a decorrelation and permutation unit configured, for each check node message of a given index, to: determine a permuted index by applying the inverse of the one or more permutations; select at least one valid syndrome in the set of syndromes; and determine at least one candidate check node component; and a selection unit to determine at least one check node message from the candidate check node component.

8. 发明申请

US20180069570A1 METHODS AND DEVICES FOR GENERATING OPTIMIZED CODED MODULATIONS 审中-公开
公开(公告)号：US20180069570A1
公开(公告)日：2018-03-08
申请号：US15691939
申请日：2017-08-31
申请人： UNIVERSITE DE BRETAGNE SUD
发明人： Emmanuel BOUTILLON , Ahmed ABDMOULEH
IPC分类号： H03M13/11 , H03M13/00
CPC分类号： H03M13/1171 , H03M13/116 , H03M13/255 , H03M13/353 , H03M13/616 , H04L1/0041 , H04L1/0045
摘要： Embodiments of the invention provide a device for determining a coded modulation scheme, said coded modulation scheme being defined by at least one non-binary error correcting code containing at least one non-binary parity-check equation, a modulation scheme, and a modulation mapping, wherein the device comprises: a calculation unit (31) configured to determine one or more candidate modulation mappings and one or more candidate parity-check equations defining said at least one non-binary error correcting code, each set of a candidate modulation mapping and at least one candidate parity-check equation providing codeword vectors and being associated with one or more metrics, each metric being defined by a number of distinct pairs of codeword vectors having an Euclidean distance of a defined value; and a selection unit (35) configured to select one candidate modulation mapping and at least one candidate parity-check equation according to an optimization criterion applied to said one or more metrics.

9. 发明授权

US11476870B2 Variable node processing methods and devices for message-passing decoding of non-binary codes 有权
公开(公告)号：US11476870B2
公开(公告)日：2022-10-18
申请号：US17257191
申请日：2019-07-04
申请人： UNIVERSITE DE BRETAGNE SUD
发明人： Emmanuel Boutillon , Cédric Marchand , Hassan Harb
IPC分类号： H03M13/11
摘要： Embodiments of the invention provide a variable node processing unit for a non-binary error correcting code decoder, the variable node processing unit being configured to receive one check node message and intrinsic reliability metrics, and to generate one variable node message from auxiliary components derived from said one check node message and intrinsic reliability metrics, the intrinsic reliability metrics being derived from a received signal, an auxiliary component comprising an auxiliary symbol and an auxiliary reliability metrics associated with said auxiliary symbol, wherein the variable node processing unit comprises: a sorting and redundancy elimination unit configured to process iteratively the auxiliary components and to determine components of the variable node message by iteratively sorting the auxiliary components according to a given order of the auxiliary reliability metrics and keeping a predefined number of auxiliary components comprising the auxiliary symbols that are the most reliable and all different from one another.

10. 发明授权

US11290128B2 Simplified check node processing in non-binary LDPC decoder 有权
公开(公告)号：US11290128B2
公开(公告)日：2022-03-29
申请号：US16621830
申请日：2018-06-07
申请人： UNIVERSITE DE BRETAGNE SUD
发明人： Cédric Marchand , Emmanuel Boutillon
IPC分类号： H03M13/00 , H03M13/11 , H03M13/15
摘要： Embodiments of the invention provide a decoder comprising at least one check node processing unit configured to receive at least three variable node messages from one or more variable node processing units and to determine one or more check node messages, wherein the at least one check node processing unit comprises at least two blocks of sub-check nodes, each block of sub-check node being configured to: determine a set of sub-check node syndromes from at least one variable node message among the at least three variable node messages; and determine at least one check node message from at least one syndrome.

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