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1. 发明申请

US20090121705A1 Poly Phase Solid State Watt Hour Meters 有权
标题翻译：多相固态瓦时计
公开(公告)号：US20090121705A1
公开(公告)日：2009-05-14
申请号：US12257947
申请日：2008-10-24
申请人： Volker Rzehak
发明人： Volker Rzehak
IPC分类号： G01R11/32
CPC分类号： G01R22/10 , G01R21/127
摘要： An electronic energy meter includes a first sigma delta modulator having an electrically isolated digital data output. A power supply stage coupled to a first electrical line provides a supply voltage to the first sigma delta modulator. A shunt device is also coupled to the first electrical line. The first sigma delta modulator is coupled via an input to the shunt device for measuring a current through the first electrical line. The electrically isolated digital output is isolated by a capacitive isolation barrier.
摘要翻译：电子能量计包括具有电隔离数字数据输出的第一Σ-Δ调制器。耦合到第一电线的电源级向第一Σ-Δ调制器提供电源电压。分流装置还耦合到第一电线。第一Σ-Δ调制器经由输入耦合到分流装置，用于测量通过第一电线的电流。电隔离的数字输出由电容隔离屏蔽隔离。

2. 发明申请

US20090051577A1 Multiplexing Aware Sigma-Delta Analag-to-Digital Converter 有权
标题翻译：复用意识的Sigma-Delta Analag-to-Digital转换器
公开(公告)号：US20090051577A1
公开(公告)日：2009-02-26
申请号：US12174729
申请日：2008-07-17
申请人： Volker Rzehak
发明人： Volker Rzehak
IPC分类号： H03M3/00 , H03M1/12
CPC分类号： H03M3/474 , H03M3/43 , H03M3/462
摘要： The present invention relates to an electronic device for analog-to-digital conversion including a sigma-delta modulator (SD), a digital filter (FIL) for digital post processing of the output signal of the sigma-delta modulator (SD), a multiplexer (MUX) for switching the input (INSD) of the sigma-delta modulator between a first input signal (IN1) and a second input signal (IN2), a memory (MEM) adapted to hold the register content of the digital filter relating to the first input signal while the second input signal (IN2) is processed in the digital filter, and a controller (CNTL) to retrieve the register contents from the memory (MEM) when processing of the first input signal (IN1) in the digital filter is resumed.
摘要翻译：本发明涉及一种用于模数转换的电子设备，包括用于Σ-Δ调制器（SD）的输出信号的数字后处理的Σ-Δ调制器（SD），数字滤波器（FIL），用于在第一输入信号（IN1）和第二输入信号（IN2）之间切换Σ-Δ调制器的输入（INSD）的多路复用器（MUX），适于保持数字滤波器的寄存器内容的存储器在数字滤波器中处理第二输入信号（IN2）的第一输入信号中，以及当处理数字滤波器中的第一输入信号（IN1）时，控制器（CNTL）从存储器（MEM）中检索寄存器内容过滤器恢复。

3. 发明申请

US20080215262A1 POLYPHASE ELECTRIC ENERGY METER 有权
标题翻译：多相电能表
公开(公告)号：US20080215262A1
公开(公告)日：2008-09-04
申请号：US11963546
申请日：2007-12-21
申请人： Volker Rzehak
发明人： Volker Rzehak
IPC分类号： G01R21/06
CPC分类号： G01R21/133
摘要： A polyphase electric energy meter comprises a microcontroller with a front end that converts analog current input signals and analog voltage input signals to digital current and voltage samples for processing by the microcontroller. The front end includes separate input channels, each for one of the current input signals with a sigma-delta modulator followed by a decimation filter. The front end further includes a common input channel for all voltage input signals with a multiplexer, an analog-to-digital converter and a de-multiplexer. The separate input channels and the common input channel provide the digital current and voltage samples for processing by the microcontroller.
摘要翻译：多相电能表包括具有前端的微控制器，其将模拟电流输入信号和模拟电压输入信号转换为数字电流和电压样本，以供微控制器进行处理。前端包括单独的输入通道，每个输入通道用于具有Σ-Δ调制器的一个电流输入信号，随后是抽取滤波器。前端还包括用于具有多路复用器，模数转换器和去多路复用器的所有电压输入信号的公共输入通道。单独的输入通道和公共输入通道提供数字电流和电压采样，以供微控制器进行处理。

4. 发明授权

US08542047B2 Electronic device and method for low power reset 有权
标题翻译：用于低功耗复位的电子设备和方法
公开(公告)号：US08542047B2
公开(公告)日：2013-09-24
申请号：US13275862
申请日：2011-10-18
申请人： Volker Rzehak , Johann Zipperer
发明人： Volker Rzehak , Johann Zipperer
IPC分类号： H03K3/02
CPC分类号： H03K17/22 , G06F1/24
摘要： An electronic device and a method for operating an electronic device, wherein the electronic device comprises a reset stage which is configured to have a power down threshold and a power cycle threshold. The voltage level of the power cycle threshold is lower than the voltage level of the power down threshold. The two threshold levels define a first and second interval for a supply voltage of the electronic device. A first interval is between the power cycle threshold and the power down threshold. A second interval is above the power down threshold. The reset stage is further configured to provide the control signal having a defined first state in the first interval and a defined second state in the second interval. The electronic device is set to a low power reset mode if the control signal is in the first state and the electronic device is enabled to enter an active mode if the control signal is in the second state.
摘要翻译：一种用于操作电子设备的电子设备和方法，其中所述电子设备包括被配置为具有掉电阈值和功率周期阈值的复位阶段。功率周期阈值的电压电平低于掉电阈值的电压电平。两个阈值电平为电子设备的电源电压定义第一和第二间隔。第一个间隔在功率周期阈值和掉电阈值之间。第二个间隔高于掉电阈值。复位阶段还被配置为提供在第一间隔中具有定义的第一状态的控制信号和在第二间隔中的限定的第二状态。如果控制信号处于第一状态，并且如果控制信号处于第二状态，则电子设备能够进入活动模式，则将电子设备设置为低功率复位模式。

5. 发明申请

US20130093487A1 ELECTRONIC DEVICE AND METHOD FOR LOW POWER RESET 有权
标题翻译：用于低功率复位的电子设备和方法
公开(公告)号：US20130093487A1
公开(公告)日：2013-04-18
申请号：US13275862
申请日：2011-10-18
申请人： Volker Rzehak , Johann Zipperer
发明人： Volker Rzehak , Johann Zipperer
IPC分类号： H03K17/20
CPC分类号： H03K17/22 , G06F1/24
摘要： An electronic device and a method for operating an electronic device, wherein the electronic device comprises a reset stage which is configured to have a power down threshold and a power cycle threshold. The voltage level of the power cycle threshold is lower than the voltage level of the power down threshold. The two threshold levels define a first and second interval for a supply voltage of the electronic device. A first interval is between the power cycle threshold and the power down threshold. A second interval is above the power down threshold. The reset stage is further configured to provide the control signal having a defined first state in the first interval and a defined second state in the second interval. The electronic device is set to a low power reset mode if the control signal is in the first state and the electronic device is enabled to enter an active mode if the control signal is in the second state.
摘要翻译：一种用于操作电子设备的电子设备和方法，其中所述电子设备包括被配置为具有掉电阈值和功率周期阈值的复位阶段。功率周期阈值的电压电平低于掉电阈值的电压电平。两个阈值电平为电子设备的电源电压定义第一和第二间隔。第一个间隔在功率周期阈值和掉电阈值之间。第二个间隔高于掉电阈值。复位阶段还被配置为提供在第一间隔中具有定义的第一状态的控制信号和在第二间隔中的限定的第二状态。如果控制信号处于第一状态，并且如果控制信号处于第二状态，则电子设备能够进入活动模式，则将电子设备设置为低功率复位模式。

6. 发明授权

US07737679B2 Poly phase solid state watt hour meters 有权
标题翻译：多相固态瓦特时计
公开(公告)号：US07737679B2
公开(公告)日：2010-06-15
申请号：US12257947
申请日：2008-10-24
申请人： Volker Rzehak
发明人： Volker Rzehak
IPC分类号： G01R11/32
CPC分类号： G01R22/10 , G01R21/127
摘要： An electronic energy meter includes a first sigma delta modulator having an electrically isolated digital data output. A power supply stage coupled to a first electrical line provides a supply voltage to the first sigma delta modulator. A shunt device is also coupled to the first electrical line. The first sigma delta modulator is coupled via an input to the shunt device for measuring a current through the first electrical line. The electrically isolated digital output is isolated by a capacitive isolation barrier.
摘要翻译：电子能量计包括具有电隔离数字数据输出的第一Σ-Δ调制器。耦合到第一电线的电源级向第一Σ-Δ调制器提供电源电压。分流装置还耦合到第一电线。第一Σ-Δ调制器经由输入耦合到分流装置，用于测量通过第一电线的电流。电隔离的数字输出由电容隔离屏蔽隔离。

7. 发明授权

US07689374B2 Polyphase electric energy meter 有权
标题翻译：多相电能表
公开(公告)号：US07689374B2
公开(公告)日：2010-03-30
申请号：US11963546
申请日：2007-12-21
申请人： Volker Rzehak
发明人： Volker Rzehak
IPC分类号： G01R21/00 , G01R21/06 , G01R19/00
CPC分类号： G01R21/133
摘要： A polyphase electric energy meter is provided that includes a microcontroller with a front end that converts analog current input signals and analog voltage input signals to digital current and voltage samples for processing by the microcontroller. The front end includes separate input channels, each for one of the current input signals with a sigma-delta modulator followed by a decimation filter. The front end further includes a common input channel for all voltage input signals with a multiplexer, an analog-to-digital converter and a de-multiplexer. The separate input channels and the common input channel provide the digital current and voltage samples for processing by the microcontroller.
摘要翻译：提供了一个多相电能表，其中包括一个前端的微控制器，它将模拟电流输入信号和模拟电压输入信号转换为数字电流和电压采样，以供微控制器进行处理。前端包括单独的输入通道，每个输入通道用于具有Σ-Δ调制器的一个电流输入信号，随后是抽取滤波器。前端还包括用于具有多路复用器，模数转换器和去多路复用器的所有电压输入信号的公共输入通道。单独的输入通道和公共输入通道提供数字电流和电压采样，以供微控制器进行处理。

8. 发明申请

US20080186013A1 Poly-Phase Electric Energy Meter 有权
标题翻译：多相电能表
公开(公告)号：US20080186013A1
公开(公告)日：2008-08-07
申请号：US11961422
申请日：2007-12-20
申请人： Volker Rzehak , Vincent Wei Chit Chan , Stephen James Underwood , Thomas Hung Lam Kot
发明人： Volker Rzehak , Vincent Wei Chit Chan , Stephen James Underwood , Thomas Hung Lam Kot
IPC分类号： G01R22/10 , G01R21/133
CPC分类号： G01R22/10 , G01R21/133
摘要： A poly-phase electric energy meter comprises a front-end that converts analog current input signals and analog voltage input signals to digital current and voltage samples and a micro-controller for computing power consumed. The front end includes first and second input channels. Each input channel has a multiplexer, an analog-digital converter, a de-multiplexer and a set of data registers. The first input channel receives current input and the second input channel receives voltage inputs. A multiplexer control causes the first and second channels to sequentially sample the current and voltage for one phase at a time and store digital data in corresponding data registers. The micro-controller computes energy consumed from the simultaneous current and voltage samples.
摘要翻译：多相电能表包括将模拟电流输入信号和模拟电压输入信号转换为数字电流和电压样本的前端以及用于计算消耗功率的微控制器。前端包括第一和第二输入通道。每个输入通道具有多路复用器，模拟数字转换器，解复用器和一组数据寄存器。第一输入通道接收电流输入，第二输入通道接收电压输入。多路复用器控制使得第一和第二通道一次顺序地采样一个相的电流和电压，并将数字数据存储在相应的数据寄存器中。微控制器计算同时电流和电压样本消耗的能量。

9. 发明授权

US09092206B2 Microprocessor unit capable of multiple power modes having a register with direct control bits and register pointer bits for indirect control 有权
标题翻译：具有多个功率模式的微处理器单元具有具有直接控制位的寄存器和用于间接控制的寄存器指针位
公开(公告)号：US09092206B2
公开(公告)日：2015-07-28
申请号：US12772442
申请日：2010-05-03
申请人： Volker Rzehak , Horst Diewald
发明人： Volker Rzehak , Horst Diewald
IPC分类号： G06F1/26 , G06F1/32
CPC分类号： G06F1/26 , G06F1/3203 , G06F1/3243 , Y02D10/152
摘要： A power mode control system for microprocessors offers an unlimited variety of hardware-supported power modes that may satisfy any operating scenario. The microprocessor unit comprises a register that contains particular bit fields for defining selectable power modes. The particular bit fields in the register define pointers to a power mode defining register. Each pointer selects a corresponding bit field in the power mode defining register. The bits in the bit fields of the power mode defining register either directly control a power mode of at least one functional or peripheral blocks of the unit; or they are pointers to a further power mode defining register and the bits in the bit fields of the further power mode defining register directly control a power mode of at least one functional or peripheral blocks of the unit.
摘要翻译：用于微处理器的功率模式控制系统提供了可以满足任何操作情况的无限多种硬件支持的功率模式。微处理器单元包括一个寄存器，该寄存器包含用于定义可选功率模式的特定位字段。寄存器中的特定位字段定义指向功率模式定义寄存器的指针。每个指针在功率模式定义寄存器中选择相应的位字段。功率模式定义寄存器的位域中的位直接控制该单元的至少一个功能或外围块的功率模式; 或者它们是指向另外的功率模式定义寄存器的指针，并且另外的功率模式定义寄存器的位字段中的位直接控制该单元的至少一个功能或外围块的功率模式。

10. 发明授权

US08750015B2 Integrated circuit comprising a FRAM memory and method for granting read-access to a FRAM memory 有权
标题翻译：包括FRAM存储器的集成电路和用于授予对FRAM存储器的读取访问的方法
公开(公告)号：US08750015B2
公开(公告)日：2014-06-10
申请号：US13025878
申请日：2011-02-11
申请人： Volker Rzehak , Rudiger Kuhn , Johannes Gerber , Matthias Arnold
发明人： Volker Rzehak , Rudiger Kuhn , Johannes Gerber , Matthias Arnold
IPC分类号： G11C11/22
CPC分类号： G11C11/221 , G11C11/22 , G11C11/2273
摘要： An electronic device includes an integrated circuit with a FRAM memory and an integrated capacitor connected between a power supply for the FRAM memory and ground. The integrated capacitor has a capacitance sufficient to store the charge necessary for a complete read-and-write-back cycle of the FRAM memory. When granting read-access to the FRAM memory, the FRAM memory is supplied by the integrated capacitor which is then disconnected from the integrated circuit power supply. Upon receiving a request for a read-access to the FRAM memory, a charge detector detects whether the internal capacitor is sufficiently charged for a complete read-and-write-back cycle of the FRAM memory. Read-access to the FRAM memory is only granted if the internal capacitor is sufficiently charged and disconnected from the power supply. An alternative embodiment alternately charges and powers the FRAM from two integrated capacitors.
摘要翻译：电子设备包括具有FRAM存储器的集成电路和连接在用于FRAM存储器和接地的电源之间的集成电容器。集成电容器具有足以存储FRAM存储器的完整读/写周期所需的电荷的电容。当对FRAM存储器进行读取访问时，FRAM存储器由集成电容器提供，然后与集成电路电源断开连接。在接收到对FRAM存储器的读取访问的请求时，充电检测器检测对于FRAM存储器的完整的读/写周期，内部电容器是否被充分充电。仅当内部电容器充分充电并与电源断开连接时，才可以对FRAM存储器进行读取。替代实施例从两个集成电容器交替地对FRAM充电和供电。

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