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1. 发明申请

US20130035050A1 Antenna and Receiver Circuit 审中-公开
标题翻译：天线和接收机电路
公开(公告)号：US20130035050A1
公开(公告)日：2013-02-07
申请号：US13521888
申请日：2010-01-13
申请人： Yuan Gao , Nair Murli , Yuanjin Zheng
发明人： Yuan Gao , Nair Murli , Yuanjin Zheng
IPC分类号： H04B1/06 , H04B1/18 , H01Q13/10
CPC分类号： H01Q1/243 , H01Q1/36 , H01Q1/38 , H01Q5/25 , H01Q21/064
摘要： According to one aspect of the invention, there is provided an antenna including: a substrate; a conductive layer formed on a portion of a top surface of the substrate; a first slot formed within the conductive layer; a conductive stub disposed within the first slot, the conductive stub tuned to reject a first frequency band; and a second slot formed within the conductive layer, the second slot tuned to reject a second frequency band.
摘要翻译：根据本发明的一个方面，提供一种天线，包括：基板; 形成在所述基板的顶表面的一部分上的导电层; 形成在所述导电层内的第一槽; 设置在所述第一槽内的导电短截线，所述导电短截线被调谐为拒绝第一频带; 以及形成在所述导电层内的第二槽，所述第二槽调谐为拒绝第二频带。

2. 发明授权

US09331878B2 Frequency shift keying transmitter 有权
标题翻译：频移键控发射机
公开(公告)号：US09331878B2
公开(公告)日：2016-05-03
申请号：US14125456
申请日：2012-06-14
申请人： San Jeow Cheng , Yuan Gao , Yuanjin Zheng , Chun Huat Heng
发明人： San Jeow Cheng , Yuan Gao , Yuanjin Zheng , Chun Huat Heng
IPC分类号： H04B7/02 , H04L1/02 , H04L27/12 , H04L27/156
CPC分类号： H04L27/12 , H04L27/156 , H04L2027/0051
摘要： According to embodiments of the present invention, a frequency shift keying transmitter is provided. The frequency shift keying transmitter includes a logic gate arrangement that produces an output signal having a frequency that depends on input signals to the logic gate arrangement, a clock generator coupled to the logic gate arrangement, the clock generator adapted to produce a clock signal, and a sampling arrangement coupled to the logic gate arrangement, the sampling arrangement adapted to receive a data signal, wherein the sampling arrangement is configured to sample the clock signal to generate periodic waveforms delayed from each other by an interval determined by the point the clock signal is sampled, wherein the sampling arrangement is configured to be controlled by the data signal to have the logic gate arrangement select periodic waveforms that are delayed from each other by one of a set of intervals associated with the data signal, to be used as the input signals to the logic gate arrangement to produce the output signal.
摘要翻译：根据本发明的实施例，提供了一种频移键控发射机。频移键控发射器包括逻辑门装置，其产生具有取决于逻辑门装置的输入信号的频率的输出信号，耦合到逻辑门装置的时钟发生器，适于产生时钟信号的时钟发生器，以及耦合到逻辑门布置的采样布置，所述采样布置适于接收数据信号，其中所述采样布置被配置为对所述时钟信号进行采样，以产生彼此延迟的周期波形，所述周期波形由所述时钟信号为采样，其中采样布置被配置为由数据信号控制，以使逻辑门布置选择周期性波形，该周期波形通过与数据信号相关联的一组间隔彼此延迟，以用作输入信号到逻辑门装置以产生输出信号。

3. 发明授权

US08976901B2 Phase shift keying transmitter circuit 有权
标题翻译：相移键控发射机电路
公开(公告)号：US08976901B2
公开(公告)日：2015-03-10
申请号：US13699825
申请日：2011-05-25
申请人： Shengxi Diao , Yuan Gao , Yuanjin Zheng
发明人： Shengxi Diao , Yuan Gao , Yuanjin Zheng
IPC分类号： H04L27/20 , H03C3/00 , H03B5/12 , H04B13/00
CPC分类号： H04L27/20 , H03B5/1215 , H03B5/1228 , H03B5/124 , H03C3/00 , H04B13/005 , H04L27/2046
摘要： A phase shift keying transmitter circuit that includes: a variable frequency conversion stage adapted to receive a first data signal, wherein the variable frequency conversion stage comprises a plurality of frequency modulating elements, wherein the first data signal controls the number of the plurality of frequency modulating elements that are operated so as to control an operating frequency of the variable frequency conversion stage; and an output stage configured to switch between one of two possible outputs, the signals provided by one of the two possible outputs having an opposite polarity to the other, wherein the output stage is configured to receive a second data signal to control the switching between the two possible outputs, wherein the output stage is coupled to the variable frequency conversion stage and wherein the switching between the two possible outputs changes the phase of a signal from the variable frequency conversion stage by 180°.
摘要翻译：一种相移键控发送器电路，包括：适于接收第一数据信号的可变频率转换级，其中所述可变频率转换级包括多个频率调制元件，其中所述第一数据信号控制所述多个频率调制操作以控制可变变频级的工作频率的元件; 以及输出级，被配置为在两个可能输出中的一个输出之间切换，由两个可能的输出之一提供的信号具有与另一个极性相反的极性，其中所述输出级被配置为接收第二数据信号以控制在两个可能的输出，其中输出级耦合到可变频率转换级，并且其中两个可能输出之间的切换将来自可变频率转换级的信号的相位改变180°。

4. 发明申请

US20130163689A1 Phase Shift Keying Transmitter Circuit 有权
标题翻译：相移键控变送器电路
公开(公告)号：US20130163689A1
公开(公告)日：2013-06-27
申请号：US13699825
申请日：2011-05-25
申请人： Shengxi Diao , Yuan Gao , Yuanjin Zheng
发明人： Shengxi Diao , Yuan Gao , Yuanjin Zheng
IPC分类号： H04L27/20
CPC分类号： H04L27/20 , H03B5/1215 , H03B5/1228 , H03B5/124 , H03C3/00 , H04B13/005 , H04L27/2046
摘要： A phase shift keying transmitter circuit that includes: a variable frequency conversion stage adapted to receive a first data signal, wherein the variable frequency conversion stage comprises a plurality of frequency modulating elements, wherein the first data signal controls the number of the plurality of frequency modulating elements that are operated so as to control an operating frequency of the variable frequency conversion stage; and an output stage configured to switch between one of two possible outputs, the signals provided by one of the two possible outputs having an opposite polarity to the other, wherein the output stage is configured to receive a second data signal to control the switching between the two possible outputs, wherein the output stage is coupled to the variable frequency conversion stage and wherein the switching between the two possible outputs changes the phase of a signal from the variable frequency conversion stage by 180°.
摘要翻译：一种相移键控发送器电路，包括：适于接收第一数据信号的可变频率转换级，其中所述可变频率转换级包括多个频率调制元件，其中所述第一数据信号控制所述多个频率调制操作以控制可变变频级的工作频率的元件; 以及输出级，被配置为在两个可能输出中的一个输出之间切换，由两个可能的输出之一提供的信号具有与另一个极性相反的极性，其中所述输出级被配置为接收第二数据信号以控制在两个可能的输出，其中输出级耦合到可变频率转换级，并且其中两个可能输出之间的切换将来自可变频率转换级的信号的相位改变180°。

5. 发明授权

US07164901B2 DC offset-free RF front-end circuits and systems for direct conversion receivers 失效
标题翻译：直流偏移RF前端电路和直接转换接收器系统
公开(公告)号：US07164901B2
公开(公告)日：2007-01-16
申请号：US10746200
申请日：2003-12-24
申请人： Yuanjin Zheng , Chin Boon Tear , Sheng Jau Wong
发明人： Yuanjin Zheng , Chin Boon Tear , Sheng Jau Wong
IPC分类号： H04B1/26
CPC分类号： H04B1/30 , H03D3/008 , H03G3/3052
摘要： A DCR RF front-end removes the DC term resulting from mixer port to port leakage and feeds RF and LO signals into the mixers with different phase combinations. The signal inputs to the mixers result in the intermediate frequency (IF) output of mixers being 180 degrees out of phase and their DC terms in phase. When subtracting the two outputs from each other the IF signals add up while the DC terms cancel giving a DC free output. A DC offset feedback tuning loop detects the DC offset in the IF domain and then feeds back the tuning voltage to current injection mixers. A multiplier cancels the IF signals and amplifies the DC offset and a comparator compares the amplified DC offset with a threshold voltage and controls the gain of current injection mixers. The feedback tuning loop thus tracks time-varying DC offsets in real-time.
摘要翻译： DCR RF前端将混频器端口产生的DC项除去端口泄漏，并将RF和LO信号馈入具有不同相位组合的混频器。混频器的信号输入导致混频器的中频（IF）输出相位相差180度，它们的直流项目同相。当相减两个输出时，IF信号相加，而直流项取消给出无直流输出。 DC偏置反馈调谐回路检测IF域中的直流偏移，然后将调谐电压反馈到电流注入混合器。乘法器取消IF信号并放大DC偏移，并且比较器将放大的DC偏移与阈值电压进行比较，并控制电流注入混合器的增益。因此，反馈调谐环路实时跟踪时变直流偏移。

6. 发明授权

US09231596B2 Method and apparatus for a duty-cycled harmonic injection locked oscillator 有权
标题翻译：一种占空比谐波注入锁定振荡器的方法和装置
公开(公告)号：US09231596B2
公开(公告)日：2016-01-05
申请号：US14007661
申请日：2011-03-28
申请人： Zhiming Chen , Kuang-Wei Cheng , Yuanjin Zheng , Minkyu Je
发明人： Zhiming Chen , Kuang-Wei Cheng , Yuanjin Zheng , Minkyu Je
IPC分类号： H03B5/12 , H03L7/00 , H03L7/24
CPC分类号： H03L7/00 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03L7/24
摘要： A method and an apparatus for a duty-cycled injection locked oscillator is provided for frequency shift keyed (FSK) signal transmissions. The oscillator includes a resonance LC tank and a first switching device. The first switching device is coupled to the resonance LC tank and injects an initial current pulse with a predetermined pulse magnitude into the resonance LC tank. The initial current pulse also fixes an initial phase of the duty-cycled injection locked free-running oscillator in response to the predetermined magnitude of the initial current pulse to enable fast settling of injection locking and high data rate operation of the duty-cycled injection locked oscillator. The oscillator also includes a second switching device, such as a differential pair of switching devices. The second switching device is coupled to the LC resonance tank for injecting a gated periodic reference signal having a duty cycle modified to reduce power of the reference signal by approximately seventy-five per cent.
摘要翻译：提供了一种用于频移键控（FSK）信号传输的占空循环注入锁定振荡器的方法和装置。振荡器包括谐振LC箱和第一开关装置。第一开关装置耦合到谐振LC箱并且将具有预定脉冲幅度的初始电流脉冲注入到谐振LC箱中。初始电流脉冲还根据初始电流脉冲的预定幅度固定占空循环注入锁定自由振荡器的初始相位，以实现注入锁定的快速建立和占空比循环注入锁定的高数据速率操作振荡器振荡器还包括第二开关器件，例如差分对开关器件。第二开关装置耦合到LC谐振箱，用于注入具有修改的占空比的门控周期参考信号，以将参考信号的功率降低约百分之七十五。

7. 发明授权

US08811527B2 Ultra-wideband impulse radio transmitter with modulation 有权
标题翻译：带调制的超宽带脉冲无线电发射机
公开(公告)号：US08811527B2
公开(公告)日：2014-08-19
申请号：US13503794
申请日：2009-10-30
申请人： Shengxi Diao , Yuanjin Zheng
发明人： Shengxi Diao , Yuanjin Zheng
IPC分类号： H04L27/00
CPC分类号： H04L27/2003 , H03C3/16 , H03C3/225 , H04B1/71635 , H04B1/7174
摘要： A transmitter with modulation comprising a phase changing stage having a first switch and a second switch coupled t the first switch, a first transistor and a second transistor individually coupled to the each switch. The transmitter is configured to receive a phase changing signal having a first state and a second state. The first switch is configured t operate in an opposing manner to the second switch such that only the first transistor is configured to be turned on i the first state and only the second transistor is configured to be turned on in the second state upon receipt of the phase changing signal by the switches so as to achieve a change in an output phase of the transmitter when the phase changing signal switches from the first state to the second state.
摘要翻译：一种具有调制的发射机，包括具有第一开关的相位改变级和耦合到第一开关的第二开关，第一晶体管和第二晶体管单独耦合到每个开关。发射机被配置为接收具有第一状态和第二状态的相位改变信号。第一开关被配置为以与第二开关相反的方式操作，使得仅第一晶体管被配置为在第一状态下导通，并且仅在接收到第二晶体管时第二晶体管被配置为在第二状态下导通通过开关进行相位变化信号，从而当相变信号从第一状态切换到第二状态时，实现变送器的输出相位的变化。

8. 发明授权

US07221924B2 Wideband monolithic tunable high-Q notch filter for image rejection in RF application 失效
标题翻译：宽带单片可调谐高Q陷波滤波器，用于RF应用中的图像抑制
公开(公告)号：US07221924B2
公开(公告)日：2007-05-22
申请号：US11324400
申请日：2006-01-03
申请人： Yuanjin Zheng , Sheng Jau Wong , Yong Xu
发明人： Yuanjin Zheng , Sheng Jau Wong , Yong Xu
IPC分类号： H04B1/10
CPC分类号： H04B1/1027 , H03H7/03 , H03H11/1213
摘要： A notch filter with a high Q factor, which is integrated with a first and a second cascoded LNA, is totally contained on an integrated chip. The notch filter, comprising two Q-enhancement circuits, is coupled to the second differential LNA. The two Q-enhancement circuits are combined to generate sufficient negative impedance to compensate for the loss in the on-chip low Q inductors. To improve the image rejection of the notch filter in a wide frequency band, the notch filter uses an automatic current tuning circuit which consists of an analog multiplier and fixed and voltage controlled current sources. Furthermore, by modifying the connection and location of the tunable varactor, another wideband tunable notch filter is implemented. The notch filter can be applied in all current wireless receiver systems.
摘要翻译：具有高Q因子的陷波滤波器与第一和第二级联LNA集成，完全包含在集成芯片上。包括两个Q增强电路的陷波滤波器耦合到第二差分LNA。两个Q增强电路被组合以产生足够的负阻抗以补偿片上低Q电感器的损耗。为了改善宽频带陷波滤波器的图像抑制，陷波滤波器使用自动电流调谐电路，该电路由模拟乘法器和固定和电压控制的电流源组成。此外，通过修改可调谐变容二极管的连接和位置，实现了另一种宽带可调陷波滤波器。陷波滤波器可以应用于所有当前的无线接收机系统中。

9. 发明申请

US20050143028A1 DC offset-free RF front-end circuits and systems for direct conversion receivers 失效
标题翻译：直流偏移RF前端电路和直接转换接收器系统
公开(公告)号：US20050143028A1
公开(公告)日：2005-06-30
申请号：US10746200
申请日：2003-12-24
申请人： Yuanjin Zheng , Chin Tear , Sheng Wong
发明人： Yuanjin Zheng , Chin Tear , Sheng Wong
IPC分类号： H01Q11/12 , H03D3/00 , H03G3/30 , H04B1/30
CPC分类号： H04B1/30 , H03D3/008 , H03G3/3052
摘要： A DCR RF front-end removes the DC term resulting from mixer port to port leakage and feeds RF and LO signals into the mixers with different phase combinations. The signal inputs to the mixers result in the intermediate frequency (IF) output of mixers being 180 degrees out of phase and their DC terms in phase. When subtracting the two outputs from each other the IF signals add up while the DC terms cancel giving a DC free output. A DC offset feedback tuning loop detects the DC offset in the IF domain and then feeds back the tuning voltage to current injection mixers. A multiplier cancels the IF signals and amplifies the DC offset and a comparator compares the amplified DC offset with a threshold voltage and controls the gain of current injection mixers. The feedback tuning loop thus tracks time-varying DC offsets in real-time.
摘要翻译： DCR RF前端将混频器端口产生的DC项除去端口泄漏，并将RF和LO信号馈入具有不同相位组合的混频器。混频器的信号输入导致混频器的中频（IF）输出相位相差180度，它们的直流项目同相。当相减两个输出时，IF信号相加，而直流项取消给出无直流输出。 DC偏置反馈调谐回路检测IF域中的直流偏移，然后将调谐电压反馈到电流注入混合器。乘法器取消IF信号并放大DC偏移，并且比较器将放大的DC偏移与阈值电压进行比较，并控制电流注入混合器的增益。因此，反馈调谐环路实时跟踪时变直流偏移。

10. 发明授权

US08823452B2 GM-ratioed amplifier 有权
标题翻译： GM比例放大器
公开(公告)号：US08823452B2
公开(公告)日：2014-09-02
申请号：US13636916
申请日：2010-03-24
申请人： Zhiming Chen , Foo Chung Choong , Yuanjin Zheng
发明人： Zhiming Chen , Foo Chung Choong , Yuanjin Zheng
IPC分类号： H03F3/45 , H03G1/00 , H03F1/32
CPC分类号： H03F3/45179 , H03F1/3211 , H03F3/45 , H03F3/45183 , H03F3/45475 , H03F3/45659 , H03F2203/45646 , H03G1/0029 , H03G1/007
摘要： Embodiments provide a gm-ratioed amplifier. The gm-ratioed amplifier comprises a first input voltage terminal and a second input voltage terminal, a first output voltage terminal and a second output voltage terminal, and an amplifying unit. The amplifying unit may be coupled between the input voltage terminals and the output voltage terminals and may be adapted to supply an output voltage to the output terminals in dependence on an input voltage supplied to the input terminals. The amplifying unit may comprise a gm-load, which comprises a first load branch comprising a first field effect transistor, and a second load branch comprising a second field effect transistor. A first source/drain terminal and a gate terminal of the first field effect transistor may be coupled to the first output voltage terminal, and a first source/drain terminal and a gate terminal of the second field effect transistor may be coupled to the second output voltage terminal. A second source/drain terminal of the first field effect transistor and a second source/drain terminal of the second field effect transistor may be coupled with each other through a first transistor arrangement such that a linearity of response of the output voltage to the input voltage is improved.
摘要翻译：实施例提供一种gm比的放大器。 gm比放大器包括第一输入电压端子和第二输入电压端子，第一输出电压端子和第二输出电压端子以及放大单元。放大单元可以耦合在输入电压端子和输出电压端子之间，并且可以适于根据提供给输入端子的输入电压向输出端子提供输出电压。放大单元可以包括gm负载，其包括包括第一场效应晶体管的第一负载支路和包括第二场效应晶体管的第二负载支路。第一场效应晶体管的第一源极/漏极端子和栅极端子可以耦合到第一输出电压端子，并且第二场效应晶体管的第一源极/漏极端子和栅极端子可以耦合到第二输出端子电压端子。第一场效应晶体管的第二源极/漏极端子和第二场效应晶体管的第二源极/漏极端子可以通过第一晶体管布置彼此耦合，使得输出电压对输入电压的响应的线性改进了

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