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1. 发明授权

US10790812B1 Gate driver to decrease EMI with shorter dead-time 有权
公开(公告)号：US10790812B1
公开(公告)日：2020-09-29
申请号：US15640505
申请日：2017-07-01
申请人： Active-Semi, Inc.
发明人： Thinh Ba Nguyen , Thien Khanh Luong , Thuc Huu Lam , Hue Khac Trinh
IPC分类号： H03K17/08 , H03K19/0185 , H03K19/0175 , H01L23/525 , H02M1/08 , H02M3/155
摘要： An integrated circuit includes a gate driver circuit that controls high side and low side transistors to operate in buck or boost mode. In buck operating mode, after switching off the low side transistor, the gate driver circuit controls the high side transistor in a constant current mode. After the low side transistor is disabled and no longer conducts current, then the gate driver circuit controls the high side transistor to operate in full-enhancement mode. In boost operating mode, after switching off the high side transistor, the gate driver circuit controls the low side transistor in a constant current mode. After the high side transistor is disabled, then the gate driver circuit controls the low side switching transistor to operate in full-enhancement mode. In both buck and boost operation, the gate driver circuit operates without dead time in which both the high side and low side transistors are off.

2. 发明申请

US20200153242A1 PREBIASING CIRCUITRY FOR FAST SETTLEMENT OF SWITCHING CONVERTER IN A POWER LOSS PROTECTION SYSTEM 审中-公开
公开(公告)号：US20200153242A1
公开(公告)日：2020-05-14
申请号：US16742176
申请日：2020-01-14
申请人： Active-Semi, Inc.
发明人： Thuc Huu Lam , Hue Khac Trinh , Hiroshi Watanabe
IPC分类号： H02J1/10 , H02M3/158 , H02J1/14 , H02M7/49 , H02J1/12 , H02M5/46
摘要： A power loss protection integrated circuit includes a VIN terminal, a VOUT terminal, an STR terminal, a switch circuit (eFuse), a control circuit, and a prebiasing circuit. In a normal mode, current flows from a power source, into VIN, through the eFuse, out of VOUT, and to the output node. A switching converter of which the control circuit is a part is disabled. If a switch over condition then occurs, the eFuse is turned off and the switching converter starts operating. The switching converter receives energy from STR and drives the output node. Switch over is facilitated by prebiasing. Prior to switch over, the prebiasing circuit prebiases a control loop node as a function of eFuse current flow prior to switch over. When the switching converter begins operating, the node is already prebiased for the proper amount of current to be supplied by the switching converter onto the output node.

3. 发明申请

US20140164803A1 Power Management Integrated Circuit Having A Configurable Total Hibernate Mode 有权
标题翻译：具有可配置的总休眠模式的电源管理集成电路
公开(公告)号：US20140164803A1
公开(公告)日：2014-06-12
申请号：US13712900
申请日：2012-12-12
申请人： ACTIVE-SEMI, INC.
发明人： Steven Huynh , Hue Khac Trinh
IPC分类号： G06F1/32
CPC分类号： G06F1/3206 , G06F1/3287 , Y02D10/171
摘要： A Multi-Tile Power Management Integrated Circuit (MTPMIC) includes tiles including an MCU/ADC tile and a power manager tile. The power manager tile includes a hibernate circuit and a set of Configurable Switching Power Supply Pulse Width Modulator (CSPSPWM) components. The CSPSPWM, in combination with other circuitry external to the integrated circuit, form a switching power supply. The hibernate circuit is operable in a hibernate mode where the CSPSPWM is disabled and the switching power supply no longer generates a supply voltage. A processor in the MCU/ADC tile writes across a standardized bus to configure the hibernate circuit to wake up after a timer determines a configurable amount of time has lapsed, or to wake up in response to a signal present on a terminal of MTPMIC. The processor enables the hibernate mode causing the switching power supply to no longer provide power to the processor and other circuitry of MTPMIC.
摘要翻译：多平铺电源管理集成电路（MTPMIC）包括瓦片，包括MCU / ADC瓦片和电源管理器瓦片。电源管理器瓦片包括一个休眠电路和一组可配置开关电源脉宽调制器（CSPSPWM）组件。 CSPSPWM与集成电路外部的其他电路组合形成开关电源。休眠电路可以在禁用CSPSPWM的休眠模式下工作，并且开关电源不再产生电源电压。 MCU / ADC瓦片中的处理器通过标准化总线写入，以配置休眠电路在定时器确定可配置的时间量已经过去之后唤醒，或者响应于MTPMIC的终端上存在的信号而唤醒。处理器启用休眠模式，导致开关电源不再向MTPMIC的处理器和其他电路供电。

4. 发明授权

US10985644B1 Optimized gate driver for low voltage power loss protection system 有权
公开(公告)号：US10985644B1
公开(公告)日：2021-04-20
申请号：US15633662
申请日：2017-06-26
申请人： Active-Semi, Inc.
发明人： Thuc Huu Lam , Khanh Quang Dinh , Tung Van Nguyen , Hue Khac Trinh
IPC分类号： H02M1/08 , H02M1/32 , H02M3/158 , H02J9/06 , H02M3/155 , H02M1/00
摘要： An integrated circuit (IC) comprises a regulator circuit, a bootstrap control circuit, and a gate driver that drives a transistor pair in buck or boost mode to switch current through an inductor. The IC has a VIN terminal coupled to receive a voltage generated from an AC power source, a STR terminal coupled to receive a voltage from a stored power source (e.g., a capacitor bank), and a HSB terminal that is capacitively coupled to the inductor. When bucking or boosting, the regulator circuit generates VDD supply voltage from the stored power source, supplies the VDD supply voltage onto the bootstrap control circuit, and the bootstrap control circuit generates a gate driver supply voltage that is supplied to the gate driver circuit. When not bucking or boosting, voltage on the HSB terminal is maintained between a voltage threshold from the AC power source without draining the stored power source.

5. 发明授权

US09178413B2 Power factor correction autodetect 有权
标题翻译：功率因数校正自动检测
公开(公告)号：US09178413B2
公开(公告)日：2015-11-03
申请号：US14083648
申请日：2013-11-19
申请人： Active-Semi, Inc.
发明人： Steven Huynh , Hue Khac Trinh , Khanh Quang Dinh , Duong Cong Le , Degang Xia
IPC分类号： H02M1/42 , H02M1/00 , H02M7/217 , H02M3/335
CPC分类号： H02M1/4225 , H02M1/4208 , H02M3/33592 , H02M7/217 , H02M2001/0012 , H02M2001/0032 , H02M2001/008 , Y02B70/126 , Y02B70/16
摘要： A power supply system includes an Offline Total Power Management Integrated Circuit (OTPMIC). The OTPMIC controls a Power Factor Correction (PFC) converter, a main AC/DC converter, and a standby AC/DC converter. A PFC Autodetect circuit in the OTPMIC monitors current flow in the PFC converter. If a high power condition is detected, then the PFC Autodetect circuit enables the PFC converter. The high power condition may be a voltage drop across a current sense resistor of a predetermined voltage for a predetermined time, within one half period of the incoming AC supply voltage. If a low power condition is detected, then the PFC Autodetect circuit disables the PFC converter. The PFC Autodetect circuit stores an IMON value that determines the predetermined voltage, and a TMON value that determines the predetermined time. The IMON and TMON values are loaded into the Autodetect circuit across an optocoupler link of the standby converter.
摘要翻译：电源系统包括离线总功率管理集成电路（OTPMIC）。 OTPMIC控制功率因数校正（PFC）转换器，主AC / DC转换器和备用AC / DC转换器。 OTPMIC中的PFC自动检测电路监控PFC转换器中的电流。如果检测到高功率状态，则PFC自动检测电路使能PFC转换器。在输入的AC电源电压的一个半周期内，高功率条件可以是预定电压的电流检测电阻器上的预定时间内的电压降。如果检测到低功耗条件，则PFC自动检测电路会禁用PFC转换器。 PFC自动检测电路存储确定预定电压的IMON值和确定预定时间的TMON值。 IMON和TMON值通过备用转换器的光耦链路加载到Autodetect电路中。

6. 发明授权

US10992173B2 Optimized gate driver for low voltage power loss protection system 有权
公开(公告)号：US10992173B2
公开(公告)日：2021-04-27
申请号：US16931066
申请日：2020-07-16
申请人： Active-Semi, Inc.
发明人： Thuc Huu Lam , Khanh Quang Dinh , Tung Van Nguyen , Hue Khac Trinh
IPC分类号： H02J9/06 , H02M1/08 , H02M3/158 , H02J9/00 , H02H9/00 , H02M1/00
摘要： An integrated circuit (IC) comprises a regulator circuit, a bootstrap control circuit, and a gate driver that drives a transistor pair in buck or boost mode to switch current through an inductor. The IC has a VIN terminal coupled to receive a voltage generated from an AC power source, a STR terminal coupled to receive a voltage from a stored power source (e.g., a capacitor bank), and a HSB terminal that is capacitively coupled to the inductor. When bucking or boosting, the regulator circuit generates VDD supply voltage from the stored power source, supplies the VDD supply voltage onto the bootstrap control circuit, and the bootstrap control circuit generates a gate driver supply voltage that is supplied to the gate driver circuit. When not bucking or boosting, voltage on the HSB terminal is maintained between a voltage threshold from the AC power source without draining the stored power source.

7. 发明授权

US10770894B1 Fast settlement of supplement converter for power loss protection system 有权
公开(公告)号：US10770894B1
公开(公告)日：2020-09-08
申请号：US16051475
申请日：2018-07-31
申请人： Active-Semi, Inc.
发明人： Thuc Huu Lam , Hue Khac Trinh , Hiroshi Watanabe
IPC分类号： H02J1/10 , H02J1/12 , H02M3/158 , H02J1/14 , H02M5/46 , H02M7/49
摘要： A power loss protection integrated circuit includes a VIN terminal, a VOUT terminal, an STR terminal, a switch circuit (eFuse), a control circuit, and a prebiasing circuit. In a normal mode, current flows from a power source, into VIN, through the eFuse, out of VOUT, and to the output node. A switching converter of which the control circuit is a part is disabled. If a switch over condition then occurs, the eFuse is turned off and the switching converter starts operating. The switching converter receives energy from STR and drives the output node. Switch over is facilitated by prebiasing. Prior to switch over, the prebiasing circuit prebiases a control loop node as a function of eFuse current flow prior to switch over. When the switching converter begins operating, the node is already prebiased for the proper amount of current to be supplied by the switching converter onto the output node.

8. 发明申请

US20150138856A1 POWER FACTOR CORRECTION AUTODETECT 有权
标题翻译：功率因数校正自动
公开(公告)号：US20150138856A1
公开(公告)日：2015-05-21
申请号：US14083648
申请日：2013-11-19
申请人： Active-Semi, Inc.
发明人： Steven Huynh , Hue Khac Trinh , Khanh Quang Dinh , Duong Cong Le , Degang Xia
IPC分类号： H02M1/42
CPC分类号： H02M1/4225 , H02M1/4208 , H02M3/33592 , H02M7/217 , H02M2001/0012 , H02M2001/0032 , H02M2001/008 , Y02B70/126 , Y02B70/16
摘要： A power supply system includes an Offline Total Power Management Integrated Circuit (OTPMIC). The OTPMIC controls a Power Factor Correction (PFC) converter, a main AC/DC converter, and a standby AC/DC converter. A PFC Autodetect circuit in the OTPMIC monitors current flow in the PFC converter. If a high power condition is detected, then the PFC Autodetect circuit enables the PFC converter. The high power condition may be a voltage drop across a current sense resistor of a predetermined voltage for a predetermined time, within one half period of the incoming AC supply voltage. If a low power condition is detected, then the PFC Autodetect circuit disables the PFC converter. The PFC Autodetect circuit stores an IMON value that determines the predetermined voltage, and a TMON value that determines the predetermined time. The IMON and TMON values are loaded into the Autodetect circuit across an optocoupler link of the standby converter.
摘要翻译：电源系统包括离线总功率管理集成电路（OTPMIC）。 OTPMIC控制功率因数校正（PFC）转换器，主AC / DC转换器和备用AC / DC转换器。 OTPMIC中的PFC自动检测电路监控PFC转换器中的电流。如果检测到高功率状态，则PFC自动检测电路使能PFC转换器。在输入的AC电源电压的一个半周期内，高功率条件可以是预定电压的电流检测电阻器上的预定时间内的电压降。如果检测到低功耗条件，则PFC自动检测电路会禁用PFC转换器。 PFC自动检测电路存储确定预定电压的IMON值和确定预定时间的TMON值。 IMON和TMON值通过备用转换器的光耦链路加载到Autodetect电路中。

9. 发明授权

US10826480B1 Gate driver to decrease EMI with shorter dead-time 有权
公开(公告)号：US10826480B1
公开(公告)日：2020-11-03
申请号：US15640505
申请日：2017-07-01
申请人： Active-Semi, Inc.
发明人： Thinh Ba Nguyen , Thien Khanh Luong , Thuc Huu Lam , Hue Khac Trinh
IPC分类号： H03K17/08 , H03K19/0185 , H03K19/0175 , H01L23/525 , H02M1/08 , H02M3/155
摘要： An integrated circuit includes a gate driver circuit that controls high side and low side transistors to operate in buck or boost mode. In buck operating mode, after switching off the low side transistor, the gate driver circuit controls the high side transistor in a constant current mode. After the low side transistor is disabled and no longer conducts current, then the gate driver circuit controls the high side transistor to operate in full-enhancement mode. In boost operating mode, after switching off the high side transistor, the gate driver circuit controls the low side transistor in a constant current mode. After the high side transistor is disabled, then the gate driver circuit controls the low side switching transistor to operate in full-enhancement mode. In both buck and boost operation, the gate driver circuit operates without dead time in which both the high side and low side transistors are off.

10. 发明授权

US10778079B1 Optimized gate driver for low voltage power loss protection system 有权
公开(公告)号：US10778079B1
公开(公告)日：2020-09-15
申请号：US15633662
申请日：2017-06-26
申请人： Active-Semi, Inc.
发明人： Thuc Huu Lam , Khanh Quang Dinh , Tung Van Nguyen , Hue Khac Trinh
IPC分类号： H02M1/08 , H02M1/32 , H02M3/158 , H02J9/06 , H02M3/155 , H02M1/00
摘要： An integrated circuit (IC) comprises a regulator circuit, a bootstrap control circuit, and a gate driver that drives a transistor pair in buck or boost mode to switch current through an inductor. The IC has a VIN terminal coupled to receive a voltage generated from an AC power source, a STR terminal coupled to receive a voltage from a stored power source (e.g., a capacitor bank), and a HSB terminal that is capacitively coupled to the inductor. When bucking or boosting, the regulator circuit generates VDD supply voltage from the stored power source, supplies the VDD supply voltage onto the bootstrap control circuit, and the bootstrap control circuit generates a gate driver supply voltage that is supplied to the gate driver circuit. When not bucking or boosting, voltage on the HSB terminal is maintained between a voltage threshold from the AC power source without draining the stored power source.

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