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1. 发明授权

US11139737B2 Regulator control integrated circuit having COT and valley current modes 有权
公开(公告)号：US11139737B2
公开(公告)日：2021-10-05
申请号：US16428900
申请日：2019-05-31
申请人： Active-Semi, Inc.
发明人： Masashi Nogawa
IPC分类号： H02M3/158 , H02M3/157 , H02M1/00 , H02M3/156
摘要： A voltage regulator control integrated circuit includes constituent parts including an error amplifier circuit, a comparator circuit, a compensation signal generator circuit, an oscillator/one-shot circuit, a latch, and a current sense circuit. In a first example, the integrated circuit is operable in a first mode and in a second mode. In the first mode, the various parts are configured and interconnected in such a way that they operate together as a valley current mode regulator control circuit. In the second mode, the various parts are configured and interconnected in such a way that they operate together as a current-mode constant on-time mode regulator control circuit. In another example, a voltage regulator control integrated circuit has the same basic constituent parts and is operable in a first mode as a peak current mode regulator control circuit, or in a second mode as a constant off-time time mode regulator control circuit.

2. 发明授权

US11002772B2 Using PCB temperature compensation trace to perform DCR current sensing in power supply circuitry 有权
公开(公告)号：US11002772B2
公开(公告)日：2021-05-11
申请号：US16036940
申请日：2018-07-17
申请人： Active-Semi, Inc.
发明人： Narasimhan Trichy
IPC分类号： G01R19/32 , G01R31/40 , G01R1/20
摘要： A system comprises an integrated circuit package, an inductor that is part of a power supply, and a printed circuit board (PCB) having a metal trace disposed directly below the inductor when viewed from a top-down perspective. The integrated circuit package includes a first terminal, a second terminal, and a novel inductor current detection and calibration circuit. The first terminal is coupled to a first end of the metal trace and the second terminal is coupled to a second end of the metal trace. During operation of the power supply, the novel circuit detects an OCP condition whereby an output current of the power supply exceeds an OCP level. The novel circuit detects the OCP condition in part by sensing a voltage across the metal trace. After calibration at room temperature, the novel circuit performs accurate OCP detection over a range of temperatures without using any temperature sensor near inductor.

3. 发明授权

US10790812B1 Gate driver to decrease EMI with shorter dead-time 有权
公开(公告)号：US10790812B1
公开(公告)日：2020-09-29
申请号：US15640505
申请日：2017-07-01
申请人： Active-Semi, Inc.
发明人： Thinh Ba Nguyen , Thien Khanh Luong , Thuc Huu Lam , Hue Khac Trinh
IPC分类号： H03K17/08 , H03K19/0185 , H03K19/0175 , H01L23/525 , H02M1/08 , H02M3/155
摘要： An integrated circuit includes a gate driver circuit that controls high side and low side transistors to operate in buck or boost mode. In buck operating mode, after switching off the low side transistor, the gate driver circuit controls the high side transistor in a constant current mode. After the low side transistor is disabled and no longer conducts current, then the gate driver circuit controls the high side transistor to operate in full-enhancement mode. In boost operating mode, after switching off the high side transistor, the gate driver circuit controls the low side transistor in a constant current mode. After the high side transistor is disabled, then the gate driver circuit controls the low side switching transistor to operate in full-enhancement mode. In both buck and boost operation, the gate driver circuit operates without dead time in which both the high side and low side transistors are off.

4. 发明申请

US20200301716A1 Methods And Apparatus For Selecting Operating Modes In A Device 审中-公开
公开(公告)号：US20200301716A1
公开(公告)日：2020-09-24
申请号：US16528614
申请日：2019-07-31
申请人： Active-Semi, Inc.
发明人： Shu Ji , Chin-Ming Cheng
IPC分类号： G06F9/4401 , G06F1/26 , G06F11/07
摘要： Methods and apparatus for selecting operating modes in a device are disclosed. In an embodiment, a method includes powering on a device that is configured to operate in safe and normal operating modes, detecting whether the device enters the normal operating mode within a time interval, and enabling the device to operate in the safe operating mode when the device does not enter the normal operating mode within the time interval. In an embodiment, an apparatus includes a power signal controller that powers on a device that is configured to operate in safe and normal operating modes, a state machine that detects whether the device enters the normal operating mode within a time interval, and a control signal controller that enables the device to operate in the safe operating mode when the device does not enter the normal operating mode within the time interval.

5. 发明授权

US10768244B2 Power loss protection integrated circuit with autonomous capacitor health check 有权
公开(公告)号：US10768244B2
公开(公告)日：2020-09-08
申请号：US16030865
申请日：2018-07-10
申请人： Active-Semi, Inc.
发明人： John H. Carpenter, Jr. , Brett E. Smith
IPC分类号： G01R31/64 , H01H85/02 , H02J9/06 , G01R31/3835 , G01R27/26 , G01R31/392 , H02M1/08 , H02M1/32 , H02M3/156 , H02M3/158 , G01R19/25 , G05B11/28 , G05B15/02 , G05F1/66 , H02H3/08 , H03M1/12 , H03M1/76 , H02M1/00
摘要： A power loss protection integrated circuit includes a storage capacitor terminal (STR), an autonomous capacitor health check circuit, and a capacitor fault terminal (CF). The capacitor health check circuit autonomously performs periodic capacitor check operations. In a check operation, current is sinked from the STR terminal for a predetermined time and in a predetermined way. If during this time the voltage on the STR terminal STR drops below a predetermined voltage, then a digital signal CF is asserted onto the CF terminal. Immediately following each capacitor check, a charging voltage is driven onto the STR terminal to recharge the external capacitors coupled to the STR terminal. In one example, the integrated circuit further includes a current switch circuit (eFuse) and a buck/boost controller. The capacitor health check circuit is only enabled during normal mode operation of the integrated circuit, and the check circuit disables boost operation during capacitor checks.

6. 发明授权

US09887628B1 Power loss protection integrated circuit 有权
公开(公告)号：US09887628B1
公开(公告)日：2018-02-06
申请号：US15640402
申请日：2017-06-30
申请人： Active-Semi, Inc.
发明人： John H. Carpenter, Jr. , Hiroshi Watanabe , Brett E. Smith
IPC分类号： H02M1/32 , H02M3/158 , H02M1/08 , H02M3/156 , H02M1/00
CPC分类号： H02M1/32 , G01R19/2513 , G01R31/362 , G05B11/28 , G05B15/02 , G05F1/66 , H01H85/0241 , H02H3/08 , H02J9/061 , H02M1/08 , H02M3/156 , H02M3/158 , H02M3/1582 , H02M3/1588 , H02M2001/0009 , H03M1/122 , H03M1/765
摘要： A power loss protection integrated circuit includes a current switch circuit (eFuse), a VIN terminal, a VOUT terminal, a buck/boost controller, and a storage capacitor terminal STR. The controller is adapted to work: 1) as a boost to take a low voltage from the VOUT terminal and to output a larger charging voltage onto the STR terminal, or 2) as a buck to take a higher voltage from the STR terminal and to buck it down to a lower voltage required on the VOUT terminal. The current switch circuit outputs a digital undervoltage signal (UV) and a digital high current signal (HC). These signals are communicated on-chip to the controller. Asserting UV causes the converter to begin operating in the buck mode. Asserting HC prevents the converter from operating in the boost mode.

7. 发明授权

US09806559B2 Reversible buck or boost converter that determines boost output current from sensed boost input current 有权
公开(公告)号：US09806559B2
公开(公告)日：2017-10-31
申请号：US14881944
申请日：2015-10-13
申请人： Active-Semi, Inc.
发明人： Hong Mao , Wei-Chung Wu
IPC分类号： H02J7/00 , H02J7/04 , H02M3/158 , H02J7/10
CPC分类号： H02J7/045 , H02J7/0068 , H02J7/0072 , H02J2007/0059 , H02J2007/10 , H02M3/1582
摘要： A reversible buck or boost converter is operable in a buck mode and in a boost mode. In the buck mode, the converter receives a supply voltage via an input terminal and generates a charging current that is supplied to a battery, thereby charging the battery. The supply voltage is also supplied through the converter to an output terminal. In a boost mode, the converter receives power form the battery and generates a supply current and voltage that is output onto the output terminal. The same single current sense resistor is used both to control the charging current in the buck mode and to control a constant current supplied to the output terminal in the boost mode. The output current is controlled to be constant, regardless of changes in the in the battery voltage and changes in the output voltage.

8. 发明申请

US20160268816A1 Buck/Boost Circuit that Charges and Discharges Multi-Cell Batteries of a Power Bank Device 有权
标题翻译：降压/升压电路，充电和放电电池组的多节电池
公开(公告)号：US20160268816A1
公开(公告)日：2016-09-15
申请号：US14657589
申请日：2015-03-13
申请人： Active-Semi, Inc.
发明人： Hong Mao
IPC分类号： H02J7/00
CPC分类号： H02J7/007 , H02J7/0013 , H02J7/0065 , H02J7/0068
摘要： A power bank device has a single circuit topology involving a DC-to-DC converter and four transistors so that this single topology can be used both to charge battery cells with a regulated current in a charging step-up boost mode and to drive a regulated voltage onto a power bank voltage output node in a discharging step-down buck mode. In one example, the circuit includes a first transistor coupled to conduct current between a battery voltage node and a switch node SW, a second transistor coupled to conduct current between the SW node and a ground node, and third and fourth transistors coupled in series to conduct current between a voltage input node and the voltage output node. The inductor of the converter is coupled between the SW node and the voltage output node, and the output capacitor of the converter is coupled between the voltage output node and the ground node.
摘要翻译：电力设备具有涉及DC-DC转换器和四个晶体管的单个电路拓扑，使得该单个拓扑可以用于以充电升压升压模式以稳压电流对电池单元进行充电，并且驱动调节在放电降压降压模式下电压到电力库电压输出节点。在一个示例中，电路包括耦合以在电池电压节点和开关节点SW之间传导电流的第一晶体管，耦合以在SW节点和接地节点之间传导电流的第二晶体管，以及串联耦合到第三晶体管在电压输入节点和电压输出节点之间传导电流。转换器的电感耦合在SW节点和电压输出节点之间，转换器的输出电容耦合在电压输出节点和接地节点之间。

9. 发明授权

US09350245B2 Power management multi-chip module with separate high-side driver integrated circuit die 有权
公开(公告)号：US09350245B2
公开(公告)日：2016-05-24
申请号：US14664850
申请日：2015-03-21
申请人： Active-Semi, Inc.
发明人： Steven Huynh , Tsing Hsu
IPC分类号： H01L21/70 , H02M3/158 , H02P6/08 , H02M7/5387 , H02P6/14
CPC分类号： H02M3/158 , H02M7/5387 , H02P6/085 , H02P6/14 , Y10T29/41 , Y10T29/49002
摘要： A packaged device includes a first die, a second die, and specially spaced and positioned sets of package terminals. The first die includes a pulse-width modulator (PWM), a processor, a timer, high-side drivers, low-side drivers, and a fault protection circuit. The second die includes ultra-high voltage high-side drivers. In an ultra-high voltage application, the PWM and external circuitry together form a switching power supply that generates a high voltage. The high voltage powers external high-side transistors. The processor and timer control the ultra-high voltage high-side drivers, that in turn supply drive signals to the external high-side transistors through the package terminals. External low-side transistors are driven directly by low-side drivers of the first die. If the fault protection circuit detects an excessive current, then the fault protection circuit supplies a disable signal to high-side and low-side drivers of both dice. The disable signal is generated without execution of processor instructions.

10. 发明申请

US20160036266A1 Reversible Buck Or Boost Converter That Determines Boost Output Current From Sensed Boost Input Current 有权
标题翻译：可逆降压或升压转换器，用于确定升压输出电流从感应升压输入电流
公开(公告)号：US20160036266A1
公开(公告)日：2016-02-04
申请号：US14881944
申请日：2015-10-13
申请人： Active-Semi, Inc.
发明人： Hong Mao , Wei-Chung Wu
IPC分类号： H02J7/04
CPC分类号： H02J7/045 , H02J7/0068 , H02J7/0072 , H02J2007/0059 , H02J2007/10 , H02M3/1582
摘要： A reversible buck or boost converter is operable in a buck mode and in a boost mode. In the buck mode, the converter receives a supply voltage via an input terminal and generates a charging current that is supplied to a battery, thereby charging the battery. The supply voltage is also supplied through the converter to an output terminal. In a boost mode, the converter receives power form the battery and generates a supply current and voltage that is output onto the output terminal. The same single current sense resistor is used both to control the charging current in the buck mode and to control a constant current supplied to the output terminal in the boost mode. The output current is controlled to be constant, regardless of changes in the in the battery voltage and changes in the output voltage.
摘要翻译：可降压降压或升压转换器可在降压模式和升压模式下工作。在降压模式中，转换器经由输入端子接收电源电压，并产生提供给电池的充电电流，从而对电池充电。电源电压也通过转换器提供给输出端。在升压模式下，转换器从电池接收电力并产生输出到输出端的电源电流和电压。同样的单电流检测电阻器用于控制降压模式下的充电电流，并且在升压模式下控制提供给输出端子的恒定电流。不管电池电压的变化和输出电压的变化，输出电流被控制为恒定。

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