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1. 发明授权

US08785976B2 Polarization super-junction low-loss gallium nitride semiconductor device 有权
标题翻译：极化超结低损耗氮化镓半导体器件
公开(公告)号：US08785976B2
公开(公告)日：2014-07-22
申请号：US13639075
申请日：2011-06-21
申请人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil , Yasunobu Sumida , Hiroji Kawai
发明人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil , Yasunobu Sumida , Hiroji Kawai
IPC分类号： H01L29/78 , H01L29/423 , H01L29/06 , H01L29/861 , H01L29/10 , H01L29/40 , H01L29/778 , H01L29/66 , H01L29/20 , H01L29/872
CPC分类号： H01L29/78 , H01L29/0619 , H01L29/1075 , H01L29/2003 , H01L29/402 , H01L29/42316 , H01L29/66219 , H01L29/66462 , H01L29/7786 , H01L29/861 , H01L29/872
摘要： A low-loss GaN-based semiconductor device is provided.The semiconductor device has the InzGa1-zN layer (where 0≦z
摘要翻译：提供了一种低损耗GaN基半导体器件。半导体器件具有InzGa1-zN层（其中0和nlE; z <1），Al x Ga 1-x N层（其中0

2. 发明申请

US20130126942A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130126942A1
公开(公告)日：2013-05-23
申请号：US13639075
申请日：2011-06-21
申请人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil , Yasunobu Sumida , Hiroji Kawai
发明人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil , Yasunobu Sumida , Hiroji Kawai
IPC分类号： H01L29/78
CPC分类号： H01L29/78 , H01L29/0619 , H01L29/1075 , H01L29/2003 , H01L29/402 , H01L29/42316 , H01L29/66219 , H01L29/66462 , H01L29/7786 , H01L29/861 , H01L29/872
摘要： A low-loss GaN-based semiconductor device is provided.The semiconductor device has the InzGa1-zN layer (where 0≦z
摘要翻译：提供了一种低损耗GaN基半导体器件。半导体器件具有InzGa1-zN层（其中0 @ z <1），Al x Ga 1-x N层（其中0

3. 发明授权

US09087889B2 Semiconductor devices with 2DEG and 2DHG 有权
标题翻译：具有2DEG和2DHG的半导体器件
公开(公告)号：US09087889B2
公开(公告)日：2015-07-21
申请号：US13812725
申请日：2011-06-07
申请人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil
发明人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil
IPC分类号： H01L29/778 , H01L27/095 , H01L29/10 , H01L29/423 , H01L29/78 , H01L29/20
CPC分类号： H01L29/7782 , H01L27/095 , H01L29/1029 , H01L29/2003 , H01L29/42316 , H01L29/7786 , H01L29/7787 , H01L29/782 , H01L29/872
摘要： A semiconductor device comprises three semiconductor layers. The semiconductor layers are arranged to form a 2DHG and a 2DEG separated by a polarization layer. The device comprises a plurality of electrodes: first and second electrodes electrically connected to the 2DHG so that current can flow between them via the 2DHG and a third electrode electrically connected to the 2DEG so that when a positive voltage is applied to the third electrode, with respect to at least one of the other electrodes, the 2DEG and the 2DHG will be at least partially depleted.
摘要翻译：半导体器件包括三个半导体层。半导体层被布置成形成由偏振层分离的2DHG和2DEG。该装置包括多个电极：电连接到2DHG的第一和第二电极，使得电流可以经由2DHG在它们之间流动，第三电极与2DEG电连接，使得当正电压施加到第三电极时，相对于至少一个其它电极，2DEG和2DHG将至少部分耗尽。

4. 发明申请

US20130221409A1 SEMICONDUCTOR DEVICES WITH 2DEG AND 2DHG 有权
标题翻译：具有2DEG和2DHG的半导体器件
公开(公告)号：US20130221409A1
公开(公告)日：2013-08-29
申请号：US13812725
申请日：2011-06-07
申请人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil
发明人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil
IPC分类号： H01L29/778
CPC分类号： H01L29/7782 , H01L27/095 , H01L29/1029 , H01L29/2003 , H01L29/42316 , H01L29/7786 , H01L29/7787 , H01L29/782 , H01L29/872
摘要： A semiconductor device comprises three semiconductor layers. The semiconductor layers are arranged to form a 2DHG and a 2DEG separated by a polarization layer. The device comprises a plurality of electrodes: first and second electrodes electrically connected to the 2DHG so that current can flow between them via the 2DHG and a third electrode electrically connected to the 2DEG so that when a positive voltage is applied to the third electrode, with respect to at least one of the other electrodes, the 2DEG and the 2DHG will be at least partially depleted.
摘要翻译：半导体器件包括三个半导体层。半导体层被布置成形成由偏振层分离的2DHG和2DEG。该装置包括多个电极：电连接到2DHG的第一和第二电极，使得电流可以经由2DHG在它们之间流动，第三电极与2DEG电连接，使得当正电压施加到第三电极时，相对于至少一个其它电极，2DEG和2DHG将至少部分耗尽。

5. 发明申请

US20080191238A1 Bipolar Mosfet Devices and Methods For Their Use 有权
标题翻译：双极Mosfet设备及其使用方法
公开(公告)号：US20080191238A1
公开(公告)日：2008-08-14
申请号：US11659812
申请日：2005-08-10
申请人： Sankara Narayanan Ekkanath Madathil , Mark Robert Sweet , Konstantin Vladislavovich Vershinin
发明人： Sankara Narayanan Ekkanath Madathil , Mark Robert Sweet , Konstantin Vladislavovich Vershinin
IPC分类号： H01L29/66 , H01L29/74 , H01L29/749 , H01L29/76
CPC分类号： H01L29/749 , H01L29/7397 , H01L29/7404 , H01L29/742
摘要： According to the invention there is provided a semiconductor device including: at least one cell including a base region of a first conductivity type having disposed therein at least one emitter region of a second conductivity type; a first well region of a second conductivity type; a second well region of a first conductivity type; a drift region of a second conductivity type; a collector region of a first conductivity type; a collector contact; in which each cell is disposed within the first well region and the first well region is disposed within the second well region; the device further including: a first gate in communication with a base region so that a MOSFET channel can be formed between an emitter region and the first well region; and at least one embedded region embedded in the first well region; in which the device is configured such that during operation of the device a depletion region at a junction between the base region and the first well region can extend to a junction between the first well region and the second well region, thereby substantially isolating the potential of the first well region from any increase in the potential of the collector contact so that the device can be turned off without having to form a MOSFET channel between the base region and the second well region, the extension of the depletion junction being achieved through punch-through of at least one transistor having the embedded region as a component thereof.
摘要翻译：根据本发明，提供一种半导体器件，其包括：至少一个电池，包括第一导电类型的基极区域，其中设置有至少一个第二导电类型的发射极区域; 第二导电类型的第一阱区; 第一导电类型的第二阱区; 第二导电类型的漂移区; 第一导电类型的集电极区域; 收集器联系人其中每个单元被布置在所述第一阱区域内，并且所述第一阱区域设置在所述第二阱区域内; 所述器件还包括：与基极区域连通的第一栅极，使得能够在发射极区域和所述第一阱区域之间形成MOSFET沟道; 以及嵌入在所述第一阱区中的至少一个嵌入区域; 其中器件被配置为使得在器件的操作期间，在基极区域和第一阱区域之间的结处的耗尽区域可以延伸到第一阱区域和第二阱区域之间的结点，由此基本上隔离所述第一阱区域从所述集电极接触电位的任何增加开始，使得所述器件可以被关断而不必在所述基极区域和所述第二阱区域之间形成MOSFET沟道，所述耗尽结的延伸通过冲压 - 通过具有嵌入区域的至少一个晶体管作为其组成部分。

6. 发明授权

US07893457B2 Bipolar mosfet devices and methods for their use 有权
标题翻译：双极mosfet设备及其使用方法
公开(公告)号：US07893457B2
公开(公告)日：2011-02-22
申请号：US11659812
申请日：2005-08-10
申请人： Sankara Narayanan Ekkanath Madathil , Mark Robert Sweet , Konstantin Vladislavovich Vershinin
发明人： Sankara Narayanan Ekkanath Madathil , Mark Robert Sweet , Konstantin Vladislavovich Vershinin
IPC分类号： H01L29/745
CPC分类号： H01L29/749 , H01L29/7397 , H01L29/7404 , H01L29/742
摘要： A semiconductor device includes at least one cell including a base region of a first conductivity type having disposed therein at least one emitter region of a second conductivity type, a first well region of a second conductivity type, a second well region of a first conductivity type, a drift region of a second conductivity type, a collector region of a first conductivity type, and a collector contact. Each cell is disposed within the first well region, and the first well region is disposed within the second well region. The device further includes a first gate in communication with a base region so that a MOSFET channel can be formed between an emitter region and the first well region, and at least one embedded region embedded in the first well region. The device is configured such that during operation of the device a depletion region at a junction between the base region and the first well region can extend to a junction between the first well region and the second well region.
摘要翻译：半导体器件包括至少一个电池，其包括第一导电类型的基极区域，其中设置有至少一个第二导电类型的发射极区域，第二导电类型的第一阱区域，第一导电类型的第二阱区域，第二导电类型的漂移区域，第一导电类型的集电极区域和集电极触点。每个单元设置在第一阱区域内，并且第一阱区域设置在第二阱区域内。该器件还包括与基极区域连通的第一栅极，使得可以在发射极区域和第一阱区域之间形成MOSFET沟道，以及嵌入在第一阱区域中的至少一个嵌入区域。器件被配置为使得在器件的操作期间，在基极区域和第一阱区域之间的结处的耗尽区域可以延伸到第一阱区域和第二阱区域之间的结点。

7. 发明授权

US06724043B1 Bipolar MOSFET device 有权
标题翻译：双极MOSFET器件
公开(公告)号：US06724043B1
公开(公告)日：2004-04-20
申请号：US10070513
申请日：2002-08-22
申请人： Sankara Narayanan Ekkanath Madathil
发明人： Sankara Narayanan Ekkanath Madathil
IPC分类号： H01L2976
CPC分类号： H01L29/7455 , H01L29/747 , H01L29/749
摘要： There is disclosed a semiconductor device comprising: at least one cell comprising a base region (32) of a first conductivity type having disposed therein at least one emitter region (36a, 36b) of a second conductivity type; a first well region (22) of a second conductivity type; a second well region (2a) of a first conductivity type; a drift region (24) of a second conductivity type; a collector region (14) of a first conductivity type; a collector contact (16) in which each cell is disposed within the first well region (22) and the first well region (22) is disposed within the second well-region (20); the device further comprising: a first gate (61) disposed over a base region (32) so that a MOSFET channel can be formed between an emitter region (36a, 36b) and the first well region (22); the device further comprising: a second gate disposer over the second well region (20) so that a MOSFET channel can be formed between the first well region (22) and the drift region (24).
摘要翻译：公开了一种半导体器件，其包括：至少一个电池，其包括具有第二导电类型的至少一个发射极区域（36a，36b）的第一导电类型的基极区域（32）第二导电类型的第一阱区（22）; 第一导电类型的第二阱区（2a）; 第二导电类型的漂移区（24）; 第一导电类型的集电极区域（14）; 每个单元设置在第一阱区域（22）内并且第一阱区域（22）设置在第二阱区域（20）内的集电极触点（16）; 该器件还包括：设置在基极区域（32）上方的第一栅极（61），使得可以在发射极区域（36a，36b）和第一阱区域（22）之间形成MOSFET沟道; 所述器件还包括：在所述第二阱区（20）上方的第二栅极处理器，使得可以在所述第一阱区（22）和所述漂移区（24）之间形成MOSFET沟道。

8. 发明申请

US20090159928A1 POWER SEMICONDUCTOR DEVICES 审中-公开
标题翻译：功率半导体器件
公开(公告)号：US20090159928A1
公开(公告)日：2009-06-25
申请号：US12090122
申请日：2006-10-16
申请人： Sankara Narayanan Ekkanath Madathil , David William Green
发明人： Sankara Narayanan Ekkanath Madathil , David William Green
IPC分类号： H01L29/739
CPC分类号： H01L29/7816 , H01L27/0694 , H01L29/7393 , H01L29/7801
摘要： A power semiconductor device including source and drain regions located in a lateral arrangement in a first portion of the device, and at least one current providing cell located in a second portion of the device and spaced apart from the first portion at least by a substrate region of a first conductivity type.
摘要翻译：功率半导体器件包括源极和漏极区域，位于器件的第一部分中的横向布置中，以及位于器件的第二部分中的至少一个电流提供单元，并且至少与衬底区域的第一导电类型。

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