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1. 发明授权

US08785976B2 Polarization super-junction low-loss gallium nitride semiconductor device 有权
标题翻译：极化超结低损耗氮化镓半导体器件
公开(公告)号：US08785976B2
公开(公告)日：2014-07-22
申请号：US13639075
申请日：2011-06-21
申请人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil , Yasunobu Sumida , Hiroji Kawai
发明人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil , Yasunobu Sumida , Hiroji Kawai
IPC分类号： H01L29/78 , H01L29/423 , H01L29/06 , H01L29/861 , H01L29/10 , H01L29/40 , H01L29/778 , H01L29/66 , H01L29/20 , H01L29/872
CPC分类号： H01L29/78 , H01L29/0619 , H01L29/1075 , H01L29/2003 , H01L29/402 , H01L29/42316 , H01L29/66219 , H01L29/66462 , H01L29/7786 , H01L29/861 , H01L29/872
摘要： A low-loss GaN-based semiconductor device is provided.The semiconductor device has the InzGa1-zN layer (where 0≦z
摘要翻译：提供了一种低损耗GaN基半导体器件。半导体器件具有InzGa1-zN层（其中0和nlE; z <1），Al x Ga 1-x N层（其中0

2. 发明申请

US20130126942A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130126942A1
公开(公告)日：2013-05-23
申请号：US13639075
申请日：2011-06-21
申请人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil , Yasunobu Sumida , Hiroji Kawai
发明人： Akira Nakajima , Sankara Narayanan Ekkanath Madathil , Yasunobu Sumida , Hiroji Kawai
IPC分类号： H01L29/78
CPC分类号： H01L29/78 , H01L29/0619 , H01L29/1075 , H01L29/2003 , H01L29/402 , H01L29/42316 , H01L29/66219 , H01L29/66462 , H01L29/7786 , H01L29/861 , H01L29/872
摘要： A low-loss GaN-based semiconductor device is provided.The semiconductor device has the InzGa1-zN layer (where 0≦z
摘要翻译：提供了一种低损耗GaN基半导体器件。半导体器件具有InzGa1-zN层（其中0 @ z <1），Al x Ga 1-x N层（其中0

3. 发明申请

US20120280363A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120280363A1
公开(公告)日：2012-11-08
申请号：US13389385
申请日：2010-08-17
申请人： Yasunobu Sumida , Shoko Hirata , Takayuki Inada , Shuichi Yagi , Hiroji Kawai
发明人： Yasunobu Sumida , Shoko Hirata , Takayuki Inada , Shuichi Yagi , Hiroji Kawai
IPC分类号： H01L21/20 , H01L29/20
CPC分类号： C30B29/406 , C30B25/04 , H01L21/0237 , H01L21/0254 , H01L21/02639 , H01L21/02647 , H01L29/045 , H01L29/2003 , H01L29/66446
摘要： The method for manufacturing a semiconductor device comprises steps of: forming a growth mask with a plurality of openings directly or indirectly upon a substrate that comprises a material differing from GaN-based semiconductor; and growing a plurality of island-like GaN-based semiconductor layers upon the substrate using the growth mask in the (0001) plane orientation in a manner such that the 1-100 direction extends in a direction parallel to the striped openings of the growth mask.
摘要翻译：制造半导体器件的方法包括以下步骤：在包括不同于GaN基半导体的材料的衬底上直接或间接地形成具有多个开口的生长掩模; 以及使用所述生长掩模在（0001）面取向中在所述基板上生长多个岛状GaN基半导体层，使得所述1-100方向在与生长掩模的条纹开口平行的方向上延伸。

4. 再颁专利

USRE38613E1 Method for growing a nitride compound semiconductor 有权
标题翻译：生长氮化物半导体的方法
公开(公告)号：USRE38613E1
公开(公告)日：2004-10-05
申请号：US10174289
申请日：2002-09-18
申请人： Hiroji Kawai , Tsunenori Asatsuma , Fumihiko Nakamura
发明人： Hiroji Kawai , Tsunenori Asatsuma , Fumihiko Nakamura
IPC分类号： H01L2104
CPC分类号： H01L33/325 , C30B25/02 , C30B29/403 , C30B29/406 , H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/02579 , H01L21/0262
摘要： A new and improved method for growing a p-type nitride III-V compound semiconductor is provided which can produce a p-type nitride compound semiconductors having a high carrier concentration, without the need for annealing to activate impurities after growth. In a preferred embodiment, a p-type nitride compound semiconductor, such as p-type GaN, is grown by metal organic chemical vapor deposition methods using a nitrogen source material which does not release hydrogen during release of nitrogen and the semiconductor is grown in an inactive gas. The nitrogen source materials may be selected from nitrogen compounds that contain hydrogen radicals groups and alkyl radicals groups and/or phenyl radicals groups provided that the total amount of hydrogen radicals groups is less than or equal to the sum total of alkyl radicals groups and phenyl radicals groups present in the nitrogen compound used as the nitrogen source material.

5. 发明授权

US06235617B1 Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US06235617B1
公开(公告)日：2001-05-22
申请号：US09588410
申请日：2000-06-06
申请人： Hiroji Kawai
发明人： Hiroji Kawai
IPC分类号： H01L218242
CPC分类号： H01L29/66212 , H01L21/2654 , H01L21/7605 , H01L21/8252 , H01L21/86 , H01L29/475 , H01L29/66863 , H01L29/812 , H01S5/20 , H01S5/2059 , H01S5/2231 , H01S5/32341
摘要： It is intended to provide a semiconductor device and its manufacturing method in which a high-resistance region maintaining a high resistance even under high temperatures can be made in a nitride III-V compound semiconductor layer having an electric conductivity by ion implantation. After a nitride III-V compound semiconductor layer having an electric conductivity is grown, a high resistance region is formed in the nitride III-V compound semiconductor layer by locally implanting boron ions therein. The amount of implanted boron is preferably not less than {fraction (1/30)}, or more preferably not less than {fraction (1/15)}, of the carrier concentration of the nitride III-V compound semiconductor layer. The high-resistance region is used as a device isolating region of an electron moving device or as a current blocking layer of a semiconductor laser.
摘要翻译：旨在提供一种半导体器件及其制造方法，其中即使在高温下仍能保持高电阻的高电阻区域可以通过离子注入在具有导电性的氮化物III-V化合物半导体层中进行。在生长具有导电性的氮化物III-V化合物半导体层之后，通过在其中局部注入硼离子，在氮化物III-V化合物半导体层中形成高电阻区域。注入硼的量优选不小于氮化物III-V化合物半导体层的载流子浓度的{分数（1/30）}，更优选不小于{分数（1/15）}。高电阻区域用作电子移动器件的器件隔离区域或半导体激光器的电流阻挡层。

6. 发明授权

US5753966A Semiconductor device with cleaved surface 失效
标题翻译：具有切割表面的半导体器件
公开(公告)号：US5753966A
公开(公告)日：1998-05-19
申请号：US772066
申请日：1996-12-19
申请人： Etsuo Morita , Hiroji Kawai
发明人： Etsuo Morita , Hiroji Kawai
IPC分类号： H01S5/02 , H01L29/04 , H01L31/036
CPC分类号： H01S5/0201 , H01S5/0202
摘要： A semiconductor light emitting device is prepared by the steps of forming a semiconductor layer 2 having a laminated structure containing at least a first cladding layer 6, a light emitting layer 7, and a second cladding layer 8 on a substrate 1 having {11-20} plane (plane a) as the main plane; and breaking integrally the semiconductor layer 2 and the substrate 1 under a heating condition to form a pair of facets on the above described substrate due to the plane which was cleaved in {1-102} plane (plane r) and at the same time, to form a pair of facets 3 extending along the above described pair of facets of the substrate 1 on the semiconductor layer 2.
摘要翻译：通过以下步骤制备半导体发光器件：具有至少包含第一覆层6，发光层7和第二覆层8的层叠结构的半导体层2，具有{11-20 }面（平面a）为主面; 并且在加热条件下将半导体层2和基板1整体断开，由于在{1-102}面（平面r）中被切割的平面而在上述基板上形成一对面，同时，以形成沿着半导体层2上的衬底1的上述一对面延伸的一对面3。

7. 发明申请

US20050087751A1 Insulating nitride layer and process for its forming, and semiconductor device and process for its production 审中-公开
标题翻译：绝缘氮化物层及其成型工艺，半导体器件及其制造方法
公开(公告)号：US20050087751A1
公开(公告)日：2005-04-28
申请号：US10990116
申请日：2004-11-16
申请人： Fumihiko Nakamura , Hisayoshi Kuramochi , Hiroji Kawai
发明人： Fumihiko Nakamura , Hisayoshi Kuramochi , Hiroji Kawai
IPC分类号： H01L29/73 , H01L21/00 , H01L21/20 , H01L21/205 , H01L21/318 , H01L21/331 , H01L21/335 , H01L21/338 , H01L21/762 , H01L27/095 , H01L29/20 , H01L29/207 , H01L29/22 , H01L29/778 , H01L29/812 , H01L31/02 , H01L31/0304 , H01L33/02 , H01L33/08 , H01L33/14 , H01L33/30 , H01L33/32 , H01S5/026 , H01L33/00
CPC分类号： H01L29/7787 , H01L21/02378 , H01L21/0242 , H01L21/02458 , H01L21/02502 , H01L21/02505 , H01L21/0254 , H01L21/02581 , H01L21/0262 , H01L29/2003 , H01L29/66462 , H01L33/02 , H01L33/145 , H01L33/305
摘要： Disclosed herein is an insulating nitride layer suitable for group III-V nitride semiconductor devices. It has a high resistance and good insulating properties and hence it electrically isolates elements, without the active layer decreasing in conductivity. Disclosed also herein is a process for forming said nitride layer and a semiconductor device having said nitride layer for improved characteristic properties. The semiconductor device is an AlGaN/GaN HEMT or the like which has a GaN active layer and an insulating nitride layer formed thereon from a group III-V nitride compound semiconductor heavily doped mostly with a group IIB element (particularly Zn) in an amount not less than 1×1017/cm3.
摘要翻译：本文公开了适用于III-V族氮化物半导体器件的绝缘氮化物层。它具有高电阻和良好的绝缘性能，因此电气隔离元件，而电导率不会降低活性层。此处还公开了用于形成所述氮化物层的方法和具有用于改善特性的所述氮化物层的半导体器件。半导体器件是AlGaN / GaN HEMT等，其具有由主要以IIB族元素（特别是Zn）重量掺杂的III-V族氮化物化合物半导体形成的GaN有源层和绝缘氮化物层，小于1×10 17 / cm 3。

8. 发明授权

US06426264B1 Method of manufacturing a semiconductor laminated substrate, semiconductor crystal substrate and semiconductor device 失效
标题翻译：制造半导体层叠基板，半导体晶体基板和半导体器件的方法
公开(公告)号：US06426264B1
公开(公告)日：2002-07-30
申请号：US09482905
申请日：2000-01-14
申请人： Hiroji Kawai
发明人： Hiroji Kawai
IPC分类号： H01L21331
CPC分类号： H01L21/0237 , H01L21/02505 , H01L21/0254 , H01L21/02576 , H01L21/0262 , H01L21/02642 , H01L21/0265 , H01L29/2003 , H01L29/205 , H01L29/66462 , H01L33/007 , H01L33/0079 , H01L33/20 , H01S5/0207 , H01S5/0213 , H01S5/32341
摘要： A semiconductor crystal layer composed of GaN is grown on a base substrate composed of sapphire sandwiching a separating layer composed of AlN and a buffer layer composed of GaN. The separating layers and the buffer layers are distributed in the form of lines, and a flow-through hole for an etchant is formed in the side of these layers sandwiching an anti-growing film composed of SiO2. Thus, the etchant flows through the flow-through hole, the anti-growing film and the separating layer are etched, and the base substrate is easily isolated.
摘要翻译：在由AlN构成的分离层和由GaN构成的缓冲层的蓝宝石构成的基板上生长由GaN构成的半导体晶体层。分离层和缓冲层以管线的形式分布，并且在夹在由SiO 2组成的抗生长膜的这些层的侧面上形成用于蚀刻剂的流通孔。因此，蚀刻剂流过流通孔，抗生长膜和分离层被蚀刻，并且基底衬底容易隔离。

9. 发明授权

US06281032B1 Manufacturing method for nitride III-V compound semiconductor device using bonding 有权
标题翻译：使用接合的氮化物III-V化合物半导体器件的制造方法
公开(公告)号：US06281032B1
公开(公告)日：2001-08-28
申请号：US09291016
申请日：1999-04-14
申请人： Osamu Matsuda , Toshimasa Kobayashi , Norikazu Nakayama , Hiroji Kawai
发明人： Osamu Matsuda , Toshimasa Kobayashi , Norikazu Nakayama , Hiroji Kawai
IPC分类号： H01L2100
CPC分类号： H01S5/34333 , B82Y20/00 , H01L21/187 , H01L21/2007 , H01L21/8252 , H01L33/0079 , H01L2221/68363 , H01L2224/48091 , H01L2224/48465 , H01S5/0202 , H01S5/021 , H01S5/0213 , H01S5/0215 , H01S5/0217 , H01S5/02212 , H01S5/0264 , H01L2924/00014 , H01L2924/00
摘要： In a semiconductor device manufacturing method capable of manufacturing semiconductor lasers, light emitting diodes or electron transport devices using nitride III-V compound semiconductors with a high productivity, a GaN semiconductor laser wafer is prepared in which a plurality of semiconductor lasers are formed on an AlGaInN semiconductor layer on a c-face sapphire substrate and separated from each other by grooves deep enough to reach the c-face sapphire substrate, and a p-side electrode and an n-side electrode are formed in each semiconductor laser. The GaN semiconductor laser wafer is bonded to a photo-diode built-in Si wafer having formed a photo diode for monitoring light outputs and solder electrodes in each pellet by positioning the p-side electrode and the n-side electrode in alignment with the solder electrodes, respectively. After that, by lapping the c-face sapphire substrate from its bottom surface deep enough to reach the grooves or by dicing the c-face sapphire substrate from its bottom surface, the semiconductor lasers on the photo-diode built-in Si wafer are separated from each other. After that, the photo-diode built-in Si wafer is divided by dicing into discrete pellets. A GaN semiconductor laser chip, thus obtained, is assembled on a package.
摘要翻译：在能够以高生产率制造半导体激光器，发光二极管或使用氮化物III-V化合物半导体的电子传输装置的半导体器件制造方法中，制备GaN半导体激光晶片，其中在AlGaInN上形成多个半导体激光器半导体层，并且通过深度足以到达c面蓝宝石衬底的沟槽彼此分离，并且在每个半导体激光器中形成p侧电极和n侧电极。将GaN半导体激光晶片通过将p侧电极和n侧电极定位在与焊料对准的状态下，与形成有二极管的光电二极管内置Si晶片接合，该光电二极管用于监测各个芯片中的光输出和焊料电极电极。之后，通过将C面蓝宝石衬底从其底部表面深度研磨到达凹槽或通过从其底部表面切割c面蓝宝石衬底，将二极管内置硅晶片上的半导体激光器分离从彼此。之后，光电二极管内置硅晶片通过切割分割成分散的颗粒。由此获得的GaN半导体激光芯片组装在封装上。

10. 发明授权

US06239033B1 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US06239033B1
公开(公告)日：2001-05-29
申请号：US09316044
申请日：1999-05-21
申请人： Hiroji Kawai
发明人： Hiroji Kawai
IPC分类号： H01L21304
CPC分类号： H01L29/66522 , B82Y20/00 , H01L21/0332 , H01L21/304 , H01L21/30612 , H01L21/76898 , H01L29/812 , H01L33/0079 , H01S5/0207 , H01S5/0213 , H01S5/0217 , H01S5/0425 , H01S5/34333 , H01S2301/173 , H01S2304/04 , Y10S438/94
摘要： After making a GaN FET by growing GaN semiconductor layers on the surface of a sapphire substrate, the bottom surface of the sapphire substrate is processed by lapping, using an abrasive liquid containing a diamond granular abrasive material and reducing the grain size of the abrasive material in some steps, to reduce the thickness of the sapphire substrate to 100 &mgr;m or less. Thereafter, the bottom surface of the sapphire substrate is processed by etching using an etchant of phosphoric acid or phosphoric acid/sulfuric acid mixed liquid to remove a strained layer by lapping. Then, after making a via hole by etching the bottom surface of the sapphire substrate by using a similar etchant, the GaN semiconductor layer at the bottom of the via hole is removed by RIE to expose a Au pad electrically connected to the source of GaN FET. Thereafter, a thick Au film electrically connected to the Au pad is made through the via hole. The via hole may be made by irradiation of a pulse laser beam from a CO2 laser and subsequent etching.
摘要翻译：在通过在蓝宝石衬底的表面上生长GaN半导体层制造GaN FET之后，通过使用含有金刚石颗粒磨料的研磨液研磨蓝宝石衬底的底表面，并将研磨材料的晶粒尺寸减小一些步骤，将蓝宝石基板的厚度减小到100um以下。此后，通过使用磷酸或磷酸/硫酸混合液的蚀刻剂进行蚀刻来处理蓝宝石衬底的底表面，以通过研磨去除应变层。然后，通过使用类似的蚀刻剂蚀刻蓝宝石衬底的底表面来制造通孔之后，通过RIE去除通孔底部的GaN半导体层，以暴露电连接到GaN FET源极的Au焊盘。此后，通过通孔形成与Au焊盘电连接的厚Au膜。通孔可以通过来自CO 2激光器的脉冲激光束的照射和随后的蚀刻来制成。

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