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    • 7. 发明申请
    • ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
    • 阵列基板及其制造方法
    • US20170077201A1
    • 2017-03-16
    • US15122172
    • 2015-09-25
    • BOE Technology Group Co., Ltd.
    • Jiangbo ChenJun ChengChunsheng JiangXiaodi LiuXiangyong Kong
    • H01L27/32H01L51/56
    • H01L27/3262H01L21/77H01L27/1288H01L51/56H01L2227/323
    • Embodiments of the invention provide an array substrate and a method of manufacturing the same. The method comprises: forming a gate electrode pattern, a gate insulation layer, an active layer pattern and an etching stopping layer on a substrate; forming a photoresist layer on the etching stopping layer; performing a single patterning process on the photoresist layer, such that photoresist in the first region is partially etched off, photoresist in the second region is completely etched off, and photoresist in the third region is completely remained; and performing a single etching process, such that residual photoresist in the first region and a portion of the etching stopping layer in the first region are etched off, and at the same time, a portion of the etching stopping layer and a portion of the gate insulation layer in the second region are etched off.
    • 本发明的实施例提供阵列基板及其制造方法。 该方法包括:在衬底上形成栅极电极图案,栅极绝缘层,有源层图案和蚀刻停止层; 在所述蚀刻停止层上形成光致抗蚀剂层; 在光致抗蚀剂层上执行单一的图案化工艺,使得第一区域中的光致抗蚀剂被部分蚀刻掉,第二区域中的光致抗蚀剂被完全蚀刻掉,并且第三区域中的光致抗蚀剂被完全残留; 并进行单蚀刻处理,使得第一区域中的残留光致抗蚀剂和第一区域中的蚀刻停止层的一部分被蚀刻掉,同时蚀刻停止层的一部分和栅极的一部分 第二区域中的绝缘层被蚀刻掉。