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1. 发明授权

US08656109B2 Systems and methods for background destaging storage tracks 失效
标题翻译：后台存储轨道的系统和方法
公开(公告)号：US08656109B2
公开(公告)日：2014-02-18
申请号：US12965141
申请日：2010-12-10
申请人： Brent C. Beardsley , Michael T. Benhase , Binny S. Gill , Lokesh M. Gupta , Sonny E. Williams
发明人： Brent C. Beardsley , Michael T. Benhase , Binny S. Gill , Lokesh M. Gupta , Sonny E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0891 , G06F12/0804 , G06F12/0831 , G06F12/0848 , G06F12/0866 , G06F12/0868 , G06F12/12 , G06F12/128 , G06F2212/1041 , G06F2212/282 , G06F2212/313 , G06F2212/314 , G06F2212/604 , G06F2212/621
摘要： A system includes a write cache configured to store a plurality of storage tracks and configured to be coupled to one or more hosts, and a processor coupled to the write cache. The processor includes code that, when executed by the processor, causes the processor to perform the method below. One method includes monitoring the write cache for write operations from the host(s) and determining if the host(s) is/are idle based on monitoring the write cache for write operations from the host(s). The storage tracks are destaged from the write cache if the host(s) is/are idle and are not destaged from the write cache if one or more of the hosts is/are not idle. Also provided are physical computer storage mediums including a computer program product for performing the above method.
摘要翻译：一种系统包括配置成存储多个存储轨道并被配置为耦合到一个或多个主机的写入高速缓存以及耦合到写入高速缓存的处理器。处理器包括当由处理器执行时使处理器执行下面的方法的代码。一种方法包括：监控来自主机的写入高速缓存，以及基于监视来自主机的写入操作的写入高速缓存来确定主机是否是空闲的。如果主机是空闲的并且如果一个或多个主机不空闲，则不会从写高速缓存中将存储轨道从写高速缓存中移出。还提供了包括用于执行上述方法的计算机程序产品的物理计算机存储介质。

2. 发明授权

US08661201B2 Systems and methods for managing destage conflicts 有权
标题翻译：管理流离失所冲突的制度和方法
公开(公告)号：US08661201B2
公开(公告)日：2014-02-25
申请号：US12965133
申请日：2010-12-10
申请人： Brent C. Beardsley , Michael T. Benhase , Binny S. Gill , Lokesh M. Gupta , Sonny E. Williams
发明人： Brent C. Beardsley , Michael T. Benhase , Binny S. Gill , Lokesh M. Gupta , Sonny E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0891 , G06F12/023 , G06F12/0804 , G06F12/0866
摘要： A system includes a cache partitioned into multiple ranks configured to store multiple storage tracks and a processor coupled to the cache. The processor is configured to perform the following method. One method includes allocating an amount of storage space in the cache to each rank and monitoring a current amount of storage space used by each rank with respect to the amount of storage space allocated to each respective rank. The method further includes destaging storage tracks from each rank until the current amount of storage space used by each respective rank is equal to a predetermined minimum amount of storage space with respect to the amount of storage space allocated to each rank. Also provided are physical computer storage mediums including code that, when executed by a processor, cause the processor to perform the above method.
摘要翻译：系统包括被分配成多个级别的缓存，其被配置为存储多个存储轨道，以及耦合到高速缓存的处理器。处理器配置为执行以下方法。一种方法包括将高速缓存中的存储空间量分配给每个等级，并且针对分配给每个相应等级的存储空间量来监视每个等级使用的当前存储空间量。该方法还包括对每个等级的存储轨道进行降级，直到每个相应等级使用的当前存储空间量相对于分配给每个等级的存储空间量等于预定的最小存储空间量。还提供了物理计算机存储介质，其包括当由处理器执行时使处理器执行上述方法的代码。

3. 发明授权

US08595433B2 Systems and methods for managing destage conflicts 失效
标题翻译：管理流离失所冲突的制度和方法
公开(公告)号：US08595433B2
公开(公告)日：2013-11-26
申请号：US13493794
申请日：2012-06-11
申请人： Brent C. Beardsley , Michael T. Benhase , Binny S. Gill , Lokesh M. Gupta , Sonny E. Williams
发明人： Brent C. Beardsley , Michael T. Benhase , Binny S. Gill , Lokesh M. Gupta , Sonny E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0891 , G06F12/023 , G06F12/0804 , G06F12/0866
摘要： A system includes a cache partitioned into multiple ranks configured to store multiple storage tracks and a processor coupled to the cache. The processor is configured to perform the following method. One method includes allocating an amount of storage space in the cache to each rank and monitoring a current amount of storage space used by each rank with respect to the amount of storage space allocated to each respective rank. The method further includes destaging storage tracks from each rank until the current amount of storage space used by each respective rank is equal to a predetermined minimum amount of storage space with respect to the amount of storage space allocated to each rank.
摘要翻译：系统包括被分配成多个级别的缓存，其被配置为存储多个存储轨道，以及耦合到高速缓存的处理器。处理器配置为执行以下方法。一种方法包括将高速缓存中的存储空间量分配给每个等级，并且针对分配给每个相应等级的存储空间量来监视每个等级使用的当前存储空间量。该方法还包括对每个等级的存储轨道进行降级，直到每个相应等级使用的当前存储空间量相对于分配给每个等级的存储空间量等于预定的最小存储空间量。

4. 发明授权

US08589624B2 Systems and methods for background destaging storage tracks 失效
标题翻译：后台存储轨道的系统和方法
公开(公告)号：US08589624B2
公开(公告)日：2013-11-19
申请号：US13493799
申请日：2012-06-11
申请人： Brent C. Beardsley , Michael T. Benhase , Binny S. Gill , Lokesh M. Gupta , Sonny E. Williams
发明人： Brent C. Beardsley , Michael T. Benhase , Binny S. Gill , Lokesh M. Gupta , Sonny E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0891 , G06F12/0804 , G06F12/0831 , G06F12/0848 , G06F12/0866 , G06F12/0868 , G06F12/12 , G06F12/128 , G06F2212/1041 , G06F2212/282 , G06F2212/313 , G06F2212/314 , G06F2212/604 , G06F2212/621
摘要： A system includes a write cache configured to store a plurality of storage tracks and configured to be coupled to one or more hosts, and a processor coupled to the write cache. The processor includes code that, when executed by the processor, causes the processor to perform the method below. One method includes monitoring the write cache for write operations from the host(s) and determining if the host(s) is/are idle based on monitoring the write cache for write operations from the host(s). The storage tracks are destaged from the write cache if the host(s) is/are idle and are not destaged from the write cache if one or more of the hosts is/are not idle.
摘要翻译：一种系统包括配置成存储多个存储轨道并被配置为耦合到一个或多个主机的写入高速缓存以及耦合到写入高速缓存的处理器。处理器包括当由处理器执行时使处理器执行下面的方法的代码。一种方法包括：监控来自主机的写入高速缓存，以及基于监视来自主机的写入操作的写入高速缓存来确定主机是否是空闲的。如果主机是空闲的并且如果一个或多个主机不空闲，则不会从写高速缓存中将存储轨道从写高速缓存中移出。

5. 发明授权

US08443141B2 Intelligent write caching for sequential tracks 有权
标题翻译：用于顺序轨道的智能写缓存
公开(公告)号：US08443141B2
公开(公告)日：2013-05-14
申请号：US12894017
申请日：2010-09-29
申请人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Joseph S. Hyde, II , Sonny E. Williams
发明人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Joseph S. Hyde, II , Sonny E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/126 , G06F12/0804 , G06F12/0868
摘要： Write caching for sequential tracks is performed by a processor device in a computing storage environment for destaging data from nonvolatile storage (NVS) to a storage unit. If a first track is determined to be sequential, and an earlier track is also determined to be sequential, a temporal bit associated with the earlier track is cleared to allow for destage of data of the earlier track. If a temporal bit for one of a plurality of additional tracks in one of a plurality of strides in a modified cache is determined to be not set, a stride associated with the one of the plurality of additional tracks is selected for a destage operation. If the NVS exceeds a predetermined storage threshold, a predetermined one of the plurality of strides is selected for the destage operation.
摘要翻译：用于顺序轨道的写缓存由用于将数据从非易失性存储（NVS）降级到存储单元的计算存储环境中的处理器设备执行。如果确定第一轨道是顺序的，并且较早的轨道也被确定为顺序的，则与较早轨道相关联的时间位被清除以允许对先前轨道的数据进行排水。如果确定修改的高速缓存中的多个步幅之一中的多个附加轨道之一的时间位未被设置，则选择与所述多个附加轨道中的一个相关联的步幅用于码头操作。如果NVS超过预定的存储阈值，则选择多个步骤中的预定的一个步骤用于排水操作。

6. 发明授权

US08589623B2 Systems and methods for managing cache destage scan times 失效
标题翻译：用于管理缓存目的地扫描时间的系统和方法
公开(公告)号：US08589623B2
公开(公告)日：2013-11-19
申请号：US13493786
申请日：2012-06-11
申请人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Sonny E. Williams
发明人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Sonny E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0804 , G06F12/0859 , G06F12/0866
摘要： A system includes a cache and a processor. The processor is configured to utilize a first thread to continually determine a desired scan time for scanning the plurality of storage tracks in the cache and utilize a second thread to continually control an actual scan time of the plurality of storage tracks in the cache based on the continually determined desired scan time. One method includes utilizing a first thread to continually determine a desired scan time for scanning the plurality of storage tracks in the cache and utilizing a second thread to continually control an actual scan time of the plurality of storage tracks in the cache based on the continually determined desired scan time.
摘要翻译：系统包括缓存和处理器。处理器被配置为利用第一线程来连续地确定用于扫描高速缓存中的多个存储轨道的期望的扫描时间，并且利用第二线程基于所述缓存器来连续地控制多个存储轨道的实际扫描时间持续确定所需的扫描时间。一种方法包括利用第一线程来连续地确定用于扫描高速缓存中的多个存储轨道的期望的扫描时间，并且利用第二线程基于连续地确定的高速缓存中的多个存储轨道的实际扫描时间所需的扫描时间。

7. 发明授权

US08566518B2 Intelligent write caching for sequential tracks 失效
公开(公告)号：US08566518B2
公开(公告)日：2013-10-22
申请号：US13478189
申请日：2012-05-23
申请人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Joseph S. Hyde, II , Sonny E. Williams
发明人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Joseph S. Hyde, II , Sonny E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/126 , G06F12/0804 , G06F12/0868
摘要： Write caching for sequential tracks is performed by a processor device in a computing storage environment for destaging data from nonvolatile storage (NVS) to a storage unit. If a first track is determined to be sequential, and an earlier track is also determined to be sequential, a temporal bit associated with the earlier track is cleared to allow for destage of data of the earlier track. If a temporal bit for one of a plurality of additional tracks in one of a plurality of strides in a modified cache is determined to be not set, a stride associated with the one of the plurality of additional tracks is selected for a destage operation. If the NVS exceeds a predetermined storage threshold, a predetermined one of the plurality of strides is selected for the destage operation.

8. 发明授权

US08332589B2 Management of write cache using stride objects 有权
标题翻译：使用stride对象管理写缓存
公开(公告)号：US08332589B2
公开(公告)日：2012-12-11
申请号：US12894019
申请日：2010-09-29
申请人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Joseph S. Hyde, II , Sonny E. Williams
发明人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Joseph S. Hyde, II , Sonny E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0804 , G06F12/0866
摘要： Method, system, and computer program product embodiments for, in a computing storage environment for destaging data from nonvolatile storage (NVS) to a storage unit, identifying working data on a stride basis by a processor device are provided. A multi-update bit is established for each stride in a modified cache. The multi-update bit is adapted to indicate at least one track in a working set. A schedule of destage scans is configured based on a plurality of levels of urgency. A destage operation is performed based on at least one of a number of strides examined by the destage scans, whether the multi-update bit is set, and whether an emergency level of the plurality of levels of urgency is active.
摘要翻译：提供了一种用于在将数据从非易失性存储（NVS）降级到存储单元的计算存储环境中的方法，系统和计算机程序产品实施例，由处理器设备基于步长识别工作数据。为修改的高速缓存中的每个步幅建立多更新位。多更新位适于指示工作组中的至少一个轨道。基于多个级别的紧急度配置了目的地扫描的时间表。基于通过流水扫描检查的多个步骤中的至少一个，是否设置了多更新位，以及多个紧急级别的紧急级别是否活动来执行转移操作。

9. 发明授权

US08549220B2 Management of write cache using stride objects 失效
标题翻译：使用stride对象管理写缓存
公开(公告)号：US08549220B2
公开(公告)日：2013-10-01
申请号：US13616029
申请日：2012-09-14
申请人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Joseph S. Hyde, II , Sonny E. Williams
发明人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Joseph S. Hyde, II , Sonny E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0804 , G06F12/0866
摘要： Method, system, and computer program product embodiments for, in a computing storage environment for destaging data from nonvolatile storage (NVS) to a storage unit, identifying working data on a stride basis by a processor device are provided. A multi-update bit is established for each of a plurality of strides in a modified cache, wherein the multi-update bit is adapted to indicate a corresponding stride is part of at least one track in a working set that refers to a group of frequently updated tracks. The plurality of strides are scanned based on a schedule to identify tracks for destaging. An operation to destage is performed on a selected track identified during the scanning, if the multi-update bit of a selected stride on the selected track is set to indicate the selected track is part of the working set and if the NVS is about 90% full or greater.
摘要翻译：提供了一种用于在将数据从非易失性存储（NVS）降级到存储单元的计算存储环境中的方法，系统和计算机程序产品实施例，由处理器设备基于步长识别工作数据。针对经修改的高速缓存中的多个步幅中的每一个建立多更新位，其中，所述多更新位适于指示相应步幅是工作集中的至少一个轨道的一部分，所述至少一个轨迹是指频繁地组更新的曲目。基于用于识别用于降落的轨迹的时间表扫描多个步幅。如果在所选择的轨道上选择的步幅的多更新位被设置为指示所选择的轨迹是工作组的一部分，并且如果NVS为大约90％满或更大

10. 发明授权

US08661202B2 Systems and methods for destaging storage tracks from cache 有权
标题翻译：从缓存中降级存储轨道的系统和方法
公开(公告)号：US08661202B2
公开(公告)日：2014-02-25
申请号：US12965174
申请日：2010-12-10
申请人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Sonny E. Williams
发明人： Brent C. Beardsley , Michael T. Benhase , Lokesh M. Gupta , Sonny E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0891 , G06F12/0804
摘要： A system includes a cache and a processor coupled to the cache. The cache stores data in multiple storage tracks and each storage track includes an associated multi-bit counter. The processor is configured to perform the following method. One method includes writing data to the plurality of storage tracks and incrementing the multi-bit counter on each respective storage track a predetermined amount each time the processor writes to a respective storage track. The method further includes scan each of the storage tracks in each of multiple scan cycles, decrementing each multi-bit counter each scan cycle, and destaging each storage track including a zero count. Also provided are physical computer storage mediums including a computer program product for performing the above method.
摘要翻译：系统包括高速缓存和耦合到高速缓存的处理器。高速缓存将数据存储在多个存储轨道中，并且每个存储轨道包括相关联的多位计数器。处理器配置为执行以下方法。一种方法包括：在每次处理器向相应的存储轨道写入时，将数据写入多个存储轨道，并将每个相应存储轨道上的多位计数器递增预定量。该方法还包括在多个扫描周期中的每一个扫描每个存储轨道，递减每个多位计数器每个扫描周期，以及降级包括零计数的每个存储轨道。还提供了包括用于执行上述方法的计算机程序产品的物理计算机存储介质。

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