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1. 发明授权

US07940068B2 Test board 有权
标题翻译：测试板
公开(公告)号：US07940068B2
公开(公告)日：2011-05-10
申请号：US12505545
申请日：2009-07-20
申请人： Chih-Jen Chin , Chun-Hao Chu , Ting-Hong Wang , Sheng-Yuan Tsai
发明人： Chih-Jen Chin , Chun-Hao Chu , Ting-Hong Wang , Sheng-Yuan Tsai
IPC分类号： G01R31/20
CPC分类号： G01R31/026
摘要： A test board is provided. The test board includes a power connecting interface, diode modules, a power module a detecting module, and a processor. The power connecting interface includes power pins, wherein each of the power pins is electrically connected to a motherboard power socket to receive a power signal. Each of the diode modules is electrically connected to one of the power pins and includes at least one diode. The power module is electrically connected to the diode modules to receive the power signal through each of the diode modules. The detection module is electrically connected to points between the diode modules and the power connecting interface to generate a detection result according to the voltage between each diode module and the power connecting interface. The processor is used to determine the connecting state between the power pin and the corresponding motherboard power socket according to the detection result.
摘要翻译：提供测试板。测试板包括电源连接接口，二极管模块，电源模块，检测模块和处理器。电源连接接口包括电源引脚，其中每个电源引脚电连接到母板电源插座以接收电源信号。每个二极管模块电连接到一个电源引脚并且包括至少一个二极管。电源模块电连接到二极管模块以通过每个二极管模块接收电力信号。检测模块电连接到二极管模块和电源连接接口之间的点，以根据每个二极管模块和电源连接接口之间的电压产生检测结果。处理器用于根据检测结果确定电源引脚和相应的主板电源插座之间的连接状态。

2. 发明申请

US20100049903A1 RECORDING SYSTEM AND DATA RECORDING METHOD 审中-公开
标题翻译：记录系统和数据记录方法
公开(公告)号：US20100049903A1
公开(公告)日：2010-02-25
申请号：US12258832
申请日：2008-10-27
申请人： Chih-Jen Chin , Sheng-Yuan Tsai
发明人： Chih-Jen Chin , Sheng-Yuan Tsai
IPC分类号： G06F12/02
CPC分类号： G11C16/102
摘要： A recording method for writing data into an electrically erasable programmable read-only memory is disclosed, in which the memory has already been electrically connected to a controller through a logic device. The method sets the logic devices for the first time to disconnect the memory from the controller, and set the logic devices for the second time to write setting data required by the controller into the memory. After that, the method reads out the setting data stored in the memory to confirm the writing of the setting data, and connects the memory to the controller again.
摘要翻译：公开了一种将数据写入电可擦除可编程只读存储器的记录方法，其中存储器已经通过逻辑器件电连接到控制器。该方法首次将逻辑设备设置为断开存储器与控制器的连接，并将逻辑设备第二次设置为将控制器所需的设置数据写入存储器。之后，该方法读出存储在存储器中的设置数据，以确认设置数据的写入，并再次将存储器连接到控制器。

3. 发明申请

US20090189637A1 Machine for programming on-board chipsets 审中-公开
标题翻译：用于编程板载芯片的机器
公开(公告)号：US20090189637A1
公开(公告)日：2009-07-30
申请号：US12010725
申请日：2008-01-29
申请人： Chih-Jen Chin , Sheng-Yuan Tsai
发明人： Chih-Jen Chin , Sheng-Yuan Tsai
IPC分类号： H03K19/173
CPC分类号： G11C16/102
摘要： The present invention discloses a machine for programming on-board chipsets, wherein the on-board chipsets means that some chipsets are mounted on a circuit board, and the circuit board has a plurality of input pads electrically connected to each chipset individually. The machine comprises a platform, a number of programming modules and an IC programming burner in which the platform faces a surface of the circuit board having the input pads, the programming modules disposed movably on the platform separately extends a number of output pins outwardly so that for connecting electrically an input pad as contacting the input pad, and the IC programming burner electrically connected to each of the programming modules separately distributes a set of programming codes into each programming module when the output pins electrically connect to the input pads.
摘要翻译：本发明公开了一种用于对板上芯片组进行编程的机器，其中板载芯片组意味着一些芯片组安装在电路板上，并且电路板具有分别与每个芯片组电连接的多个输入焊盘。该机器包括平台，多个编程模块和IC编程燃烧器，其中平台面向具有输入焊盘的电路板的表面，可移动地设置在平台上的编程模块分别向外延伸多个输出销，使得用于在接触输入焊盘时电连接输入焊盘，并且当连接到每个编程模块的IC编程器将输出引脚电连接到输入焊盘时，将一组编程代码单独地分配到每个编程模块中。

4. 发明申请

US20080172578A1 Detection device capable of detecting main-board and method therefor 审中-公开
标题翻译：能够检测主板的检测装置及其方法
公开(公告)号：US20080172578A1
公开(公告)日：2008-07-17
申请号：US11652129
申请日：2007-01-11
申请人： Sheng-Yuan Tsai
发明人： Sheng-Yuan Tsai
IPC分类号： G06F11/22
CPC分类号： G06F11/2284
摘要： A detection device and a method therefor are provided. The detection device is used to activate the main-board, when the power-on interval of the main-board is equal to the predetermined power-on interval. The detection device compares the value of the status signal transmitted with the predetermined status value. In case that the two values are not equal, the detection device generates and displays a first error message; otherwise, in case that the two values are equal, then the detection device powers-off the main-board, and upon determining that the voltage after its power-off is not equal to zero voltage, the detection device generates and displays a second error message; and upon determining that the accumulated detection number is not equal to the predetermined detection number, the detection device will reactivate the main-board and repeats the above steps, after the power-off interval of the main-board has reached to the predetermined power-off interval.
摘要翻译：提供一种检测装置及其方法。当主板的上电间隔等于预定的开机间隔时，检测装置用于激活主板。检测装置将发送的状态信号的值与预定状态值进行比较。在两个值不相等的情况下，检测装置生成并显示第一错误消息; 否则，在两个值相等的情况下，检测装置关闭主板，并且在确定其断电后的电压不等于零电压时，检测装置产生并显示第二个错误信息; 并且在确定所述累积检测次数不等于所述预定检测次数时，所述检测装置将在所述主板的断电间隔达到所述预定的功率开关之后重新激活所述主板并重复上述步骤，关闭间隔。

5. 发明授权

US07586354B1 Clock pin setting and clock driving circuit 失效
标题翻译：时钟引脚设置和时钟驱动电路
公开(公告)号：US07586354B1
公开(公告)日：2009-09-08
申请号：US12276871
申请日：2008-11-24
申请人： Sheng-Yuan Tsai
发明人： Sheng-Yuan Tsai
IPC分类号： G06F1/04
CPC分类号： G06F1/04
摘要： A pin setting circuit and a clock driving circuit are disclosed. The clock pin setting circuit sets the clock pin of the clock driving circuit. The pin setting circuit includes the double one-shot circuit and the switch circuit. The double one-shot circuit includes the first one-shot circuit and the second one-shot circuit. The first one-shot circuit receives a clock signal and generates a first control signal according to the frequency of the clock signal. The second circuit outputs a second control signal according to the first control signal generated. The switch circuit sets the clock pin to the power end or the ground end according to the second control signal.
摘要翻译：公开了引脚设置电路和时钟驱动电路。时钟引脚设置电路设置时钟驱动电路的时钟引脚。引脚设置电路包括双单触发电路和开关电路。双重单触发电路包括第一单触发电路和第二单触发电路。第一单向电路接收时钟信号，并根据时钟信号的频率产生第一控制信号。第二电路根据所生成的第一控制信号输出第二控制信号。开关电路根据第二控制信号将时钟引脚设置到电源端或接地端。

6. 发明申请

US20090189298A1 Bonding pad structure and debug method thereof 审中-公开
标题翻译：焊接结构及其调试方法
公开(公告)号：US20090189298A1
公开(公告)日：2009-07-30
申请号：US12010571
申请日：2008-01-28
申请人： Fu-Chung Wu , Sheng-Yuan Tsai
发明人： Fu-Chung Wu , Sheng-Yuan Tsai
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H05K1/0293 , H01L2224/13028 , H05K2201/0305 , H05K2203/173
摘要： The bonding pad structure includes a main bonding pad and a blank path. The blank path crosses through the main bonding pad for dividing the main bonding pad into a first sub-bonding pad and a second sub-bonding pad. The bonding pad structure may further include a solder covered on the blank path and the main bonding pad selectively. The main bonding pad is regarded as a closed circuit when the solder is covered on the blank path and the main bonding pad. The main bonding pad is regarded as a open circuit when the solder is not covered on the blank path and the main bonding pad. A debug method with the bonding pad structure is also disclosed.
摘要翻译：焊盘结构包括主焊盘和坯料路径。空白路径穿过主焊盘，用于将主焊盘分成第一子接合焊盘和第二子焊盘。接合焊盘结构还可以包括覆盖在坯料路径上的焊料和主焊盘。当焊料覆盖在坯料路径和主焊盘上时，主焊盘被认为是闭合电路。当焊料未被覆盖在坯料路径和主焊盘上时，主焊盘被认为是开路。还公开了具有焊盘结构的调试方法。

7. 发明授权

US07459903B1 Multi-level voltage detection circuit 失效
标题翻译：多电平电压检测电路
公开(公告)号：US07459903B1
公开(公告)日：2008-12-02
申请号：US11984947
申请日：2007-11-26
申请人： Sheng-Yuan Tsai , Ding-Houng Wang
发明人： Sheng-Yuan Tsai , Ding-Houng Wang
IPC分类号： G01R31/28
CPC分类号： G01R19/16538 , G01R19/16595
摘要： A multi-level voltage detection circuit includes the comparators, the first resistors, the power signal input port and the or-gate. The first resistors and the power signal input port are electrically connected to the comparators. The or-gate is electrically connected to the outputs of the comparators. The or-gate outputs the power good signal according to the comparing result of the comparators.
摘要翻译：多电平电压检测电路包括比较器，第一电阻器，功率信号输入端口和或门。第一个电阻和电源信号输入端口电连接到比较器。或门电连接到比较器的输出端。根据比较器的比较结果，或门输出电源良好信号。

8. 发明申请

US20080184043A1 Multiprocessor power-on switch circuit 失效
标题翻译：多处理器上电开关电路
公开(公告)号：US20080184043A1
公开(公告)日：2008-07-31
申请号：US11699548
申请日：2007-01-30
申请人： Sheng-Yuan Tsai
发明人： Sheng-Yuan Tsai
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/3287 , Y02D10/171
摘要： A multiprocessor power-on switch circuit applied to a mainboard having multiple power-on circuits is provided, in which each power-on circuit includes a peripheral circuit corresponding to a processor. A selection circuit in the power-on switch circuit is responsible for selecting a power-on circuit as a first power-on circuit or a second power-on circuit. When the mainboard is powered on, a detection circuit in the power-on switch circuit receives a status signal from the first power-on circuit performing the power-on action. When the status signal is determined as a fault signal by the detection circuit, a control signal is output to the selection circuit, so as to make the selection circuit set the second power-on circuit as the power-on circuit to actuate the mainboard.
摘要翻译：提供了一种应用于具有多个通电电路的主板的多处理器上电开关电路，其中每个上电电路包括对应于处理器的外围电路。上电开关电路中的选择电路负责选择作为第一开机电路或第二上电电路的通电电路。当主板通电时，通电开关电路中的检测电路从执行上电动作的第一通电电路接收状态信号。当通过检测电路将状态信号确定为故障信号时，控制信号被输出到选择电路，以使选择电路将第二通电电路设置为通电电路来致动主板。

9. 发明授权

US07298625B1 Expansion structure of memory module slot 有权
标题翻译：内存模块插槽的扩展结构
公开(公告)号：US07298625B1
公开(公告)日：2007-11-20
申请号：US11653932
申请日：2007-01-17
申请人： Fu-Chung Wu , Sheng-Yuan Tsai , Shih-Jui Tung
发明人： Fu-Chung Wu , Sheng-Yuan Tsai , Shih-Jui Tung
IPC分类号： H05K7/02 , H05K7/10
CPC分类号： H05K7/1435 , G06F1/185 , G11C5/02 , G11C5/04 , H05K1/14 , H05K7/1445 , H05K2201/044 , H05K2201/045
摘要： An expansion structure of memory module slots is provided. A circuit switch board and a substrate are disposed on a motherboard, wherein a plurality of first memory module slots is disposed on the motherboard, at least one second memory module slot is disposed on one side of the substrate, and a plurality of third memory module slots is disposed on the other side of the substrate. The third memory module slots are electrically connected to the second memory module slot, and two ends of the circuit switch board are plugged into one of the first memory module slots and the second memory module slot. When memory modules are plugged in the third memory module slots, the memory modules are electrically connected to the first memory module slots respectively through the circuit switch board and then transmit data and signals with the motherboard.
摘要翻译：提供了存储器模块插槽的扩展结构。电路开关板和基板设置在母板上，其中多个第一存储器模块插槽设置在母板上，至少一个第二存储器模块插槽设置在衬底的一侧上，并且多个第三存储器模块槽位于基板的另一侧。第三存储器模块插槽电连接到第二存储器模块插槽，并且电路交换板的两端插入第一存储器模块插槽和第二存储器模块插槽中的一个。当存储器模块插入第三存储器模块插槽时，存储器模块分别通过电路开关板电连接到第一存储器模块插槽，然后与主板传输数据和信号。

10. 发明申请

US20070220284A1 Abnormal power interruption internal circuitry protection method and system for computer platform 有权
标题翻译：内部电路异常断电保护方法及系统
公开(公告)号：US20070220284A1
公开(公告)日：2007-09-20
申请号：US11378590
申请日：2006-03-17
申请人： Sheng-Yuan Tsai
发明人： Sheng-Yuan Tsai
IPC分类号： G06F1/26
CPC分类号： G06F1/30
摘要： An abnormal power interruption internal circuitry protection method and system is proposed for use with a computer platform, such as a blade server, which is characterized by the utilization of each server module's identification code (i.e., blade ID signal) and power-good signal to judge whether each server module is subjected to an abnormal power interruption, such that in the event of the abnormal power interruption, a small amount of remnant electrical power left in the internal circuitry of the blade server can be fetched as power source to shut down the server modules through a normal shutdown procedure. This feature can help protect the internal circuitry of the server modules of the blade server from being damaged due to abnormal shutdown in the event of abnormal power interruption.
摘要翻译：提出了一种异常电源中断内部电路保护方法和系统，用于与诸如刀片服务器的计算机平台一起使用，其特征在于使用每个服务器模块的识别码（即，刀片ID信号）和功率良好信号判断每个服务器模块是否遭受异常电源中断，以致在异常电源中断的情况下，刀片服务器的内部电路中残留的少量残余电力可以作为电源来关闭服务器模块通过正常关机程序。此功能可以帮助保护刀片服务器的服务器模块的内部电路在电源异常中断时由于异常关闭而损坏。

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