专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20070059611A1 Mask and manufacturing method thereof 有权
标题翻译：掩模及其制造方法
公开(公告)号：US20070059611A1
公开(公告)日：2007-03-15
申请号：US11444546
申请日：2006-05-31
申请人： Chun-Hao Tung , Chia-Tsung Lee , Hsien-Kai Tseng , Horino Shigekazu
发明人： Chun-Hao Tung , Chia-Tsung Lee , Hsien-Kai Tseng , Horino Shigekazu
IPC分类号： G03C5/00 , G03F1/00
CPC分类号： G03F1/32 , G03F1/54
摘要： A mask and a manufacturing method thereof are provided. A transparent substrate having three regions is provided first. A non-transmitting layer is formed in a first region of the transparent substrate. Then, a first photoresist layer is formed on the transparent substrate, and the first photoresist layer exposes a second region of the transparent substrate. Next, a first transmitting layer is formed on the transparent substrate and the first photoresist layer. Finally, the first photoresist layer is removed. The first transmitting layer on the first photoresist layer is removed at the same time and the first transmitting layer in the second region of the transparent substrate is remained and a third region of the transparent substrate is exposed. A lift-off process is used in the mask manufacturing method of the present invention to form the transmitting layer.
摘要翻译：提供了一种掩模及其制造方法。首先设置具有三个区域的透明基板。在透明基板的第一区域中形成非透光层。然后，在透明基板上形成第一光致抗蚀剂层，第一光致抗蚀剂层露出透明基板的第二区域。接下来，在透明基板和第一光致抗蚀剂层上形成第一透光层。最后，去除第一光致抗蚀剂层。同时去除第一光致抗蚀剂层上的第一透射层，并且保留透明基板的第二区域中的第一透射层，并露出透明基板的第三区域。在本发明的掩模制造方法中使用剥离处理来形成透射层。

2. 发明授权

US07704647B2 Mask and manufacturing method thereof 有权
标题翻译：掩模及其制造方法
公开(公告)号：US07704647B2
公开(公告)日：2010-04-27
申请号：US11444546
申请日：2006-05-31
申请人： Chun-Hao Tung , Chia-Tsung Lee , Hsien-Kai Tseng , Horino Shigekazu
发明人： Chun-Hao Tung , Chia-Tsung Lee , Hsien-Kai Tseng , Horino Shigekazu
IPC分类号： G03F1/00
CPC分类号： G03F1/32 , G03F1/54
摘要： A mask and a manufacturing method thereof are provided. A transparent substrate having three regions is provided first. A non-transmitting layer is formed in a first region of the transparent substrate. Then, a first photoresist layer is formed on the transparent substrate, and the first photoresist layer exposes a second region of the transparent substrate. Next, a first transmitting layer is formed on the transparent substrate and the first photoresist layer. Finally, the first photoresist layer is removed. The first transmitting layer on the first photoresist layer is removed at the same time and the first transmitting layer in the second region of the transparent substrate is remained and a third region of the transparent substrate is exposed. A lift-off process is used in the mask manufacturing method of the present invention to form the transmitting layer.
摘要翻译：提供了一种掩模及其制造方法。首先设置具有三个区域的透明基板。在透明基板的第一区域中形成非透光层。然后，在透明基板上形成第一光致抗蚀剂层，第一光致抗蚀剂层露出透明基板的第二区域。接下来，在透明基板和第一光致抗蚀剂层上形成第一透光层。最后，去除第一光致抗蚀剂层。同时去除第一光致抗蚀剂层上的第一透射层，并且保留透明基板的第二区域中的第一透射层，并露出透明基板的第三区域。在本发明的掩模制造方法中使用剥离处理来形成透射层。

3. 发明申请

US20090317731A1 MASK HAVING MULTIPLE TRANSMITTANCES 有权
标题翻译：掩蔽有多个发送
公开(公告)号：US20090317731A1
公开(公告)日：2009-12-24
申请号：US12547765
申请日：2009-08-26
申请人： CHUN-HAO TUNG , Chia-Tsung Lee , Hsien-Kai Tseng , Shigekazu Horino
发明人： CHUN-HAO TUNG , Chia-Tsung Lee , Hsien-Kai Tseng , Shigekazu Horino
IPC分类号： G03F1/00
CPC分类号： G03F1/32 , G03F1/54
摘要： A mask including a transparent substrate, a non-transmitting layer, a first transmitting layer and a second transmitting layer is provided. The transparent substrate has a first region, a second region, and a third region. The non-transmitting layer is disposed in the first region of the transparent substrate. The first transmitting layer is disposed in the second region and the third region of the transparent substrate. The second transmitting layer is disposed on the first transmitting layer in the third region.
摘要翻译：提供了包括透明衬底，非透射层，第一透射层和第二透射层的掩模。透明基板具有第一区域，第二区域和第三区域。非透射层设置在透明基板的第一区域中。第一透射层设置在透明基板的第二区域和第三区域中。第二发送层设置在第三区域的第一发送层上。

4. 发明授权

US07776497B2 Mask having multiple transmittances 有权
标题翻译：具有多个透射率的掩模
公开(公告)号：US07776497B2
公开(公告)日：2010-08-17
申请号：US12547765
申请日：2009-08-26
申请人： Chun-Hao Tung , Chia-Tsung Lee , Hsien-Kai Tseng , Shigekazu Horino
发明人： Chun-Hao Tung , Chia-Tsung Lee , Hsien-Kai Tseng , Shigekazu Horino
IPC分类号： G03F1/00
CPC分类号： G03F1/32 , G03F1/54
摘要： A mask including a transparent substrate, a non-transmitting layer, a first transmitting layer and a second transmitting layer is provided. The transparent substrate has a first region, a second region, and a third region. The non-transmitting layer is disposed in the first region of the transparent substrate. The first transmitting layer is disposed in the second region and the third region of the transparent substrate. The second transmitting layer is disposed on the first transmitting layer in the third region.
摘要翻译：提供了包括透明衬底，非透射层，第一透射层和第二透射层的掩模。透明基板具有第一区域，第二区域和第三区域。非透射层设置在透明基板的第一区域中。第一透射层设置在透明基板的第二区域和第三区域中。第二发送层设置在第三区域的第一发送层上。

5. 发明授权

US07323369B2 Fabrication method for thin film transistor array substrate 有权
标题翻译：薄膜晶体管阵列基板的制造方法
公开(公告)号：US07323369B2
公开(公告)日：2008-01-29
申请号：US11616002
申请日：2006-12-25
申请人： Chia-Tsung Lee , Yu-Rung Huang , Li-Chung Chang , Chia-Hui Chueh
发明人： Chia-Tsung Lee , Yu-Rung Huang , Li-Chung Chang , Chia-Hui Chueh
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L27/124 , G02F2001/136295
摘要： Scan lines are formed on a substrate. A patterned dielectric layer and a patterned semiconductor layer are formed to cover portions of the scan lines. A patterned transparent conductive layer and a patterned metal layer are sequentially formed to define data lines, source/drain electrodes, pixel electrodes and etching protecting layers. The etching protective layers cover the exposed scan lines exposed by the patterned dielectric layer and the patterned semiconductor layer, and are electrically connected to the scan lines. A passivation layer is formed, and then the passivation layer over the pixel electrodes and the patterned metal layer of the pixel electrodes are removed to expose the patterned transparent conductive layer. The patterned semiconductor layer over the scan lines between the etching protective layers and the data lines is removed to expose the patterned dielectric layer over the scan lines.
摘要翻译：扫描线形成在基板上。形成图案化的介电层和图案化的半导体层以覆盖扫描线的部分。顺序地形成图形化的透明导电层和图案化的金属层，以限定数据线，源极/漏极，像素电极和蚀刻保护层。蚀刻保护层覆盖由图案化的介电层和图案化的半导体层暴露的暴露的扫描线，并且电连接到扫描线。形成钝化层，然后去除像素电极上的钝化层和像素电极的图案化金属层以暴露图案化的透明导电层。去除蚀刻保护层和数据线之间的扫描线上的图案化半导体层，以在扫描线上暴露图案化的介电层。

6. 发明申请

US20070166893A1 FABRICATION METHOD FOR THIN FILM TRANSISTOR ARRAY SUBSTRATE 有权
标题翻译：薄膜晶体管阵列基板的制造方法
公开(公告)号：US20070166893A1
公开(公告)日：2007-07-19
申请号：US11616002
申请日：2006-12-25
申请人： Chia-Tsung Lee , Yu-Rung Huang , Li-Chung Chang , Chia-Hui Chueh
发明人： Chia-Tsung Lee , Yu-Rung Huang , Li-Chung Chang , Chia-Hui Chueh
IPC分类号： H01L21/84
CPC分类号： H01L27/124 , G02F2001/136295
摘要： Scan lines are formed on a substrate. A patterned dielectric layer and a patterned semiconductor layer are formed to cover portions of the scan lines. A patterned transparent conductive layer and a patterned metal layer are sequentially formed to define data lines, source/drain electrodes, pixel electrodes and etching protecting layers. The etching protective layers cover the exposed scan lines exposed by the patterned dielectric layer and the patterned semiconductor layer, and are electrically connected to the scan lines. A passivation layer is formed, and then the passivation layer over the pixel electrodes and the patterned metal layer of the pixel electrodes are removed to expose the patterned transparent conductive layer. The patterned semiconductor layer over the scan lines between the etching protective layers and the data lines is removed to expose the patterned dielectric layer over the scan lines.
摘要翻译：扫描线形成在基板上。形成图案化的介电层和图案化的半导体层以覆盖扫描线的部分。顺序地形成图形化的透明导电层和图案化的金属层，以限定数据线，源极/漏极，像素电极和蚀刻保护层。蚀刻保护层覆盖由图案化的介电层和图案化的半导体层暴露的暴露的扫描线，并且电连接到扫描线。形成钝化层，然后去除像素电极上的钝化层和像素电极的图案化金属层以暴露图案化的透明导电层。去除蚀刻保护层和数据线之间的扫描线上的图案化半导体层，以在扫描线上暴露图案化的介电层。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式