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    • 1. 发明申请
    • Mask and manufacturing method thereof
    • 掩模及其制造方法
    • US20070059611A1
    • 2007-03-15
    • US11444546
    • 2006-05-31
    • Chun-Hao TungChia-Tsung LeeHsien-Kai TsengHorino Shigekazu
    • Chun-Hao TungChia-Tsung LeeHsien-Kai TsengHorino Shigekazu
    • G03C5/00G03F1/00
    • G03F1/32G03F1/54
    • A mask and a manufacturing method thereof are provided. A transparent substrate having three regions is provided first. A non-transmitting layer is formed in a first region of the transparent substrate. Then, a first photoresist layer is formed on the transparent substrate, and the first photoresist layer exposes a second region of the transparent substrate. Next, a first transmitting layer is formed on the transparent substrate and the first photoresist layer. Finally, the first photoresist layer is removed. The first transmitting layer on the first photoresist layer is removed at the same time and the first transmitting layer in the second region of the transparent substrate is remained and a third region of the transparent substrate is exposed. A lift-off process is used in the mask manufacturing method of the present invention to form the transmitting layer.
    • 提供了一种掩模及其制造方法。 首先设置具有三个区域的透明基板。 在透明基板的第一区域中形成非透光层。 然后,在透明基板上形成第一光致抗蚀剂层,第一光致抗蚀剂层露出透明基板的第二区域。 接下来,在透明基板和第一光致抗蚀剂层上形成第一透光层。 最后,去除第一光致抗蚀剂层。 同时去除第一光致抗蚀剂层上的第一透射层,并且保留透明基板的第二区域中的第一透射层,并露出透明基板的第三区域。 在本发明的掩模制造方法中使用剥离处理来形成透射层。
    • 2. 发明授权
    • Mask and manufacturing method thereof
    • 掩模及其制造方法
    • US07704647B2
    • 2010-04-27
    • US11444546
    • 2006-05-31
    • Chun-Hao TungChia-Tsung LeeHsien-Kai TsengHorino Shigekazu
    • Chun-Hao TungChia-Tsung LeeHsien-Kai TsengHorino Shigekazu
    • G03F1/00
    • G03F1/32G03F1/54
    • A mask and a manufacturing method thereof are provided. A transparent substrate having three regions is provided first. A non-transmitting layer is formed in a first region of the transparent substrate. Then, a first photoresist layer is formed on the transparent substrate, and the first photoresist layer exposes a second region of the transparent substrate. Next, a first transmitting layer is formed on the transparent substrate and the first photoresist layer. Finally, the first photoresist layer is removed. The first transmitting layer on the first photoresist layer is removed at the same time and the first transmitting layer in the second region of the transparent substrate is remained and a third region of the transparent substrate is exposed. A lift-off process is used in the mask manufacturing method of the present invention to form the transmitting layer.
    • 提供了一种掩模及其制造方法。 首先设置具有三个区域的透明基板。 在透明基板的第一区域中形成非透光层。 然后,在透明基板上形成第一光致抗蚀剂层,第一光致抗蚀剂层露出透明基板的第二区域。 接下来,在透明基板和第一光致抗蚀剂层上形成第一透光层。 最后,去除第一光致抗蚀剂层。 同时去除第一光致抗蚀剂层上的第一透射层,并且保留透明基板的第二区域中的第一透射层,并露出透明基板的第三区域。 在本发明的掩模制造方法中使用剥离处理来形成透射层。
    • 5. 发明授权
    • Thin film transistor array substrate and manufacturing method thereof
    • 薄膜晶体管阵列基板及其制造方法
    • US08314423B2
    • 2012-11-20
    • US12560428
    • 2009-09-16
    • Chien-Hung ChenLih-Hsiung ChanChin-Yueh LiaoHsien-Kai Tseng
    • Chien-Hung ChenLih-Hsiung ChanChin-Yueh LiaoHsien-Kai Tseng
    • H01L29/786
    • H01L27/1288H01L27/1214H01L27/124H01L27/1248
    • A thin film transistor array substrate and a manufacturing method thereof are provided. In the manufacturing method, a first patterned conductive layer including a plurality of scan lines and a plurality of gates connected with the scan lines is formed on a substrate. A patterned gate insulating layer having a plurality of openings is then formed on the substrate to cover at least a portion of the first patterned conductive layer, and a plurality of dielectric patterns are formed in the openings. A plurality of semiconductor patterns are formed on the patterned gate insulating layer. A second patterned conductive layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A passivation layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A plurality of pixel electrodes are formed on the passivation layer.
    • 提供薄膜晶体管阵列基板及其制造方法。 在制造方法中,在基板上形成包括多条扫描线的第一图案化导电层和与扫描线连接的多个栅极。 然后在衬底上形成具有多个开口的图案化栅极绝缘层,以覆盖第一图案化导电层的至少一部分,并且在开口中形成多个电介质图案。 在图案化的栅极绝缘层上形成多个半导体图案。 在半导体图案,图案化栅极绝缘层和电介质图案上形成第二图案化导电层。 在半导体图案,图案化栅绝缘层和电介质图案上形成钝化层。 在钝化层上形成多个像素电极。
    • 6. 发明申请
    • THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
    • 薄膜晶体管阵列基板及其制造方法
    • US20100320466A1
    • 2010-12-23
    • US12560428
    • 2009-09-16
    • Chien-Hung ChenLih-Hsiung ChanChin-Yueh LiaoHsien-Kai Tseng
    • Chien-Hung ChenLih-Hsiung ChanChin-Yueh LiaoHsien-Kai Tseng
    • H01L33/00H01L21/28
    • H01L27/1288H01L27/1214H01L27/124H01L27/1248
    • A thin film transistor array substrate and a manufacturing method thereof are provided. In the manufacturing method, a first patterned conductive layer including a plurality of scan lines and a plurality of gates connected with the scan lines is formed on a substrate. A patterned gate insulating layer having a plurality of openings is then formed on the substrate to cover at least a portion of the first patterned conductive layer, and a plurality of dielectric patterns are formed in the openings. A plurality of semiconductor patterns are formed on the patterned gate insulating layer. A second patterned conductive layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A passivation layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A plurality of pixel electrodes are formed on the passivation layer.
    • 提供薄膜晶体管阵列基板及其制造方法。 在制造方法中,在基板上形成包括多条扫描线的第一图案化导电层和与扫描线连接的多个栅极。 然后在衬底上形成具有多个开口的图案化栅极绝缘层,以覆盖第一图案化导电层的至少一部分,并且在开口中形成多个电介质图案。 在图案化的栅极绝缘层上形成多个半导体图案。 在半导体图案,图案化栅极绝缘层和电介质图案上形成第二图案化导电层。 在半导体图案,图案化栅绝缘层和电介质图案上形成钝化层。 在钝化层上形成多个像素电极。