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1. 发明授权

US09606730B2 System and method including three dimensional nonvolatile memory device and random access memory 有权
公开(公告)号：US09606730B2
公开(公告)日：2017-03-28
申请号：US13799203
申请日：2013-03-13
申请人： Byung Hei Jun , Donghun Kwak
发明人： Byung Hei Jun , Donghun Kwak
IPC分类号： G06F12/02 , G06F3/06 , G11C16/10 , G11C7/10 , G11C16/06 , G11C16/34 , G06F12/06 , G11C11/56
CPC分类号： G06F3/0605 , G06F3/061 , G06F3/064 , G06F3/0656 , G06F3/0679 , G06F12/0246 , G06F12/0292 , G06F12/0638 , G06F2212/1016 , G06F2212/1041 , G06F2212/205 , G11C7/10 , G11C11/5628 , G11C16/06 , G11C16/10 , G11C16/3454
摘要： A program method for a memory system including a three-dimensional nonvolatile memory having multi-level memory cells and a random access memory. The method uses the random access memory to variously store selected bits of multi-bit data during the programming of a row of memory cells in the three-dimensional nonvolatile memory.

2. 发明授权

US08654564B2 Resistive memory and related method of operation 有权
标题翻译：电阻记忆及相关操作方法
公开(公告)号：US08654564B2
公开(公告)日：2014-02-18
申请号：US13598994
申请日：2012-08-30
申请人： Donghun Kwak , Cheonan Lee
发明人： Donghun Kwak , Cheonan Lee
IPC分类号： G11C11/00 , G11C7/00 , G11C7/22
CPC分类号： G11C8/10 , G11C11/1675 , G11C11/1677 , G11C13/0004 , G11C13/0007 , G11C13/0064 , G11C13/0069 , G11C13/0097 , G11C2013/0073 , G11C2013/0092 , G11C2213/18 , G11C2213/71 , G11C2213/77
摘要： A resistive memory device comprises a memory cell array comprising a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a row selector connected to the plurality of word lines, and a column selector connected to the plurality of bit lines. In a program or erase operation, the row selector provides a selected word line with program or erase pulse and a verification pulse in each of multiple program loops, wherein the verification pulse has a substantially fixed level through the program loops and the program or erase pulse has a negative value that decreases incrementally between successive program loops.
摘要翻译：电阻式存储器件包括存储单元阵列，该存储单元阵列包括连接到多个字线和多个位线的多个存储器单元，连接到多个字线的行选择器以及连接到多个位的列选择器线条。在编程或擦除操作中，行选择器在多个程序循环中的每一个中为选定的字线提供编程或擦除脉冲和验证脉冲，其中验证脉冲通过程序循环和编程或擦除脉冲具有基本固定的电平具有在连续程序循环之间逐渐减小的负值。

3. 发明申请

US20100103740A1 Nonvolatile Memory Device, Methods of Programming the Nonvolatile Memory Device and Memory System Including the Same 失效
标题翻译：非易失性存储器件，非易失性存储器件的编程方法和包括其的存储器系统
公开(公告)号：US20100103740A1
公开(公告)日：2010-04-29
申请号：US12551268
申请日：2009-09-01
申请人： Donghun Kwak , Youngho Lim
发明人： Donghun Kwak , Youngho Lim
IPC分类号： G11C16/04 , G11C8/00 , G11C16/06
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/0483 , G11C16/3427 , G11C2211/5621
摘要： A nonvolatile memory device is provided. A counter counts an amount of data to be program-inhibited among data to be written to memory cells to provide a first count value. The counter also counts an amount of program-inhibited data among data written to the memory cells to provide a second count value. Control logic controls a program operation by comparing the first count value with the second count value.
摘要翻译：提供非易失性存储器件。计数器对待写入存储器单元的数据中要编程禁止的数据量进行计数以提供第一计数值。计数器还对写入存储器单元的数据中的程序禁止数据量进行计数以提供第二计数值。控制逻辑通过将第一计数值与第二计数值进行比较来控制程序操作。

4. 发明授权

US09607688B2 Memory system including nonvolatile memory and memory controller and programming method for programming data into nonvolatile memory 有权
公开(公告)号：US09607688B2
公开(公告)日：2017-03-28
申请号：US14526661
申请日：2014-10-29
申请人： Donghun Kwak
发明人： Donghun Kwak
IPC分类号： G11C11/56 , G11C16/10 , G06F12/02 , G06F12/0868
CPC分类号： G11C11/5628 , G06F12/0246 , G06F12/0868 , G06F2212/7207 , G11C11/5621 , G11C16/10
摘要： According to example embodiments, a nonvolatile memory includes a plurality of memory cells and a plurality of bit lines respectively connected to the plurality of memory cells, and a method of programming the nonvolatile memory includes loading data to the nonvolatile memory for a first program operation, starting the first program operation on the plurality of memory cells, based on the loaded data, and loading at least two page data to the nonvolatile memory before the first program operation is completed. The at least two page data include first page data and second page data for a second program operation following the first program operation. The first page data and the second page data respectively correspond to a first bit and a second bit to be programmed at a memory cell among the plurality of memory cells.

5. 发明授权

US09424947B2 Nonvolatile memory device and method of program verifying the same 有权
标题翻译：非易失性存储器件和程序验证方法
公开(公告)号：US09424947B2
公开(公告)日：2016-08-23
申请号：US14284031
申请日：2014-05-21
申请人： Donghun Kwak , Hyun-Wook Park , Kitae Park
发明人： Donghun Kwak , Hyun-Wook Park , Kitae Park
IPC分类号： G11C16/34 , G11C16/10 , G11C16/26 , G11C16/04
CPC分类号： G11C16/3459 , G11C16/0483 , G11C16/10 , G11C16/26
摘要： A program method of a three-dimensional nonvolatile memory device is provided which includes executing at least one program loop including an operation of programming selected memory cells of a selected string turned on by a selected string selection transistor and an operation of verifying whether programming of the memory cells is passed; and applying a negative counter voltage to a selected word line connected to the selected memory cells of the selected string at least once during an interval of the verify operation where there are turned on string selection transistors of unselected strings connected through the same bit line as that of the selected string.
摘要翻译：提供了一种三维非易失性存储器件的编程方法，包括执行至少一个程序循环，该程序循环包括对由所选择的字符串选择晶体管导通的所选字符串的选定存储单元进行编程的操作，以及验证是否记忆细胞通过; 以及在验证操作的间隔期间至少一次将连接到所选字符串的所选择的存储单元的选定字线施加负的反电压，其中通过与该相同的位线连接的未选择的串连接的串选择晶体管，的所选字符串。

6. 发明授权

US08059464B2 Nonvolatile memory device, methods of programming the nonvolatile memory device and memory system including the same 失效
标题翻译：非易失性存储器件，非易失性存储器件的编程方法和包括其的存储器系统
公开(公告)号：US08059464B2
公开(公告)日：2011-11-15
申请号：US12551268
申请日：2009-09-01
申请人： Donghun Kwak , Youngho Lim
发明人： Donghun Kwak , Youngho Lim
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/0483 , G11C16/3427 , G11C2211/5621
摘要： A nonvolatile memory device is provided. A counter counts an amount of data to be program-inhibited among data to be written to memory cells to provide a first count value. The counter also counts an amount of program-inhibited data among data written to the memory cells to provide a second count value. Control logic controls a program operation by comparing the first count value with the second count value.
摘要翻译：提供非易失性存储器件。计数器对待写入存储器单元的数据中要编程禁止的数据量进行计数以提供第一计数值。计数器还对写入存储器单元的数据中的程序禁止数据量进行计数以提供第二计数值。控制逻辑通过将第一计数值与第二计数值进行比较来控制程序操作。

7. 发明授权

US09564241B2 Memory system and user device including the same 有权
标题翻译：内存系统和用户设备包括相同的
公开(公告)号：US09564241B2
公开(公告)日：2017-02-07
申请号：US14466187
申请日：2014-08-22
申请人： Donghun Kwak , Kitae Park
发明人： Donghun Kwak , Kitae Park
IPC分类号： G06F12/12 , G11C16/34 , G11C16/04 , G11C16/26 , G06F3/06 , G06F12/02
CPC分类号： G11C16/349 , G06F12/0246 , G06F2003/0697 , G11C16/0466 , G11C16/26
摘要： In one embodiment, the method includes receiving a read request for reading data from a memory area of the memory, and determining whether an identifier of the memory area is stored in one of the plurality of entries of a characteristic table. Each of the plurality of entries is associated with a different range of at least one memory area characteristic and each of the plurality of entries is associated with different read condition information. The method further includes obtaining the read condition information associated with the entry storing the identifier of the memory area if the determining determines the identifier is stored in one of the plurality of entries of the characteristic table, and controlling the memory to read data from the memory area using the obtained read condition information.
摘要翻译：在一个实施例中，该方法包括从存储器的存储器区域接收读取数据的读取请求，以及确定存储器区域的标识符是否存储在特征表的多个条目之一中。多个条目中的每一个与至少一个存储器区域特征的不同范围相关联，并且多个条目中的每一个与不同的读取条件信息相关联。该方法还包括：如果确定确定标识符存储在特征表的多个条目之一，并且控制存储器从存储器读取数据，则获得与存储存储区域的标识符的条目相关联的读取条件信息区域，使用获得的读取条件信息。

8. 发明授权

US09318224B2 Non-volatile memory device and operating method thereof 有权
标题翻译：非易失性存储器件及其操作方法
公开(公告)号：US09318224B2
公开(公告)日：2016-04-19
申请号：US14091382
申请日：2013-11-27
申请人： Donghun Kwak
发明人： Donghun Kwak
IPC分类号： G06F12/02 , G11C29/00 , G11C16/04 , G11C16/34
CPC分类号： G11C29/82 , G11C16/0483 , G11C16/344
摘要： An operating method is for operating a memory controller which controls a non-volatile memory device. The non-volatile memory device includes a plurality of memory cells arranged in a direction perpendicular to a substrate. The operating method includes erasing the plurality of memory cells, reading memory cells connected with a first word line using a first word line voltage to search string address information corresponding to memory cells being at an off state, and programming memory cells corresponding to the string address information to a particular program state based on the string address information to store mapping information.
摘要翻译：操作方法是操作控制非易失性存储器件的存储器控制器。非易失性存储器件包括沿垂直于衬底的方向布置的多个存储单元。操作方法包括擦除多个存储器单元，使用第一字线电压读取与第一字线连接的存储单元，以搜索与处于关闭状态的存储器单元相对应的字符串地址信息，以及编程与字符串地址对应的存储器单元基于字符串地址信息来存储映射信息到特定程序状态的信息。

9. 发明授权

US08942046B2 Method of programming a 3-dimensional nonvolatile memory device based on a program order of a selected page and a location of a string selection line 有权
标题翻译：基于所选择的页面的程序顺序和字符串选择行的位置对3维非易失性存储器件进行编程的方法
公开(公告)号：US08942046B2
公开(公告)日：2015-01-27
申请号：US13761196
申请日：2013-02-07
申请人： Donghun Kwak
发明人： Donghun Kwak
IPC分类号： G11C16/12 , G11C16/10 , G11C16/34 , G11C11/56 , G11C16/04 , H01L27/115
CPC分类号： G11C16/10 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/34 , G11C16/3427 , G11C2211/5621 , H01L27/115 , H01L27/11556 , H01L27/11582
摘要： A nonvolatile memory device comprises cell strings formed in a direction substantially perpendicular to a substrate and is configured to select memory cells in units corresponding to a string selection line. The device selects a page to be programmed among pages sharing a common word line, determines a level of a program voltage to be provided to the selected page according to a location of a string selection line corresponding to the selected page, and writes data in the selected page using the determined level of the program voltage.
摘要翻译：非易失性存储器件包括在基本上垂直于衬底的方向上形成的单元串，并且被配置为以对应于字符串选择线的单位选择存储单元。设备在共享公共字线的页面中选择要编程的页面，根据与所选择的页面相对应的字符串选择行的位置来确定要提供给所选页面的编程电压的电平，并将数据写入选择页面使用确定的程序电平电平。

10. 发明授权

US08917556B2 Nonvolatile memory device having 3D memory cell array and read method 有权
标题翻译：具有3D存储单元阵列和读取方法的非易失性存储器件
公开(公告)号：US08917556B2
公开(公告)日：2014-12-23
申请号：US13681456
申请日：2012-11-20
申请人： Donghun Kwak
发明人： Donghun Kwak
IPC分类号： G11C11/06 , H01L27/115 , G11C16/26 , G11C16/06 , G11C16/20 , G11C16/04
CPC分类号： G11C16/06 , G11C16/0441 , G11C16/0483 , G11C16/20 , G11C16/26 , H01L27/11524 , H01L27/1157 , H01L27/1158 , H01L27/11582
摘要： Disclosed is a method reading memory device information from a nonvolatile memory device having a three-dimensional (3D) memory cell array including an original plane storing data associated with the information in a first group of memory cells and a replica plane storing the data in replica in a second group of memory cells. The method applies a selection read voltage to a selected word line connected to first and second groups of memory cells while applying a non-selection read voltage to other word lines, and simultaneously reading first data from the first group of memory cells and second data from the second group of memory cells.
摘要翻译：公开了一种从具有三维（3D）存储单元阵列的非易失性存储器件读取存储器件信息的方法，该三维（3D）存储单元阵列包括存储与第一组存储器单元中的信息相关联的数据的原始平面以及将数据存储在副本中的复制平面在第二组记忆细胞中。该方法将选择读取电压施加到连接到第一和第二组存储器单元的选定字线，同时向其它字线施加非选择读取电压，并且同时从第一组存储器单元读取第一数据和从第一组存储器单元读取第二数据第二组记忆细胞。

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