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1. 发明申请

US20090249318A1 Data Transfer Optimized Software Cache for Irregular Memory References 有权
标题翻译：数据传输优化软件缓存用于不规则内存引用
公开(公告)号：US20090249318A1
公开(公告)日：2009-10-01
申请号：US12057456
申请日：2008-03-28
申请人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F9/45 , G06F12/08
CPC分类号： G06F8/4442
摘要： Mechanisms are provided for optimizing irregular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms may transform the computer code, by a compiler, to generate transformed computer code in which irregular memory references access a storage of a software cache of a data processing system through a transactional cache mechanism of the software cache.
摘要翻译：提供机制用于优化计算机代码中的不规则内存引用。这些机制可能解析计算机代码以识别计算机代码中的内存引用。这些机制可以将计算机代码中的存储器引用进一步分类为常规存储器引用或不规则存储器引用。此外，机制可以通过编译器转换计算机代码，以生成转换的计算机代码，其中不规则存储器引用通过软件高速缓存的事务高速缓存机制访问数据处理系统的软件高速缓存的存储。

2. 发明授权

US08561043B2 Data transfer optimized software cache for irregular memory references 有权
标题翻译：数据传输优化的软件缓存用于不规则内存引用
公开(公告)号：US08561043B2
公开(公告)日：2013-10-15
申请号：US12057456
申请日：2008-03-28
申请人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F9/45 , G06F12/08
CPC分类号： G06F8/4442
摘要： Mechanisms are provided for optimizing irregular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms may transform the computer code, by a compiler, to generate transformed computer code in which irregular memory references access a storage of a software cache of a data processing system through a transactional cache mechanism of the software cache.
摘要翻译：提供机制用于优化计算机代码中的不规则内存引用。这些机制可能解析计算机代码以识别计算机代码中的内存引用。这些机制可以将计算机代码中的存储器引用进一步分类为常规存储器引用或不规则存储器引用。此外，机制可以通过编译器转换计算机代码，以生成转换的计算机代码，其中不规则存储器引用通过软件高速缓存的事务高速缓存机制访问数据处理系统的软件高速缓存的存储。

3. 发明授权

US08527974B2 Data transfer optimized software cache for regular memory references 有权
标题翻译：数据传输优化的软件缓存用于常规内存引用
公开(公告)号：US08527974B2
公开(公告)日：2013-09-03
申请号：US12057447
申请日：2008-03-28
申请人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F12/08
CPC分类号： G06F12/0837 , G06F8/4442 , G06F12/0848
摘要： Mechanisms are provided for optimizing regular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms may transform the computer code, by a compiler, to generate transformed computer code in which regular memory references access a storage of a software cache of a data processing system through a high locality cache mechanism of the software cache.
摘要翻译：提供机制用于优化计算机代码中的常规内存引用。这些机制可能解析计算机代码以识别计算机代码中的内存引用。这些机制可以将计算机代码中的存储器引用进一步分类为常规存储器引用或不规则存储器引用。此外，机制可以通过编译器转换计算机代码，以生成转换的计算机代码，其中常规内存引用通过软件高速缓存的高位置缓存机制访问数据处理系统的软件高速缓存的存储。

4. 发明申请

US20090248985A1 Data Transfer Optimized Software Cache for Regular Memory References 有权
标题翻译：数据传输优化的软件缓存用于常规内存引用
公开(公告)号：US20090248985A1
公开(公告)日：2009-10-01
申请号：US12057447
申请日：2008-03-28
申请人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Eduard Ayguade , Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , Xavier Martorell , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F12/08
CPC分类号： G06F12/0837 , G06F8/4442 , G06F12/0848
摘要： Mechanisms are provided for optimizing regular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms may transform the computer code, by a compiler, to generate transformed computer code in which regular memory references access a storage of a software cache of a data processing system through a high locality cache mechanism of the software cache.
摘要翻译：提供机制用于优化计算机代码中的常规内存引用。这些机制可能解析计算机代码以识别计算机代码中的内存引用。这些机制可以将计算机代码中的存储器引用进一步分类为常规存储器引用或不规则存储器引用。此外，机制可以通过编译器转换计算机代码，以生成转换的计算机代码，其中常规内存引用通过软件高速缓存的高位置缓存机制访问数据处理系统的软件高速缓存的存储。

5. 发明申请

US20100088673A1 Optimized Code Generation Targeting a High Locality Software Cache 失效
标题翻译：针对高位置软件缓存的优化代码生成
公开(公告)号：US20100088673A1
公开(公告)日：2010-04-08
申请号：US12246602
申请日：2008-10-07
申请人： Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F9/44
CPC分类号： G06F8/4442
摘要： Mechanisms for optimized code generation targeting a high locality software cache are provided. Original computer code is parsed to identify memory references in the original computer code. Memory references are classified as either regular memory references or irregular memory references. Regular memory references are controlled by a high locality cache mechanism. Original computer code is transformed, by a compiler, to generate transformed computer code in which the regular memory references are grouped into one or more memory reference streams, each memory reference stream having a leading memory reference, a trailing memory reference, and one or more middle memory references. Transforming of the original computer code comprises inserting, into the original computer code, instructions to execute initialization, lookup, and cleanup operations associated with the leading memory reference and trailing memory reference in a different manner from initialization, lookup, and cleanup operations for the one or more middle memory references.
摘要翻译：提供了针对高位置软件缓存的优化代码生成机制。解析原始计算机代码以识别原始计算机代码中的内存引用。内存引用被分类为常规内存引用或不规则内存引用。常规内存引用由高位置缓存机制控制。原始计算机代码由编译器转换以生成转换的计算机代码，其中常规存储器引用被分组成一个或多个存储器参考流，每个存储器参考流具有前导存储器引用，尾随存储器引用和一个或多个中间内存引用。原始计算机代码的转换包括将原始计算机代码中的指令以不同于初始化，查找和清除操作的方式与前导存储器引用和尾随存储器引用相关联的执行初始化，查找和清除操作的指令进行插入或更多的中间内存引用。

6. 发明授权

US08561044B2 Optimized code generation targeting a high locality software cache 失效
标题翻译：针对高位置软件缓存的优化代码生成
公开(公告)号：US08561044B2
公开(公告)日：2013-10-15
申请号：US12246602
申请日：2008-10-07
申请人： Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
发明人： Tong Chen , Alexandre E. Eichenberger , Marc Gonzalez Tallada , John K. O'Brien , Kathryn M. O'Brien , Zehra N. Sura , Tao Zhang
IPC分类号： G06F9/44
CPC分类号： G06F8/4442
摘要： Mechanisms for optimized code generation targeting a high locality software cache are provided. Original computer code is parsed to identify memory references in the original computer code. Memory references are classified as either regular memory references or irregular memory references. Regular memory references are controlled by a high locality cache mechanism. Original computer code is transformed, by a compiler, to generate transformed computer code in which the regular memory references are grouped into one or more memory reference streams, each memory reference stream having a leading memory reference, a trailing memory reference, and one or more middle memory references. Transforming of the original computer code comprises inserting, into the original computer code, instructions to execute initialization, lookup, and cleanup operations associated with the leading memory reference and trailing memory reference in a different manner from initialization, lookup, and cleanup operations for the one or more middle memory references.
摘要翻译：提供了针对高位置软件缓存的优化代码生成机制。解析原始计算机代码以识别原始计算机代码中的内存引用。内存引用被分类为常规内存引用或不规则内存引用。常规内存引用由高位置缓存机制控制。原始计算机代码由编译器转换以生成转换的计算机代码，其中常规存储器引用被分组成一个或多个存储器参考流，每个存储器参考流具有前导存储器引用，尾随存储器引用和一个或多个中间内存引用。原始计算机代码的转换包括将原始计算机代码中的指令以不同于初始化，查找和清除操作的方式与前导存储器引用和尾随存储器引用相关联的执行初始化，查找和清除操作的指令进行插入或更多的中间内存引用。

7. 发明授权

US08762968B2 Prefetching irregular data references for software controlled caches 失效
标题翻译：预取软件控制缓存的不规则数据引用
公开(公告)号：US08762968B2
公开(公告)日：2014-06-24
申请号：US13534794
申请日：2012-06-27
申请人： Tong Chen , Marc Gonzalez tallada , Zehra N. Sura , Tao Zhang
发明人： Tong Chen , Marc Gonzalez tallada , Zehra N. Sura , Tao Zhang
IPC分类号： G06F9/44
CPC分类号： G06F8/4442
摘要： Prefetching irregular memory references into a software controlled cache is provided. A compiler analyzes source code to identify at least one of a plurality of loops that contain an irregular memory reference. The compiler determines if the irregular memory reference within the at least one loop is a candidate for optimization. Responsive to an indication that the irregular memory reference may be optimized, the compiler determines if the irregular memory reference is valid for prefetching. Responsive to an indication that the irregular memory reference is valid for prefetching, a store statement for an address of the irregular memory reference is inserted into the at least one loop. A runtime library call is inserted into a prefetch runtime library for the irregular memory reference. Data associated with the irregular memory reference is prefetched into the software controlled cache when the runtime library call is invoked.
摘要翻译：提供了将不规则内存引用预取到软件控制的缓存中。编译器分析源代码以识别包含不规则存储器引用的多个循环中的至少一个循环。编译器确定至少一个循环内的不规则存储器引用是否是优化的候选者。响应于可以优化不规则存储器引用的指示，编译器确定不规则存储器引用是否对预取有效。响应于不规则存储器引用对于预取有效的指示，将不规则存储器引用的地址的存储语句插入到至少一个循环中。运行时库调用插入到不规则内存引用的预取运行时库中。当调用运行时库调用时，与不规则内存引用相关联的数据将被预取到软件控制的缓存中。

8. 发明申请

US20090254711A1 Reducing Cache Pollution of a Software Controlled Cache 失效
标题翻译：减少软件控制缓存的缓存污染
公开(公告)号：US20090254711A1
公开(公告)日：2009-10-08
申请号：US12062587
申请日：2008-04-04
申请人： Tong Chen , Marc Gonzalez tallada , Zehra N. Sura , Tao Zhang
发明人： Tong Chen , Marc Gonzalez tallada , Zehra N. Sura , Tao Zhang
IPC分类号： G06F12/00
CPC分类号： G06F12/0862
摘要： Reducing cache pollution of a software controlled cache is provided. A request is received to prefetch data into the software controlled cache. A first designator is set for a first cache access to a first value. If there is the second cache access to prefetch, a determination is made as to whether data associated with the second cache access exists in the software controlled cache. If the data is in the software controlled cache, a determination is made as to whether a second value of a second designator is greater than the first value of the first cache access. If the second value fails to be greater than the first value, the position of the first cache access and the second cache access in a cache line is swapped. The first value is decremented by a predetermined amount and the second value is replaced to equal the first value.
摘要翻译：提供减少软件控制缓存的缓存污染。接收到将数据预取到软件控制的高速缓存中的请求。第一个指示符设置为第一个缓存访问第一个值。如果存在对预取的第二高速缓存访问，则确定与软件控制的高速缓存中是否存在与第二高速缓存访问相关联的数据。如果数据在软件控制的高速缓存中，则确定第二指示符的第二值是否大于第一高速缓存访问的第一值。如果第二个值不能大于第一个值，则交换高速缓存行中的第一高速缓存访问和第二高速缓存访问的位置。第一值减少预定量，第二值被替换为等于第一值。

9. 发明授权

US08146064B2 Dynamically controlling a prefetching range of a software controlled cache 失效
标题翻译：动态控制软件控制缓存的预取范围
公开(公告)号：US08146064B2
公开(公告)日：2012-03-27
申请号：US12062559
申请日：2008-04-04
申请人： Tong Chen , Marc Gonzalez tallada , Zehra N. Sura , Tao Zhang
发明人： Tong Chen , Marc Gonzalez tallada , Zehra N. Sura , Tao Zhang
IPC分类号： G06F9/45
CPC分类号： G06F12/0862 , G06F12/0837
摘要： Dynamically controlling a prefetching range of a software controlled cache is provided. A compiler analyzes source code to identify at least one of a plurality of loops that contain irregular memory references. For each irregular memory reference in the source code, the compiler determines whether the irregular memory reference is a candidate for optimization. Responsive to identifying an irregular memory reference that may be optimized, the complier determines whether the irregular memory reference is valid for prefetching. If the irregular memory reference is valid for prefetching, a store statement for an address of the irregular memory reference is inserted into the at least one loop. A runtime library call is inserted into a prefetch runtime library to dynamically prefetch the irregular memory references. Data associated with the irregular memory references are dynamically prefetched into the software controlled cache when the runtime library call is invoked.
摘要翻译：提供了动态控制软件控制缓存的预取范围。编译器分析源代码以识别包含不规则存储器引用的多个循环中的至少一个循环。对于源代码中的每个不规则内存引用，编译器确定不规则内存引用是否是优化的候选者。响应于识别可优化的不规则存储器参考，编译器确定不规则存储器参考是否对预取有效。如果不规则存储器引用对于预取有效，则将不规则存储器引用的地址的存储语句插入到至少一个循环中。运行时库调用被插入到预取运行时库中以动态预取不规则内存引用。当调用运行时库调用时，与不规则内存引用相关联的数据将动态预取到软件控制的高速缓存中。

10. 发明授权

US08055849B2 Reducing cache pollution of a software controlled cache 失效
标题翻译：降低软件控制缓存的缓存污染
公开(公告)号：US08055849B2
公开(公告)日：2011-11-08
申请号：US12062587
申请日：2008-04-04
申请人： Tong Chen , Marc Gonzalez tallada , Zehra N. Sura , Tao Zhang
发明人： Tong Chen , Marc Gonzalez tallada , Zehra N. Sura , Tao Zhang
IPC分类号： G06F12/12
CPC分类号： G06F12/0862
摘要： Reducing cache pollution of a software controlled cache is provided. A request is received to prefetch data into the software controlled cache. A first designator is set for a first cache access to a first value. If there is the second cache access to prefetch, a determination is made as to whether data associated with the second cache access exists in the software controlled cache. If the data is in the software controlled cache, a determination is made as to whether a second value of a second designator is greater than the first value of the first cache access. If the second value fails to be greater than the first value, the position of the first cache access and the second cache access in a cache line is swapped. The first value is decremented by a predetermined amount and the second value is replaced to equal the first value.
摘要翻译：提供减少软件控制缓存的缓存污染。接收到将数据预取到软件控制的高速缓存中的请求。第一个指示符设置为第一个缓存访问第一个值。如果存在对预取的第二高速缓存访问，则确定与软件控制的高速缓存中是否存在与第二高速缓存访问相关联的数据。如果数据在软件控制的高速缓存中，则确定第二指示符的第二值是否大于第一高速缓存访问的第一值。如果第二个值不能大于第一个值，则交换高速缓存行中的第一高速缓存访问和第二高速缓存访问的位置。第一值减少预定量，第二值被替换为等于第一值。

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