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1. 发明授权

US09003380B2 Execution of dynamic languages via metadata extraction 有权
标题翻译：通过元数据提取来执行动态语言
公开(公告)号：US09003380B2
公开(公告)日：2015-04-07
申请号：US12862560
申请日：2010-08-24
申请人： Gheorghe Calin Cascaval , Mehrdad H. Reshadi
发明人： Gheorghe Calin Cascaval , Mehrdad H. Reshadi
IPC分类号： G06F9/45 , G06F9/455 , G06F9/445
CPC分类号： G06F9/45508 , G06F9/44505 , G06F9/45512
摘要： Methods and devices for executing scripts written in a dynamic scripting language include parsing scripts in two stages, a pre-parse using a simplified grammar to generate script metadata regarding the high level structure of the script, and a full parse using the grammar and syntax of the dynamic scripting language and generated script metadata. The generated metadata may describe the high level structure that is present in the language of the script such as functions, object methods, and a top level call graph. The script metadata may be used during the full parse to determine the parts of the code to be fully parsed. The aspects minimize processing time spent in the parsing at run-time, and may eliminate processing required to interpret or compile sections of code that will not be executed. Script metadata as well as results of full parsing may also be cached to provide further processing efficiencies.
摘要翻译：用于执行以动态脚本语言编写的脚本的方法和设备包括分两个阶段解析脚本，使用简化语法进行预解析，以生成关于脚本的高级结构的脚本元数据，并使用语法和语法完整解析动态脚本语言和生成的脚本元数据。生成的元数据可以描述以脚本的语言存在的高级结构，诸如函数，对象方法和顶级调用图。可以在完整解析过程中使用脚本元数据来确定要完全解析的代码部分。这些方面最大限度地减少了运行时在解析中花费的处理时间，并且可以消除解释或编译将不被执行的代码段所需的处理。还可以缓存脚本元数据以及完全解析的结果，以提供进一步的处理效率。

2. 发明申请

US20110173597A1 EXECUTION OF DYNAMIC LANGUAGES VIA METADATA EXTRACTION 有权
标题翻译：动态语言通过元素提取的执行
公开(公告)号：US20110173597A1
公开(公告)日：2011-07-14
申请号：US12862560
申请日：2010-08-24
申请人： Gheorghe Calin Cascaval , Mehrdad H. Reshadi
发明人： Gheorghe Calin Cascaval , Mehrdad H. Reshadi
IPC分类号： G06F9/45
CPC分类号： G06F9/45508 , G06F9/44505 , G06F9/45512
摘要： Methods and devices for executing scripts written in a dynamic scripting language include parsing scripts in two stages, a pre-parse using a simplified grammar to generate script metadata regarding the high level structure of the script, and a full parse using the grammar and syntax of the dynamic scripting language and generated script metadata. The generated metadata may describe the high level structure that is present in the language of the script such as functions, object methods, and a top level call graph. The script metadata may be used during the full parse to determine the parts of the code to be fully parsed. The aspects minimize processing time spent in the parsing at run-time, and may eliminate processing required to interpret or compile sections of code that will not be executed. Script metadata as well as results of full parsing may also be cached to provide further processing efficiencies.
摘要翻译：用于执行以动态脚本语言编写的脚本的方法和设备包括分两个阶段解析脚本，使用简化语法进行预解析，以生成关于脚本的高级结构的脚本元数据，并使用语法和语法完整解析动态脚本语言和生成的脚本元数据。生成的元数据可以描述存在于脚本的语言中的高级结构，例如函数，对象方法和顶级调用图。可以在完整解析过程中使用脚本元数据来确定要完全解析的代码部分。这些方面最大限度地减少了运行时在解析中花费的处理时间，并且可以消除解释或编译将不被执行的代码段所需的处理。还可以缓存脚本元数据以及完全解析的结果，以提供进一步的处理效率。

3. 发明授权

US07376808B2 Method and system for predicting the performance benefits of mapping subsets of application data to multiple page sizes 有权
标题翻译：用于预测将应用程序数据子集映射到多个页面大小的性能优势的方法和系统
公开(公告)号：US07376808B2
公开(公告)日：2008-05-20
申请号：US11343565
申请日：2006-01-31
申请人： Gheorghe Calin Cascaval , Evelyn Duesterwald , Peter F. Sweeney , Robert W. Wisniewski
发明人： Gheorghe Calin Cascaval , Evelyn Duesterwald , Peter F. Sweeney , Robert W. Wisniewski
IPC分类号： G06F9/34 , G06F12/00
CPC分类号： G06F12/10 , G06F2212/652
摘要： A method for modeling the performance of memory address translation mechanism (MATM), comprises: a) receiving an execution profile that contains a memory address reference stream of an application, a set of page size mappings, and events about the application's data allocations and de-allocations; b) translating each memory reference in the input memory reference stream into a reference to the corresponding data object, by consulting the memory allocation and de-allocation events, to provide a data object reference stream; c) translating each data object reference into a corresponding page reference by consulting the page size mapping and by modeling the data allocation and de-allocation events in accordance with the mapping to provide a page reference stream and a number of pages of each page size that are needed by the respective mapping; d) using the page reference stream to provide a stream of reuse distance values; e) determining, for each reference in the reuse distance value stream, whether the reference results in a hit or a miss reference to the MATM to provide the number of hits and the number of misses for each MATM; f) providing the hit and miss values to a cost model to estimate the number of miss cycles; g) ranking the mappings by their miss cycle values such that the mapping with the lowest number of miss cycles has the highest rank.
摘要翻译：一种用于对存储器地址转换机制（MATM）的性能进行建模的方法包括：a）接收包含应用的存储器地址参考流，一组页面大小映射和关于应用的数据分配和de的事件的执行简档分配; b）通过咨询存储器分配和解除分配事件来将输入存储器参考流中的每个存储器引用转换成对相应数据对象的引用，以提供数据对象引用流; c）通过参考所述页面大小映射并且根据所述映射对所述数据分配和解除分配事件进行建模来将每个数据对象引用转换成对应的页面引用，以提供页面引用流和每页页面大小的页数需要通过各自的映射; d）使用页面参考流来提供重用距离值流; e）针对重用距离值流中的每个参考，确定参考是否导致对MATM的命中或错过引用以提供每个MATM的命中次数和未命中次数; f）向成本模型提供命中和未命中值以估计错过周期数; g）通过它们的错误循环值对映射进行排序，使得具有最低错误周期数的映射具有最高等级。

4. 发明申请

US20080162889A1 METHOD AND APPARATUS FOR IMPLEMENTING EFFICIENT DATA DEPENDENCE TRACKING FOR MULTIPROCESSOR ARCHITECTURES 审中-公开
标题翻译：用于实施多处理器架构的有效数据依赖跟踪的方法和装置
公开(公告)号：US20080162889A1
公开(公告)日：2008-07-03
申请号：US11619355
申请日：2007-01-03
申请人： Gheorghe Calin Cascaval , Luis Henrique Ceze
发明人： Gheorghe Calin Cascaval , Luis Henrique Ceze
IPC分类号： G06F9/312
CPC分类号： G06F9/3834 , G06F9/3838 , G06F9/3842 , G06F9/3851
摘要： A system for tracking memory dependencies includes a speculative thread management unit, which uses a bit vector to record and encode addresses of memory access. The speculative thread management unit includes a hashing unit that partitions the addresses into a load hash set and a store hash set, a load hash set unit for storing the load hash set, a store hash set unit for storing the store hash set, and a data dependence checking unit that checks data dependence when a thread completes, by comparing a load hash set of the thread to a store hash set of other threads.
摘要翻译：用于跟踪存储器依赖性的系统包括推测性线程管理单元，其使用位向量来记录和编码存储器访问的地址。推测线程管理单元包括将地址分割成加载散列集和存储哈希集合的哈希单元，用于存储加载哈希集合的加载哈希集合单元，用于存储存储哈希集合的存储哈希集合单元，以及数据相关性检查单元，通过将线程的加载散列集合与其他线程的存储哈希集进行比较来检查线程完成时的数据依赖性。

5. 发明授权

US08886887B2 Uniform external and internal interfaces for delinquent memory operations to facilitate cache optimization 有权
标题翻译：统一的外部和内部接口，用于违规内存操作，以方便缓存优化
公开(公告)号：US08886887B2
公开(公告)日：2014-11-11
申请号：US11686543
申请日：2007-03-15
申请人： Gheorghe Calin Cascaval , Yaoqing Gao , Allen Russell Martin , Mark Peter Mendell
发明人： Gheorghe Calin Cascaval , Yaoqing Gao , Allen Russell Martin , Mark Peter Mendell
IPC分类号： G06F9/45
CPC分类号： G06F8/4442 , G06F2212/6028
摘要： A computer implemented method, software infrastructure and computer usable program code for improving application performance. A delinquent memory operation instruction is identified. A delinquent memory operation instruction is an instruction associated with cache misses that exceeds a threshold number of cache misses. A directive is inserted in a code region associated with the delinquent memory operation to form annotated code. The directive indicates an address of the delinquent memory operation instruction and a number of memory latency cycles expected to be required for the delinquent memory operation instruction to execute. The information included in the annotated code is used to optimize execution of an application associated with the delinquent memory operation instruction.
摘要翻译：计算机实现的方法，软件基础设施和计算机可用程序代码，以提高应用程序性能。识别违规记忆操作指令。违规存储器操作指令是与超过阈值数量的高速缓存未命中的高速缓存未命中相关联的指令。一个指令被插入到与违规存储器操作相关联的代码区域中以形成注释代码。该指令指示拖欠存储器操作指令的地址和预期执行的拖欠存储器操作指令所需要的多个存储器延迟周期。包含在注释代码中的信息用于优化与拖欠存储器操作指令相关联的应用的执行。

6. 发明申请

US20080229028A1 UNIFORM EXTERNAL AND INTERNAL INTERFACES FOR DELINQUENT MEMORY OPERATIONS TO FACILITATE CACHE OPTIMIZATION 有权
标题翻译：统一的外部和内部接口，用于缓解高速缓存优化的不间断内存操作
公开(公告)号：US20080229028A1
公开(公告)日：2008-09-18
申请号：US11686543
申请日：2007-03-15
申请人： Gheorghe Calin Cascaval , Yaoqing Gao , Allen Russell Martin , Mark Peter Mendell
发明人： Gheorghe Calin Cascaval , Yaoqing Gao , Allen Russell Martin , Mark Peter Mendell
IPC分类号： G06F13/00
CPC分类号： G06F8/4442 , G06F2212/6028
摘要： A computer implemented method, software infrastructure and computer usable program code for improving application performance. A delinquent memory operation instruction is identified. A delinquent memory operation instruction is an instruction associated with cache misses that exceeds a threshold number of cache misses. A directive is inserted in a code region associated with the delinquent memory operation to form annotated code. The directive indicates an address of the delinquent memory operation instruction and a number of memory latency cycles expected to be required for the delinquent memory operation instruction to execute. The information included in the annotated code is used to optimize execution of an application associated with the delinquent memory operation instruction.
摘要翻译：计算机实现的方法，软件基础设施和计算机可用程序代码，用于提高应用程序性能。识别违规记忆操作指令。违规存储器操作指令是与超过阈值数量的高速缓存未命中的高速缓存未命中相关联的指令。一个指令被插入到与违规存储器操作相关联的代码区域中以形成注释代码。该指令指示拖欠存储器操作指令的地址和预期执行的拖欠存储器操作指令所需要的多个存储器延迟周期。包含在注释代码中的信息用于优化与拖欠存储器操作指令相关联的应用的执行。

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