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1. 发明申请

US20050139934A1 Semiconductor devices and fabrication methods thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20050139934A1
公开(公告)日：2005-06-30
申请号：US10852823
申请日：2004-05-25
申请人： Han-Choon Lee , Jin-Woo Park
发明人： Han-Choon Lee , Jin-Woo Park
IPC分类号： H01L21/335 , H01L21/28 , H01L21/285 , H01L21/321 , H01L21/336 , H01L31/062
CPC分类号： H01L21/28052 , H01L21/28518 , H01L21/321 , H01L29/665
摘要： Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer is formed on each of the gate electrode, the source region, and the drain region. The metal silicide layer has a thickness uniformity of about 1˜20%. A disclosed fabrication method includes forming a metal layer on a silicon substrate having a gate electrode, a source region, and a drain region; performing a plasma treatment on the metal layer; forming a protective layer on the metal layer; and heat treating the silicon substrate on which the protective layer is formed to thereby form a metal silicide layer. A gas that includes nitrogen is used as a plasma gas during the plasma treatment.
摘要翻译：公开了制造半导体器件的半导体器件和方法。所公开的半导体器件包括硅衬底，源极区和漏极区。在硅衬底上形成栅电极。而且，在栅极电极，源极区域和漏极区域中的每一个上形成金属硅化物层。金属硅化物层的厚度均匀度为约1〜20％。所公开的制造方法包括在具有栅电极，源极区和漏极区的硅衬底上形成金属层; 对金属层进行等离子体处理; 在金属层上形成保护层; 对其上形成保护层的硅衬底进行热处理从而形成金属硅化物层。在等离子体处理期间，使用包含氮气的气体作为等离子体气体。

2. 发明申请

US20090184377A1 Semiconductor devices and fabrication methods thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090184377A1
公开(公告)日：2009-07-23
申请号：US11982582
申请日：2007-11-01
申请人： Han-Choon Lee , Jin-Woo Park
发明人： Han-Choon Lee , Jin-Woo Park
IPC分类号： H01L29/78
CPC分类号： H01L21/28052 , H01L21/28518 , H01L21/321 , H01L29/665
摘要： Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer is formed on each of the gate electrode, the source region, and the drain region. The metal silicide layer has a thickness uniformity of about 1˜20%. A disclosed fabrication method includes forming a metal layer on a silicon substrate having a gate electrode, a source region, and a drain region; performing a plasma treatment on the metal layer; forming a protective layer on the metal layer; and heat treating the silicon substrate on which the protective layer is formed to thereby form a metal silicide layer. A gas that includes nitrogen is used as a plasma gas during the plasma treatment.
摘要翻译：公开了制造半导体器件的半导体器件和方法。所公开的半导体器件包括硅衬底，源极区和漏极区。在硅衬底上形成栅电极。而且，在栅极电极，源极区域和漏极区域中的每一个上形成金属硅化物层。金属硅化物层的厚度均匀度为约1〜20％。所公开的制造方法包括在具有栅电极，源极区和漏极区的硅衬底上形成金属层; 对金属层进行等离子体处理; 在金属层上形成保护层; 对其上形成保护层的硅衬底进行热处理从而形成金属硅化物层。在等离子体处理期间，使用包含氮气的气体作为等离子体气体。

3. 发明申请

US20050142845A1 Method of forming plug of semiconductor device 失效
标题翻译：形成半导体器件插头的方法
公开(公告)号：US20050142845A1
公开(公告)日：2005-06-30
申请号：US11027408
申请日：2004-12-30
申请人： Han-Choon Lee , Jin-Woo Park
发明人： Han-Choon Lee , Jin-Woo Park
IPC分类号： H01L21/283 , H01L21/4763 , H01L21/768
CPC分类号： H01L21/76838
摘要： A method for forming a plug of a semiconductor device according to a preferred embodiment includes forming a metal wiring on a semiconductor substrate, forming an interlayer dielectric layer on the semiconductor substrate having the metal wiring, forming a contact hole for partially exposing the metal wiring by selectively etching the interlayer dielectric layer, annealing the semiconductor substrate having the contact hole using NH3 gas, plasma processing the annealed semiconductor substrate using the NH3, and forming a barrier layer on the interlayer dielectric layer having the contact hole.
摘要翻译：根据优选实施例的形成半导体器件的插头的方法包括在半导体衬底上形成金属布线，在具有金属布线的半导体衬底上形成层间电介质层，形成用于部分地暴露金属布线的接触孔选择性地蚀刻层间电介质层，使用NH 3气体退火具有接触孔的半导体衬底，使用NH 3等离子体处理退火的半导体衬底，以及形成阻挡层在具有接触孔的层间绝缘层上。

4. 发明授权

US07811928B2 Semiconductor devices and fabrication methods thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US07811928B2
公开(公告)日：2010-10-12
申请号：US11982582
申请日：2007-11-01
申请人： Han-Choon Lee , Jin-Woo Park
发明人： Han-Choon Lee , Jin-Woo Park
IPC分类号： H01L21/4763
CPC分类号： H01L21/28052 , H01L21/28518 , H01L21/321 , H01L29/665
摘要： Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer is formed on each of the gate electrode, the source region, and the drain region. The metal silicide layer has a thickness uniformity of about 1˜20%. A disclosed fabrication method includes forming a metal layer on a silicon substrate having a gate electrode, a source region, and a drain region; performing a plasma treatment on the metal layer; forming a protective layer on the metal layer; and heat treating the silicon substrate on which the protective layer is formed to thereby form a metal silicide layer. A gas that includes nitrogen is used as a plasma gas during the plasma treatment.
摘要翻译：公开了制造半导体器件的半导体器件和方法。所公开的半导体器件包括硅衬底，源极区和漏极区。在硅衬底上形成栅电极。而且，在栅极电极，源极区域和漏极区域中的每一个上形成金属硅化物层。金属硅化物层的厚度均匀度为约1〜20％。所公开的制造方法包括在具有栅电极，源极区和漏极区的硅衬底上形成金属层; 对金属层进行等离子体处理; 在金属层上形成保护层; 对其上形成保护层的硅衬底进行热处理从而形成金属硅化物层。在等离子体处理期间，使用包含氮气的气体作为等离子体气体。

5. 发明授权

US07442639B2 Method of forming plug of semiconductor device 失效
标题翻译：形成半导体器件插头的方法
公开(公告)号：US07442639B2
公开(公告)日：2008-10-28
申请号：US11027408
申请日：2004-12-30
申请人： Han-Choon Lee , Jin-Woo Park
发明人： Han-Choon Lee , Jin-Woo Park
IPC分类号： H01L21/4763
CPC分类号： H01L21/76838
摘要： A method for forming a plug of a semiconductor device according to a preferred embodiment includes forming a metal wiring on a semiconductor substrate, forming an interlayer dielectric layer on the semiconductor substrate having the metal wiring, forming a contact hole for partially exposing the metal wiring by selectively etching the interlayer dielectric layer, annealing the semiconductor substrate having the contact hole using NH3 gas, plasma processing the annealed semiconductor substrate using the NH3, and forming a barrier layer on the interlayer dielectric layer having the contact hole.
摘要翻译：根据优选实施例的形成半导体器件的插头的方法包括在半导体衬底上形成金属布线，在具有金属布线的半导体衬底上形成层间电介质层，形成用于部分地暴露金属布线的接触孔选择性地蚀刻层间电介质层，使用NH 3气体退火具有接触孔的半导体衬底，使用NH 3等离子体处理退火的半导体衬底，以及形成阻挡层在具有接触孔的层间绝缘层上。

6. 发明授权

US07307017B2 Semiconductor devices and fabrication methods thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US07307017B2
公开(公告)日：2007-12-11
申请号：US10852823
申请日：2004-05-25
申请人： Han-Choon Lee , Jin-Woo Park
发明人： Han-Choon Lee , Jin-Woo Park
IPC分类号： H01L21/4763
CPC分类号： H01L21/28052 , H01L21/28518 , H01L21/321 , H01L29/665
摘要： Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer is formed on each of the gate electrode, the source region, and the drain region. The metal silicide layer has a thickness uniformity of about 1˜20%. A disclosed fabrication method includes forming a metal layer on a silicon substrate having a gate electrode, a source region, and a drain region; performing a plasma treatment on the metal layer; forming a protective layer on the metal layer; and heat treating the silicon substrate on which the protective layer is formed to thereby form a metal silicide layer. A gas that includes nitrogen is used as a plasma gas during the plasma treatment.
摘要翻译：公开了制造半导体器件的半导体器件和方法。所公开的半导体器件包括硅衬底，源极区和漏极区。在硅衬底上形成栅电极。而且，在栅极电极，源极区域和漏极区域中的每一个上形成金属硅化物层。金属硅化物层的厚度均匀度为约1〜20％。所公开的制造方法包括在具有栅电极，源极区和漏极区的硅衬底上形成金属层; 对金属层进行等离子体处理; 在金属层上形成保护层; 对其上形成保护层的硅衬底进行热处理从而形成金属硅化物层。在等离子体处理期间，使用包含氮气的气体作为等离子体气体。

7. 发明授权

US07858515B2 Method for forming metal line in semiconductor device 失效
标题翻译：在半导体器件中形成金属线的方法
公开(公告)号：US07858515B2
公开(公告)日：2010-12-28
申请号：US12247517
申请日：2008-10-08
申请人： Han-Choon Lee
发明人： Han-Choon Lee
IPC分类号： H01L21/4763
CPC分类号： H01L21/76838 , H01L21/02071 , H01L21/32136 , H01L21/32139
摘要： A method for forming a metal line in a semiconductor device may include forming a silicon (Si) monolayer as an etching prevention layer over an exposed portion of a lower metal layer and sidewalls of an upper metal layer, middle metal layer, and the entire surface of curved photoresist patterns.
摘要翻译：在半导体器件中形成金属线的方法可以包括在下金属层的暴露部分和上金属层，中间金属层和整个表面的侧壁上形成硅（Si）单层作为防蚀刻层的弯曲光刻胶图案。

8. 发明授权

US07645699B2 Method of forming a diffusion barrier layer using a TaSiN layer and method of forming a metal interconnection line using the same 失效
标题翻译：使用TaSiN层形成扩散阻挡层的方法和使用其形成金属互连线的方法
公开(公告)号：US07645699B2
公开(公告)日：2010-01-12
申请号：US11317362
申请日：2005-12-23
申请人： Han-Choon Lee
发明人： Han-Choon Lee
IPC分类号： H01L21/44
CPC分类号： H01L21/76856
摘要： The present invention provides a method of forming a diffusion barrier layer comprising a TaSiN layer. The method includes depositing a TaN layer into a via hole which penetrates an insulation layer exposing a first metal line layer, and transforming the TaN layer into a TaSiN layer using a radio frequency (RF) power and a (remote) plasma using SiH4 gas. Transforming the TaN layer into a TaSiN layer may include: loading a structure including the TaN layer into a plasma reaction chamber; injecting SiH4 gas into the plasma reaction chamber; and forming the TaSiN layer by reacting Si— or Si atom-containing species with the TaN layer.
摘要翻译：本发明提供一种形成包含TaSiN层的扩散阻挡层的方法。该方法包括将TaN层沉积到穿透暴露第一金属线层的绝缘层的通孔中，并且使用射频（RF）功率和（远程）等离子体使用SiH 4气体将TaN层转变成TaSiN层。将TaN层转变成TaSiN层可以包括：将包括TaN层的结构加载到等离子体反应室中; 将SiH 4气体注入等离子体反应室; 并通过使含Si或Si原子的物质与TaN层反应形成TaSiN层。

9. 发明申请

US20090101949A1 IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：图像传感器及其制造方法
公开(公告)号：US20090101949A1
公开(公告)日：2009-04-23
申请号：US12249936
申请日：2008-10-12
申请人： In-Cheol Back , Han-Choon Lee
发明人： In-Cheol Back , Han-Choon Lee
IPC分类号： H01L27/146 , H01L31/18
CPC分类号： H01L27/1462 , H01L27/14629 , H01L27/14632 , H01L27/14687
摘要： An image sensor having maximized photosensitivity includes a photodiode and a transistor formed over the semiconductor substrate. A first passivation layer is formed over the semiconductor substrate including the transistor and the photodiode, a pre-metal dielectric layer formed over the first passivation layer and insulating layers having metal wirings formed over the pre-metal dielectric layer. A trench is formed in the insulating layers and the pre-metal dielectric layer exposing a portion of the first passivation layer formed over the photodiode while a second passivation layer formed on sidewalls and a bottom of the trench and over the uppermost surface of the insulating layer such that the second passivation layer directly contacts the portion of the first passivation layer formed over the photodiode. A photosensitive material is then formed over the second passivation layer and buried in the trench.
摘要翻译：具有最大光敏性的图像传感器包括形成在半导体衬底上的光电二极管和晶体管。在包括晶体管和光电二极管的半导体衬底上形成第一钝化层，形成在第一钝化层上的预金属介电层和在金属前介电层上形成金属布线的绝缘层。在绝缘层中形成沟槽，并且预金属电介质层暴露出形成在光电二极管上的第一钝化层的一部分，而形成在沟槽的侧壁和底部上并在绝缘层的最上表面上的第二钝化层使得第二钝化层直接接触形成在光电二极管上的第一钝化层的部分。然后在第二钝化层上形成感光材料并将其埋在沟槽中。

10. 发明申请

US20070155163A1 Method for fabricating a thin film and a metal line of a semiconductor device 有权
标题翻译：用于制造半导体器件的薄膜和金属线的方法
公开(公告)号：US20070155163A1
公开(公告)日：2007-07-05
申请号：US11640916
申请日：2006-12-19
申请人： In-Cheol Baek , Han-Choon Lee
发明人： In-Cheol Baek , Han-Choon Lee
IPC分类号： H01L21/4763
CPC分类号： H01L21/76843 , H01L21/76861
摘要： A method for forming a thin film of a semiconductor device is provided. The method includes forming a TaN film on a semiconductor substrate by employing an atomic layer deposition method; and converting a part of the TaN film into a Ta by reacting the TaN film with NO2 to form a Ta film. The NO2 is formed by reacting NH3 with O2.
摘要翻译：提供一种形成半导体器件的薄膜的方法。该方法包括使用原子层沉积法在半导体衬底上形成TaN膜; 并通过使TaN膜与NO 2 2反应而将TaN膜的一部分转化成Ta，以形成Ta膜。 NO 2是通过使NH 3与O 2 2反应而形成的。

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