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1. 发明授权

US07915650B2 Thin-film transistor, array substrate having the thin-film transistor and method of manufacturing the array substrate 有权
标题翻译：薄膜晶体管，具有薄膜晶体管的阵列基板和制造阵列基板的方法
公开(公告)号：US07915650B2
公开(公告)日：2011-03-29
申请号：US11930502
申请日：2007-10-31
申请人： Je Hun Lee , Do Hyun Kim , Eun Guk Lee , Chang Oh Jeong
发明人： Je Hun Lee , Do Hyun Kim , Eun Guk Lee , Chang Oh Jeong
IPC分类号： H01L29/80 , H01L31/112
CPC分类号： H01L29/7869 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L27/1288
摘要： A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.
摘要翻译：薄膜晶体管包括半导体图案，源极和漏极以及栅极，半导体图案形成在基底基板上，半导体图案包括金属氧化物。源极和漏极形成在半导体图案上，使得源极和漏极彼此间隔开，并且源极和漏极的轮廓与半导体图案的轮廓基本相同。栅电极设置在源电极和漏电极之间的区域中，使得栅电极的一部分与源电极和漏电极重叠。因此，由光引起的漏电流最小化。结果，增强了薄膜晶体管的特性，减少了后图像以提高显示质量，并且提高了制造工艺的稳定性。

2. 发明授权

US07276732B2 Thin film transistor array panel 有权
标题翻译：薄膜晶体管阵列面板
公开(公告)号：US07276732B2
公开(公告)日：2007-10-02
申请号：US11234470
申请日：2005-09-23
申请人： Je Hun Lee , Yang Ho Bae , Beom Seok Cho , Chang Oh Jeong
发明人： Je Hun Lee , Yang Ho Bae , Beom Seok Cho , Chang Oh Jeong
IPC分类号： H01L29/04
CPC分类号： H01L29/458 , G02F1/1368 , H01L27/12 , H01L27/124 , H01L27/1288
摘要： A thin film transistor array panel includes a source electrode and a drain electrode composed of a Mo alloy layer and a Cu layer, and an alloying element of the Mo alloy layer forms a nitride layer as a diffusion barrier against the Cu layer. The nitride layer can be formed between the Mo alloy layer and the Cu layer, between the Mo alloy layer and the semiconductor layer or in the Mo alloy layer. A method of fabricating a thin film transistor array panel includes forming a data line having a first conductive layer and a second conductive layer, the first conductive layer containing a Mo alloy and the second conductive layer containing Cu, and performing a nitrogen treatment so that an alloying element in the first conductive layer forms a nitride layer. The nitrogen treatment can be performed before forming the first conductive layer, after forming the first conductive layer, or during forming the first conductive layer.
摘要翻译：薄膜晶体管阵列面板包括由Mo合金层和Cu层构成的源电极和漏电极，Mo合金层的合金元素形成氮化物层作为对Cu层的扩散阻挡层。可以在Mo合金层和Cu层之间，Mo合金层和半导体层之间或Mo合金层中形成氮化物层。制造薄膜晶体管阵列面板的方法包括：形成具有第一导电层和第二导电层的数据线，所述第一导电层含有Mo合金，所述第二导电层含有Cu，并进行氮处理，使得第一导电层中的合金元素形成氮化物层。在形成第一导电层之前，在形成第一导电层之后，或者在形成第一导电层期间，可以进行氮处理。

3. 发明授权

US07524706B2 Method of fabricating a thin film transistor array panel 有权
标题翻译：制造薄膜晶体管阵列面板的方法
公开(公告)号：US07524706B2
公开(公告)日：2009-04-28
申请号：US11844597
申请日：2007-08-24
申请人： Je Hun Lee , Yang Ho Bae , Beom Seok Cho , Chang Oh Jeong
发明人： Je Hun Lee , Yang Ho Bae , Beom Seok Cho , Chang Oh Jeong
IPC分类号： H01L21/00
CPC分类号： H01L29/458 , G02F1/1368 , H01L27/12 , H01L27/124 , H01L27/1288
摘要： A thin film transistor array panel includes a source electrode and a drain electrode composed of a Mo alloy layer and a Cu layer, and an alloying element of the Mo alloy layer forms a nitride layer as a diffusion barrier against the Cu layer. The nitride layer can be formed between the Mo alloy layer and the Cu layer, between the Mo alloy layer and the semiconductor layer or in the Mo alloy layer. A method of fabricating a thin film transistor array panel includes forming a data line having a first conductive layer and a second conductive layer, the first conductive layer containing a Mo alloy and the second conductive layer containing Cu, and performing a nitrogen treatment so that an alloying element in the first conductive layer forms a nitride layer. The nitrogen treatment can be performed before forming the first conductive layer, after forming the first conductive layer, or during forming the first conductive layer.
摘要翻译：薄膜晶体管阵列面板包括由Mo合金层和Cu层构成的源电极和漏电极，Mo合金层的合金元素形成氮化物层作为对Cu层的扩散阻挡层。可以在Mo合金层和Cu层之间，Mo合金层和半导体层之间或Mo合金层中形成氮化物层。制造薄膜晶体管阵列面板的方法包括：形成具有第一导电层和第二导电层的数据线，所述第一导电层含有Mo合金，所述第二导电层含有Cu，并进行氮处理，使得第一导电层中的合金元素形成氮化物层。在形成第一导电层之前，在形成第一导电层之后，或者在形成第一导电层期间，可以进行氮处理。

4. 发明授权

US08686426B2 Thin film transistor having plural semiconductive oxides, thin film transistor array panel and display device including the same, and manufacturing method of thin film transistor 有权
标题翻译：具有多个半导体氧化物的薄膜晶体管，薄膜晶体管阵列面板及包括该半导体氧化物的显示装置以及薄膜晶体管的制造方法
公开(公告)号：US08686426B2
公开(公告)日：2014-04-01
申请号：US13555889
申请日：2012-07-23
申请人： Byung Du Ahn , Ji Hun Lim , Gun Hee Kim , Kyoung Won Lee , Je Hun Lee
发明人： Byung Du Ahn , Ji Hun Lim , Gun Hee Kim , Kyoung Won Lee , Je Hun Lee
IPC分类号： H01L27/14
CPC分类号： H01L29/7869 , H01L29/78696
摘要： A plural semiconductive oxides TFT (sos-TFT) provides improved electrical functionality in terms of charge-carrier mobility and/or threshold voltage variability. The sos-TFT may be used to form a thin film transistor array panel for display devices. An example sos-TFT includes: an insulated gate electrode; a first semiconductive oxide layer having a composition including a first semiconductive oxide; and a second semiconductive oxide layer having a different composition that also includes a semiconductive oxide. The first and second semiconductive oxide layers have respective channel regions that are capacitively influenced by a control voltage applied to the gate electrode. In one embodiment, the second semiconductive oxide layer includes at least one additional element that is not included in the first semiconductive oxide layer where the additional element is one of gallium (Ga), silicon (Si), niobium (Nb), hafnium (Hf), and germanium (Ge).
摘要翻译：多个半导体氧化物TFT（sos-TFT）在电荷载流子迁移率和/或阈值电压变化性方面提供改进的电功能。 sos-TFT可以用于形成用于显示装置的薄膜晶体管阵列面板。示例sos-TFT包括：绝缘栅电极; 具有包含第一半导体氧化物的组成的第一半导体氧化物层; 以及具有不同组成的第二半导体氧化物层，其还包括半导体氧化物。第一和第二半导体氧化物层具有由施加到栅电极的控制电压的电容性影响的各个沟道区。在一个实施例中，第二半导体氧化物层包括至少一个附加元件，其不包括在第一半导体氧化物层中，其中附加元素是镓（Ga），硅（Si），铌（Nb），铪（Hf ）和锗（Ge）。

5. 发明申请

US20130248855A1 OXIDE FOR SEMICONDUCTOR LAYER OF THIN-FILM TRANSISTOR, SPUTTERING TARGET, AND THIN-FILM TRANSISTOR 有权
标题翻译：薄膜晶体管，溅射靶和薄膜晶体管半导体层的氧化物
公开(公告)号：US20130248855A1
公开(公告)日：2013-09-26
申请号：US13989944
申请日：2011-11-28
申请人： Aya Miki , Shinya Morita , Toshihiro Kugimiya , Satoshi Yasuno , Jae Woo Park , Je Hun Lee , Byung Du Ahn , Gun Hee Kim
发明人： Aya Miki , Shinya Morita , Toshihiro Kugimiya , Satoshi Yasuno , Jae Woo Park , Je Hun Lee , Byung Du Ahn , Gun Hee Kim
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , C01G19/006 , C01P2006/10 , C04B35/01 , C04B35/453 , C04B35/457 , C04B2235/3284 , C04B2235/3286 , C04B2235/3293 , C23C14/086 , C23C14/3407 , C23C14/548 , C23C14/5806 , C23C14/5873 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1225 , H01L29/78693
摘要： This oxide for a semiconductor layer of a thin-film transistor contains Zn, Sn and In, and the content (at %) of the metal elements contained in the oxide satisfies formulas (1) to (3) when denoted as [Zn], [Sn] and [In], respectively. [In]/([In]+[Zn]+[Sn])≧−0.53×[Zn]/([Zn]+[Sn])+0.36 (1) [In]/([In]+[Zn]+[Sn])≧2.28×[Zn]/([Zn]+[Sn])−2.01 (2) [In]/([In]+[Zn]+[Sn])≦1.1×[Zn]/([Zn]+[Sn])−0.32 (3) The present invention enables a thin-film transistor oxide that achieves high mobility and has excellent stress resistance (negligible threshold voltage shift before and after applying stress) to be provided.
摘要翻译：用于薄膜晶体管的半导体层的氧化物含有Zn，Sn和In，并且当表示为[Zn]时，包含在氧化物中的金属元素的含量（at％）满足式（1）至（3） [Sn]和[In]。 [In] /（[In] + [Zn] + [Sn]）> = - 0.53×[Zn] /（[Zn] + [Sn]）+ 0.36（1）[In] Zn] + [Sn]）> = 2.28×[Zn] /（[Zn] + [Sn]）-2.01（2）[In] /（[In] + [Zn] + [Sn] Zn] /（[Zn] + [Sn]） - 0.32（3）本发明使得能够提供实现高迁移率且具有优异的应力阻力（施加应力之前和之后的阈值电压偏移可忽略）的薄膜晶体管氧化物。

6. 发明授权

US08907334B2 Oxide for semiconductor layer of thin-film transistor, sputtering target, and thin-film transistor 有权
标题翻译：用于薄膜晶体管，溅射靶和薄膜晶体管的半导体层的氧化物
公开(公告)号：US08907334B2
公开(公告)日：2014-12-09
申请号：US13642314
申请日：2011-04-18
申请人： Aya Miki , Yumi Iwanari , Toshihiro Kugimiya , Shinya Morita , Yasuaki Terao , Satoshi Yasuno , Jae Woo Park , Je Hun Lee , Byung Du Ahn
发明人： Aya Miki , Yumi Iwanari , Toshihiro Kugimiya , Shinya Morita , Yasuaki Terao , Satoshi Yasuno , Jae Woo Park , Je Hun Lee , Byung Du Ahn
IPC分类号： H01L29/10 , H01L29/786 , H01L21/02 , H01L29/66
CPC分类号： H01L29/7869 , H01L21/02422 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L29/66742 , H01L29/66969 , H01L29/78693
摘要： Disclosed is an oxide for a semiconductor layer of a thin-film transistor, said oxide being excellent in the switching characteristics of a thin-film transistor, specifically enabling favorable characteristics to be stably obtained even in a region of which the ZnO concentration is high and even after forming a passivation layer and after applying stress. The oxide is used in a semiconductor layer of a thin-film transistor, and the aforementioned oxide contains Zn and Sn, and further contains at least one element selected from group X consisting of Al, Hf, Ta, Ti, Nb, Mg, Ga, and the rare-earth elements.
摘要翻译：公开了一种用于薄膜晶体管的半导体层的氧化物，所述氧化物的薄膜晶体管的开关特性优异，特别是即使在ZnO浓度高的区域也能够稳定地获得良好的特性，甚至在形成钝化层之后和施加应力之后。氧化物用于薄膜晶体管的半导体层，上述氧化物含有Zn和Sn，还含有选自由Al，Hf，Ta，Ti，Nb，Mg，Ga组成的组X中的至少一种元素，和稀土元素。

7. 发明申请

US20130099228A1 SOLUTION COMPOSITION FOR PASSIVATION LAYER, THIN FILM TRANSISTOR ARRAY PANEL, AND MANUFACTURING METHOD FOR THIN FILM TRANSISTOR ARRAY PANEL 有权
标题翻译：用于钝化层，薄膜晶体管阵列的解决方案组合物和薄膜晶体管阵列的制造方法
公开(公告)号：US20130099228A1
公开(公告)日：2013-04-25
申请号：US13534752
申请日：2012-06-27
申请人： Byung Du Ahn , Seung Ho Yeon , Sei-Yong Park , Mi-Hyae Park , Bu Sop Song , Tae Gweon Lee , Jun Hyun Park , Je Hun Lee , Jae Woo Park
发明人： Byung Du Ahn , Seung Ho Yeon , Sei-Yong Park , Mi-Hyae Park , Bu Sop Song , Tae Gweon Lee , Jun Hyun Park , Je Hun Lee , Jae Woo Park
IPC分类号： H01L29/786 , C08K5/103 , C08G77/20 , C08K5/06 , H01L21/42 , C08G77/12
CPC分类号： G03F7/0757 , C08G77/16 , C08G77/20 , C08G77/80 , C08L83/04 , G02F1/136227 , G03F7/16 , G03F7/20 , H01L23/296 , H01L27/1225 , H01L27/1248 , H01L27/1288 , H01L27/3258 , H01L29/517 , H01L2924/0002 , C08L83/00 , H01L2924/00
摘要： A passivation layer solution composition is provided. A passivation layer solution composition according to an exemplary embodiment of the present invention includes an organic siloxane resin represented by Chemical Formula 1 below. In Chemical Formula 1, R is at least one substituent selected from a saturated hydrocarbon or an unsaturated hydrocarbon having from 1 to about 25 carbon atoms, and x and y may each independently be from 1 to about 200, and wherein each wavy line indicates a bond to an H atom or to an x siloxane unit or a y siloxane unit, or a bond to an x siloxane unit or a y siloxane unit of another siloxane chain comprising x siloxane units or y siloxane units or a combination thereof.
摘要翻译：提供钝化层溶液组合物。根据本发明的示例性实施方案的钝化层溶液组合物包括由下述化学式1表示的有机硅氧烷树脂。在化学式1中，R是选自饱和烃或具有1至约25个碳原子的不饱和烃中的至少一个取代基，x和y各自独立地为1至约200，并且其中每个波浪线表示键合到H原子或x硅氧烷单元或硅氧烷单元，或与包含x硅氧烷单元或y硅氧烷单元或其组合的另一硅氧烷链的x硅氧烷单元或硅氧烷单元的键。

8. 发明授权

US09190523B2 Oxide semiconductor, thin film transistor including the same, and thin film transistor array panel including the same 有权
标题翻译：氧化物半导体，包括该氧化物半导体的薄膜晶体管和包括该氧化物半导体的薄膜晶体管阵列面板
公开(公告)号：US09190523B2
公开(公告)日：2015-11-17
申请号：US13554393
申请日：2012-07-20
申请人： Byung Du Ahn , Je Hun Lee , Sei-Yong Park , Jun Hyun Park , Gun Hee Kim , Ji Hun Lim , Jae Woo Park , Jin Seong Park , Toshihiro Kugimiya , Aya Miki , Shinya Morita , Tomoya Kishi , Hiroaki Tao
发明人： Byung Du Ahn , Je Hun Lee , Sei-Yong Park , Jun Hyun Park , Gun Hee Kim , Ji Hun Lim , Jae Woo Park , Jin Seong Park , Toshihiro Kugimiya , Aya Miki , Shinya Morita , Tomoya Kishi , Hiroaki Tao
IPC分类号： H01L29/786 , H01L21/02 , H01L29/66 , H01L27/12
CPC分类号： H01L29/7869 , H01L21/02565 , H01L27/1225 , H01L29/66969
摘要： An oxide semiconductor includes a first material including at least one selected from the group consisting of zinc (Zn) and tin (Sn), and a second material, where a value acquired by subtracting an electronegativity difference value between the second material and oxygen (O) from the electronegativity difference value between the first material and oxygen (O) is less than about 1.3.
摘要翻译：氧化物半导体包括包含选自锌（Zn）和锡（Sn）中的至少一种的第一材料和第二材料，其中通过减去第二材料和氧之间的电负性差值获得的值（O ）从第一材料和氧（O）之间的电负性差值小于约1.3。

9. 发明授权

US09093542B2 Thin-film transistor structure, as well as thin-film transistor and display device each having said structure 有权
标题翻译：薄膜晶体管结构，以及各自具有所述结构的薄膜晶体管和显示装置
公开(公告)号：US09093542B2
公开(公告)日：2015-07-28
申请号：US14113322
申请日：2012-04-19
申请人： Takeaki Maeda , Toshihiro Kugimiya , Jun Ho Song , Je Hun Lee , Byung Du Ahn , Gun Hee Kim
发明人： Takeaki Maeda , Toshihiro Kugimiya , Jun Ho Song , Je Hun Lee , Byung Du Ahn , Gun Hee Kim
IPC分类号： H01L29/10 , H01L29/786 , G02F1/1368 , H01L27/12
CPC分类号： H01L29/7869 , G02F1/1368 , H01L27/1222 , H01L29/78693
摘要： There is provided an oxide semiconductor layer capable of making stable the electric characteristics of a thin-film transistor without requiring an oxidatively-treated layer when depositing a passivation layer or the like in display devices such as organic EL displays and liquid crystal displays. The thin-film transistor structure of the present invention at least having, on a substrate, an oxide semiconductor layer, a source-drain electrode, and a passivation layer in order from the substrate side, wherein the oxide semiconductor layer is a stacked product of a first oxide semiconductor layer and a second oxide semiconductor layer; the first oxide semiconductor layer has a Zn content of 50 atomic % or more as a percentage of all metal elements contained therein, and the first oxide semiconductor layer is formed on the source-drain electrode and passivation layer side; the second oxide semiconductor layer contains Sn and at least one element selected from the group consisting of In, Ga, and Zn, and the second oxide semiconductor layer is formed on the substrate side; and the first oxide semiconductor layer is in direct contact both with the source-drain electrode and with the passivation layer.
摘要翻译：提供了一种氧化物半导体层，当在有机EL显示器和液晶显示器等显示装置中沉积钝化层等时，能够使薄膜晶体管的电特性稳定，而不需要氧化处理层。本发明的薄膜晶体管结构至少在衬底上具有氧化物半导体层，源 - 漏电极和钝化层，从衬底侧开始，其中氧化物半导体层是第一氧化物半导体层和第二氧化物半导体层; 第一氧化物半导体层的Zn含量占所有金属元素的百分比为50原子％以上，第一氧化物半导体层形成在源 - 漏电极和钝化层侧; 所述第二氧化物半导体层含有Sn和选自In，Ga和Zn中的至少一种元素，并且所述第二氧化物半导体层形成在所述基板侧; 并且第一氧化物半导体层与源 - 漏电极和钝化层直接接触。

10. 发明授权

US09299474B2 Oxide for semiconductor layer of thin-film transistor, sputtering target, and thin-film transistor 有权
标题翻译：用于薄膜晶体管，溅射靶和薄膜晶体管的半导体层的氧化物
公开(公告)号：US09299474B2
公开(公告)日：2016-03-29
申请号：US13812277
申请日：2011-07-28
申请人： Shinya Morita , Aya Miki , Yumi Iwanari , Toshihiro Kugimiya , Satoshi Yasuno , Jae Woo Park , Je Hun Lee , Byung Du Ahn
发明人： Shinya Morita , Aya Miki , Yumi Iwanari , Toshihiro Kugimiya , Satoshi Yasuno , Jae Woo Park , Je Hun Lee , Byung Du Ahn
IPC分类号： H01B1/08 , H01L29/24 , C23C14/08 , H01L21/02 , H01L29/786
CPC分类号： H01B1/08 , C23C14/08 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L29/24 , H01L29/7869
摘要： There is provided an oxide for semiconductor layers of thin-film transistors, which oxide can provide thin-film transistors with excellent switching characteristics and by which oxide favorable characteristics can stably be obtained even after the formation of passivation layers. The oxide to be used for semiconductor layers of thin-film transistors according to the present invention includes Zn, Sn, and Si.
摘要翻译：提供了用于薄膜晶体管的半导体层的氧化物，该氧化物可以提供具有优异的开关特性的薄膜晶体管，并且即使在形成钝化层之后也可以稳定地获得氧化物有利特性。根据本发明的用于薄膜晶体管的半导体层的氧化物包括Zn，Sn和Si。

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