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1. 发明申请

US20140369217A1 METHOD AND APPARATUS FOR ALLOCATING MINIMUM GUARANTEED RESOURCE AMOUNT TO ACCESS POINT IN WIRELESS ACCESS SYSTEM 有权
标题翻译：在无线访问系统中分配最小保障资源到接入点的方法和装置
公开(公告)号：US20140369217A1
公开(公告)日：2014-12-18
申请号：US14344288
申请日：2011-12-14
申请人： Ji Hwan Kim , Byoung Hoon Kim , Jeonghoon Mo , Jeong Ho Kwak , Jae Won Lim , Song Chong
发明人： Ji Hwan Kim , Byoung Hoon Kim , Jeonghoon Mo , Jeong Ho Kwak , Jae Won Lim , Song Chong
IPC分类号： H04W72/08 , H04W24/08
CPC分类号： H04W72/082 , H04W16/12 , H04W24/08 , H04W72/0493
摘要： The present invention relates to a method in which an upper layer entity allocates resources to a plurality of access points (APs) in a wireless access system, including the plurality of APs and the upper layer entity for managing the plurality of APs, the method comprising the step of: sensing a change in minimum guaranteed resource amount allocated to each of the APs; acquiring, from each of the APs, AP-level topology information according to a degree of interference with adjacent APs and AP weight information given to each AP by a service provider; determining a minimum guaranteed resource amount for each of the APs based on the acquired AP-level topology information and AP weight information; and transmitting the determined minimum guaranteed resource amount to each of the APs.
摘要翻译：本发明涉及一种方法，其中上层实体向无线接入系统中的多个接入点（AP）分配资源，包括多个AP和用于管理多个AP的上层实体，该方法包括：检测分配给每个AP的最小保证资源量的变化的步骤; 从每个AP获取根据与相邻AP的干扰程度的AP级拓扑信息和由服务提供商给予每个AP的AP权重信息; 基于获取的AP级拓扑信息和AP权重信息确定每个AP的最小保证资源量; 以及将确定的最小保证资源量发送给每个AP。

2. 发明授权

US09585157B2 Method and apparatus for allocating minimum guaranteed resource amount to access point in wireless access system 有权
标题翻译：在无线接入系统中为接入点分配最小保证资源量的方法和装置
公开(公告)号：US09585157B2
公开(公告)日：2017-02-28
申请号：US14344288
申请日：2011-12-14
申请人： Ji Hwan Kim , Byoung Hoon Kim , Jeonghoon Mo , Jeong Ho Kwak , Jae Won Lim , Song Chong
发明人： Ji Hwan Kim , Byoung Hoon Kim , Jeonghoon Mo , Jeong Ho Kwak , Jae Won Lim , Song Chong
IPC分类号： H04W72/08 , H04W16/12 , H04W24/08 , H04W72/04
CPC分类号： H04W72/082 , H04W16/12 , H04W24/08 , H04W72/0493
摘要： The present invention relates to a method in which an upper layer entity allocates resources to a plurality of access points (APs) in a wireless access system, including the plurality of APs and the upper layer entity for managing the plurality of APs, the method comprising the step of: sensing a change in minimum guaranteed resource amount allocated to each of the APs; acquiring, from each of the APs, AP-level topology information according to a degree of interference with adjacent APs and AP weight information given to each AP by a service provider; determining a minimum guaranteed resource amount for each of the APs based on the acquired AP-level topology information and AP weight information; and transmitting the determined minimum guaranteed resource amount to each of the APs.
摘要翻译：本发明涉及一种方法，其中上层实体向无线接入系统中的多个接入点（AP）分配资源，包括多个AP和用于管理多个AP的上层实体，该方法包括：检测分配给每个AP的最小保证资源量的变化的步骤; 从每个AP获取根据与相邻AP的干扰程度的AP级拓扑信息和由服务提供商给予每个AP的AP权重信息; 基于获取的AP级拓扑信息和AP权重信息确定每个AP的最小保证资源量; 以及将确定的最小保证资源量发送给每个AP。

3. 发明授权

US09451395B2 Method and apparatus for measuring a position in a wireless access system 有权
标题翻译：用于测量无线接入系统中的位置的方法和装置
公开(公告)号：US09451395B2
公开(公告)日：2016-09-20
申请号：US14344275
申请日：2011-12-14
申请人： Jeong Ho Kwak , Byoung Hoon Kim , Jeonghoon Mo , Ji Hwan Kim , Jae Won Lim , Song Chong
发明人： Jeong Ho Kwak , Byoung Hoon Kim , Jeonghoon Mo , Ji Hwan Kim , Jae Won Lim , Song Chong
IPC分类号： H04W4/02 , G01S5/02 , H04W64/00
CPC分类号： H04W4/02 , G01S5/02 , G01S5/0205 , H04W64/003
摘要： The present invention relates to a method in which a first station receives position information using a second station positioned in the vicinity of the first station. The method includes the steps of: receiving a station identifier (STID) and at least one fake identifier (ID) from a base station; obtaining a fake ID of the second station; requesting position information on the second station from the base station using the fake ID of the obtained second station; and receiving the position information on the second station of the base station, wherein the fake ID is an identifier used for position measurement and is mapped to the STID.
摘要翻译：本发明涉及使用位于第一站附近的第二站接收位置信息的方法。该方法包括以下步骤：从基站接收站标识符（STID）和至少一个假标识符（ID）; 获得第二站的假ID; 使用所获得的第二站的假ID从基站请求位于第二站的位置信息; 以及在所述基站的所述第二站上接收所述位置信息，其中所述假ID是用于位置测量的标识符，并被映射到所述STID。

4. 发明申请

US20140342750A1 METHOD AND APPARATUS FOR MEASURING A POSITION IN A WIRELESS ACCESS SYSTEM 有权
标题翻译：用于测量无线接入系统中的位置的方法和装置
公开(公告)号：US20140342750A1
公开(公告)日：2014-11-20
申请号：US14344275
申请日：2011-12-14
申请人： Jeong Ho Kwak , Byoung Hoon Kim , Jeonghoon Mo , Ji Hwan Kim , Jae Won Lim , Song Chong
发明人： Jeong Ho Kwak , Byoung Hoon Kim , Jeonghoon Mo , Ji Hwan Kim , Jae Won Lim , Song Chong
IPC分类号： H04W4/02
CPC分类号： H04W4/02 , G01S5/02 , G01S5/0205 , H04W64/003
摘要： The present invention relates to a method in which a first station receives position information using a second station positioned in the vicinity of the first station. The method includes the steps of: receiving a station identifier (STID) and at least one fake identifier (ID) from a base station; obtaining a fake ID of the second station; requesting position information on the second station from the base station using the fake ID of the obtained second station; and receiving the position information on the second station of the base station, wherein the fake ID is an identifier used for position measurement and is mapped to the STID.
摘要翻译：本发明涉及使用位于第一站附近的第二站接收位置信息的方法。该方法包括以下步骤：从基站接收站标识符（STID）和至少一个假标识符（ID）; 获得第二站的假ID; 使用所获得的第二站的假ID从基站请求位于第二站的位置信息; 以及在所述基站的所述第二站上接收所述位置信息，其中所述假ID是用于位置测量的标识符，并被映射到所述STID。

5. 发明授权

US08576600B2 Semiconductor memory device and operating method thereof 有权
标题翻译：半导体存储器件及其操作方法
公开(公告)号：US08576600B2
公开(公告)日：2013-11-05
申请号：US13420038
申请日：2012-03-14
申请人： Jung Hwan Lee , Seong Je Park , Ji Hwan Kim , Myung Cho , Beom Seok Hah
发明人： Jung Hwan Lee , Seong Je Park , Ji Hwan Kim , Myung Cho , Beom Seok Hah
IPC分类号： G11C15/00
CPC分类号： G11C15/046 , G11C16/10
摘要： A semiconductor memory device includes a memory array configured to include memory cells for storing input data and Code Address Memory (CAM) cells for storing setting data used to set an operation condition; an operation circuit configured to perform a CAM read operation by supplying a read voltage to the CAM cells, perform a test operation for detecting unstable CAM cells in each of which a difference between a threshold voltage and the read voltage is smaller than a permitted limit, from among the CAM cells, and perform an erase operation or a program operation for the unstable CAM cells; and a controller configured to control the operation circuit so that the program operation for storing the setting data in the unstable CAM cells is performed if the number of unstable CAM cells detected in the test operation is greater than a permitted value.
摘要翻译：半导体存储器件包括：存储器阵列，被配置为包括用于存储输入数据的存储器单元和用于存储用于设置操作条件的设置数据的代码地址存储器（CAM）单元; 配置为通过向CAM单元提供读取电压来执行CAM读取操作的操作电路，执行用于检测阈值电压和读取电压之间的差小于允许极限的不稳定的CAM单元的测试操作，从CAM单元中进行擦除操作或对不稳定的CAM单元的编程动作; 以及控制器，其被配置为如果在测试操作中检测到的不稳定的CAM单元的数量大于允许值，则执行用于将设置数据存储在不稳定的CAM单元中的程序操作。

6. 发明授权

US08456907B2 Semiconductor memory device and method of operating the same 失效
标题翻译：半导体存储器件及其操作方法
公开(公告)号：US08456907B2
公开(公告)日：2013-06-04
申请号：US13337196
申请日：2011-12-26
申请人： Ji Hwan Kim , Seong Je Park , Jung Hwan Lee , Myung Cho , Beom Seok Hah
发明人： Ji Hwan Kim , Seong Je Park , Jung Hwan Lee , Myung Cho , Beom Seok Hah
IPC分类号： G11C11/34
CPC分类号： G11C16/10 , G11C11/5628 , G11C11/5635 , G11C16/0483 , G11C16/16 , G11C16/3459 , G11C2211/5621 , G11C2211/565
摘要： A method of operating a semiconductor memory device includes performing a first program loop including a first program operation and a first verification operation in order to store a lower bit data of n-bit data in memory cells coupled to a page, performing a subprogram loop for memory cells of an erase state, having threshold voltages lower than a target voltage of a negative potential, so that the threshold voltages of the memory cells of the erase state become higher than the target voltage, and performing a second program loop including a second program operation and a second verification operation in order to store an upper bit data of the n-bit data in the memory cells.
摘要翻译：一种操作半导体存储器件的方法包括执行包括第一程序操作和第一验证操作的第一程序循环，以便将n位数据的低位数据存储在耦合到页面的存储单元中，执行子程序循环具有低于负电位的目标电压的阈值电压的擦除状态的存储单元，使得擦除状态的存储单元的阈值电压变得高于目标电压，并且执行包括第二程序的第二程序循环操作和第二验证操作，以便将n位数据的高位数据存储在存储单元中。

7. 发明授权

US07881115B2 Method of programming nonvolatile memory device 失效
标题翻译：非易失性存储器件编程方法
公开(公告)号：US07881115B2
公开(公告)日：2011-02-01
申请号：US12471546
申请日：2009-05-26
申请人： Ji Hwan Kim , Seong Je Park
发明人： Ji Hwan Kim , Seong Je Park
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C16/3436
摘要： According to a method of programming a nonvolatile memory device, a program operation is performed on a first page by applying a program pulse to the first page. A verification operation is performed on the program operation by applying a verification voltage to the first page. If the program operation for the first page has not been completed, a voltage selected from threshold voltages of the first page is set as a highest threshold voltage. The program operation for the first page is completed by repeatedly performing a program operation and a verification operation on the first page while a voltage level of the program pulse is increased. The sum of a program start voltage for the first page and a difference between the verification voltage and the highest threshold voltage is set as a program start voltage for a second page.
摘要翻译：根据非易失性存储器件的编程方法，通过向第一页应用编程脉冲，在第一页上执行编程操作。通过对第一页应用验证电压来对编程操作执行验证操作。如果第一页的编程操作尚未完成，则从第一页的阈值电压中选择的电压被设置为最高阈值电压。通过在编程脉冲的电压电平增加的同时在第一页上重复执行编程操作和验证操作来完成第一页的编程操作。将第一页的程序启动电压和验证电压与最高阈值电压之间的差的和设置为第二页的程序启动电压。

8. 发明申请

US20100142942A1 Apparatus for Transferring Optical Data in Optical Switching System Using Time Synchronization 失效
标题翻译：用于在光交换系统中使用时间同步传输光数据的装置
公开(公告)号：US20100142942A1
公开(公告)日：2010-06-10
申请号：US12518765
申请日：2007-02-08
申请人： June Koo Rhee , Ji Hwan Kim , Jung Yul Choi , Min Ho Kang
发明人： June Koo Rhee , Ji Hwan Kim , Jung Yul Choi , Min Ho Kang
IPC分类号： H04B10/08
CPC分类号： H04Q11/0066 , H04Q11/0005 , H04Q2011/0016 , H04Q2011/0035 , H04Q2011/0039 , H04Q2011/0045
摘要： Provided is an apparatus for transferring optical data in an optical switching system using time synchronization. The apparatus performs time synchronization on optical data to input the optical data at regular intervals through fiber delay line for time synchronization respectively disposed on input ports. Therefore, the apparatus can efficiently reduce a data blocking rate in comparison with a conventional optical switching system using an asynchronous electric buffer without a synchronous process, and achieve the same performance as conventional asynchronous technology despite using fewer wavelength converters and buffers, thus reducing system cost. In addition, using dynamic time synchronization modules, the apparatus performs time synchronization for minute time variation due to an environment such as temperature.
摘要翻译：提供了一种使用时间同步在光交换系统中传送光数据的装置。该装置对光数据执行时间同步，以均匀的间隔通过光纤延迟线输入光学数据，用于分别设置在输入端口上的时间同步。因此，与使用不具有同步处理的异步电动缓冲器的常规光开关系统相比，该装置可以有效地降低数据阻塞率，并且尽管使用较少的波长转换器和缓冲器，但是实现与传统异步技术相同的性能，从而降低系统成本。此外，使用动态时间同步模块，由于诸如温度的环境，该装置执行时间同步以进行微小的时间变化。

9. 发明授权

US07632719B2 Wafer-level chip scale package and method for fabricating and using the same 有权
标题翻译：晶圆级芯片尺寸封装及其制造和使用方法
公开(公告)号：US07632719B2
公开(公告)日：2009-12-15
申请号：US12350065
申请日：2009-01-07
申请人： Seung Yong Choi , Min Hyo Park , Ji Hwan Kim , Rajeev Joshi
发明人： Seung Yong Choi , Min Hyo Park , Ji Hwan Kim , Rajeev Joshi
IPC分类号： H01L21/00
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/3114 , H01L23/3171 , H01L23/525 , H01L24/11 , H01L24/13 , H01L24/29 , H01L24/83 , H01L24/97 , H01L2224/0231 , H01L2224/0401 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/29101 , H01L2224/2919 , H01L2224/29399 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/838 , H01L2224/97 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/1461 , H01L2924/15311 , H01L2924/181 , H01L2924/30107 , H01L2924/351 , H01L2224/81 , H01L2924/00014 , H01L2224/13099 , H01L2924/00 , H01L2924/01023 , H01L2924/01028 , H01L2924/3512
摘要： A packaged semiconductor device (a wafer-level chip scale package) containing a conductive adhesive material as an electrical interconnect route between the semiconductor die and a patterned conductive substrate is described. The patterned conductive substrate acts not only as a substrate, but also as a redistribution layer that converts the dense pad layout of the die to a larger array configuration of the solder balls in the circuit board. Using the invention allows the formation of a lower priced chip scale package that also overcomes the restriction of the die size used in die-sized chip packages and the input-output pattern that can be required by the printed circuit board. Thus, the invention can provide a familiar pitch (i.e., interface) to the printed circuit board for any small die.
摘要翻译：描述了包含导电粘合剂材料作为半导体管芯和图案化导电基板之间的电互连路线的封装半导体器件（晶片级芯片级封装）。图案化导电衬底不仅用作衬底，而且还用作将芯片的致密衬垫布局转换成电路板中的焊球的更大阵列配置的再分配层。使用本发明允许形成较低价格的芯片级封装，其还克服了芯片尺寸芯片封装中使用的裸片尺寸的限制以及印刷电路板可能需要的输入 - 输出图案。因此，本发明可以为任何小型芯片提供与印刷电路板的熟悉的间距（即接口）。

10. 发明授权

US08582367B2 Semiconductor memory device and method of operating the same 有权
标题翻译：半导体存储器件及其操作方法
公开(公告)号：US08582367B2
公开(公告)日：2013-11-12
申请号：US13177764
申请日：2011-07-07
申请人： Myung Cho , Hwang Huh , Jung Hwan Lee , Ji Hwan Kim
发明人： Myung Cho , Hwang Huh , Jung Hwan Lee , Ji Hwan Kim
IPC分类号： G11C16/06 , G11C16/04 , G11C7/10 , G11C7/22 , G11C29/00
CPC分类号： G11C16/26 , G11C16/10 , G11C29/1201 , G11C29/50 , G11C2029/5006 , G11C2216/14
摘要： A semiconductor memory device includes a memory cell array comprising a plurality of cell strings and a page buffer group comprising a plurality of page buffers coupled to the respective cell string through bit lines. Each of the page buffers includes a latch unit for storing data to be programmed into memory cells included in the cell string or for storing data read from the memory cells. Each of the page buffers is coupled to a pad for the test operation of the memory cells according to data stored in the latch unit in the test operation.
摘要翻译：半导体存储器件包括包括多个单元串的存储单元阵列和包括通过位线耦合到各个单元串的多个页缓冲器的页缓冲器组。每个页面缓冲器包括用于存储要被编程到包括在单元串中的存储器单元中的数据或用于存储从存储器单元读取的数据的锁存单元。根据在测试操作中存储在锁存单元中的数据，每个页缓冲器被耦合到用于存储器单元的测试操作的焊盘。

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