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1. 发明授权

US07928707B2 Method and apparatus for power management of a low dropout regulator 有权
标题翻译：低压差稳压器的电源管理方法和装置
公开(公告)号：US07928707B2
公开(公告)日：2011-04-19
申请号：US12168579
申请日：2008-07-07
申请人： Johannes Gerber , Matthias Arnold , Korbinian Huber
发明人： Johannes Gerber , Matthias Arnold , Korbinian Huber
IPC分类号： G05F1/00 , G05F1/10 , G05F3/02
CPC分类号： G05F1/56
摘要： A method of switching a low dropout regulator includes determining an actual active time of a power request from an electronic device; enabling the low dropout regulator in response to said power request at a time corresponding to a start of the actual active time of the power request for an active enabled time having a duration at least the same as the actual active time and long enough to sufficiently settle the output voltage of the low dropout regulator; and disabling the low dropout regulator. In embodiments, the active enabled time is prolonged beyond the actual active time of the power request for all or at least some power requests. An electronic device includes circuits for controlling the switching of a low dropout in the described manner.
摘要翻译：切换低压差调节器的方法包括从电子设备确定功率请求的实际有效时间; 使得低压差稳压器响应于所述功率请求，在对应于具有与实际有效时间至少相同的持续时间的有效使能时间的功率请求的实际有效时间的开始的时间，并且足够长以足以稳定低压差稳压器的输出电压; 并禁用低压差稳压器。在实施例中，主动使能时间被延长超过对所有或至少一些功率请求的功率请求的实际有效时间。电子设备包括用于以所述方式控制低压差切换的电路。

2. 发明申请

US20090039845A1 METHOD AND APPARATUS FOR POWER MANAGEMENT OF A LOW DROPOUT REGULATOR 有权
标题翻译：低压差稳压器功率管理方法与装置
公开(公告)号：US20090039845A1
公开(公告)日：2009-02-12
申请号：US12168579
申请日：2008-07-07
申请人： Johannes Gerber , Matthias Arnold , Korbinian Huber
发明人： Johannes Gerber , Matthias Arnold , Korbinian Huber
IPC分类号： G05F1/56
CPC分类号： G05F1/56
摘要： A method of switching a low dropout regulator includes determining an actual active time of a power request from an electronic device; enabling the low dropout regulator in response to said power request at a time corresponding to a start of the actual active time of the power request for an active enabled time having a duration at least the same as the actual active time and long enough to sufficiently settle the output voltage of the low dropout regulator; and disabling the low dropout regulator. In embodiments, the active enabled time is prolonged beyond the actual active time of the power request for all or at least some power requests. An electronic device includes circuits for controlling the switching of a low dropout in the described manner.
摘要翻译：切换低压差调节器的方法包括从电子设备确定功率请求的实际有效时间; 使得低压差稳压器响应于所述功率请求，在对应于具有与实际有效时间至少相同的持续时间的有效使能时间的功率请求的实际有效时间的开始的时间，并且足够长以足以稳定低压差稳压器的输出电压; 并禁用低压差稳压器。在实施例中，主动使能时间被延长超过对所有或至少一些功率请求的功率请求的实际有效时间。电子设备包括用于以所述方式控制低压差切换的电路。

3. 发明授权

US07982438B2 Method and circuit for controlling the refresh rate of sampled reference voltages 有权
标题翻译：用于控制采样参考电压刷新率的方法和电路
公开(公告)号：US07982438B2
公开(公告)日：2011-07-19
申请号：US12144996
申请日：2008-06-24
申请人： Johannes Gerber , Matthias Arnold , Korbinian Huber
发明人： Johannes Gerber , Matthias Arnold , Korbinian Huber
IPC分类号： H01M10/46
CPC分类号： G11C5/147 , G05F3/30 , G11C27/026
摘要： The present invention relates to controlling the refresh rate of the reference voltage on a sampling capacitor (Csamp). A comparator (COMP) compares the voltage on a first capacitor (C1) with the voltage on a second capacitor (C2). These capacitors have the capacitance of the sampling capacitor (Csamp). Upon each refresh the first capacitor (C1) samples a first voltage (Va) and the second capacitor samples a lower second voltage (Vb). The first capacitor (C1) is discharged at a first current Ia via a first leakage current source (D1). The second capacitor (C2) is discharged at a second current Ib via a second leakage current source (D2). The comparator (COMP) triggers a refresh when the voltages equal. The first current Ia is preferably an integer N times the second current Ib.
摘要翻译：本发明涉及对采样电容器（Csamp）上的参考电压的刷新率进行控制。比较器（COMP）将第一电容器（C1）上的电压与第二电容器（C2）上的电压进行比较。这些电容器具有采样电容器（Csamp）的电容。在每次刷新时，第一电容器（C1）对第一电压（Va）进行采样，而第二电容器采样较低的第二电压（Vb）。第一电容器（C1）经由第一漏电流源（D1）以第一电流Ia放电。第二电容器（C2）经由第二漏电流源（D2）在第二电流Ib放电。当电压相等时，比较器（COMP）触发刷新。第一电流Ia优选为第二电流Ib的整数N倍。

4. 发明申请

US20090051331A1 Method and Circuit for Controlling the Refresh Rate of Sampled Reference Voltages 有权
标题翻译：用于控制采样参考电压刷新率的方法和电路
公开(公告)号：US20090051331A1
公开(公告)日：2009-02-26
申请号：US12144996
申请日：2008-06-24
申请人： Johannes Gerber , Matthias Arnold , Korbinian Huber
发明人： Johannes Gerber , Matthias Arnold , Korbinian Huber
IPC分类号： H02J7/00
CPC分类号： G11C5/147 , G05F3/30 , G11C27/026
摘要： The present invention relates to controlling the refresh rate of the reference voltage on a sampling capacitor (Csamp). A comparator (COMP) compares the voltage on a first capacitor (C1) with the voltage on a second capacitor (C2). These capacitors have the capacitance of the sampling capacitor (Csamp). Upon each refresh the first capacitor (C1) samples a first voltage (Va) and the second capacitor samples a lower second voltage (Vb). The first capacitor (C1) is discharged at a first current Ia via a first leakage current source (D1). The second capacitor (C2) is discharged at a second current Ib via a second leakage current source (D2). The comparator (COMP) triggers a refresh when the voltages equal. The first current Ia is preferably an integer N times the second current Ib.
摘要翻译：本发明涉及对采样电容器（Csamp）上的参考电压的刷新率进行控制。比较器（COMP）将第一电容器（C1）上的电压与第二电容器（C2）上的电压进行比较。这些电容器具有采样电容器（Csamp）的电容。在每次刷新时，第一电容器（C1）对第一电压（Va）进行采样，而第二电容器采样较低的第二电压（Vb）。第一电容器（C1）经由第一漏电流源（D1）以第一电流Ia放电。第二电容器（C2）经由第二漏电流源（D2）在第二电流Ib放电。当电压相等时，比较器（COMP）触发刷新。第一电流Ia优选为第二电流Ib的整数N倍。

5. 发明申请

US20090058493A1 Signal Level Converter 审中-公开
标题翻译：信号电平转换器
公开(公告)号：US20090058493A1
公开(公告)日：2009-03-05
申请号：US12197506
申请日：2008-08-25
申请人： Matthias Arnold , Johannes Gerber , Bernhard Wolfgang Ruck
发明人： Matthias Arnold , Johannes Gerber , Bernhard Wolfgang Ruck
IPC分类号： H03L5/00
CPC分类号： H03K3/356113
摘要： An electronic device with a supply voltage level converter converts a signal from a first low supply voltage level to a second high supply voltage level includes; a first pair of cross coupled MOS transistors compliant with the second supply voltage level, each having a source coupled to the second supply voltage level and providing complementary output signals at respective drains; driven by a second pair of common gate MOS transistors compliant with the second supply voltage; driven by a third pair of common gate MOS transistors compliant with the first voltage level; and driven by first and second inverters coupled in a chain and supplied by the first supply voltage level, each having an output connected to the source of a transistor in a third pair.
摘要翻译：具有电源电压电平转换器的电子设备将来自第一低电源电压电平的信号转换为第二高电源电压电平包括：符合第二电源电压电平的第一对交叉耦合MOS晶体管，每一个具有耦合到第二电源电压电平的源极，并在相应的漏极处提供互补的输出信号; 由符合第二电源电压的第二对公共栅极MOS晶体管驱动; 由符合第一电压电平的第三对公共栅极MOS晶体管驱动; 并由耦合在链中并由第一电源电压电平提供的第一和第二反相器驱动，每个具有连接到第三对晶体管的源极的输出。

6. 发明授权

US08750015B2 Integrated circuit comprising a FRAM memory and method for granting read-access to a FRAM memory 有权
标题翻译：包括FRAM存储器的集成电路和用于授予对FRAM存储器的读取访问的方法
公开(公告)号：US08750015B2
公开(公告)日：2014-06-10
申请号：US13025878
申请日：2011-02-11
申请人： Volker Rzehak , Rudiger Kuhn , Johannes Gerber , Matthias Arnold
发明人： Volker Rzehak , Rudiger Kuhn , Johannes Gerber , Matthias Arnold
IPC分类号： G11C11/22
CPC分类号： G11C11/221 , G11C11/22 , G11C11/2273
摘要： An electronic device includes an integrated circuit with a FRAM memory and an integrated capacitor connected between a power supply for the FRAM memory and ground. The integrated capacitor has a capacitance sufficient to store the charge necessary for a complete read-and-write-back cycle of the FRAM memory. When granting read-access to the FRAM memory, the FRAM memory is supplied by the integrated capacitor which is then disconnected from the integrated circuit power supply. Upon receiving a request for a read-access to the FRAM memory, a charge detector detects whether the internal capacitor is sufficiently charged for a complete read-and-write-back cycle of the FRAM memory. Read-access to the FRAM memory is only granted if the internal capacitor is sufficiently charged and disconnected from the power supply. An alternative embodiment alternately charges and powers the FRAM from two integrated capacitors.
摘要翻译：电子设备包括具有FRAM存储器的集成电路和连接在用于FRAM存储器和接地的电源之间的集成电容器。集成电容器具有足以存储FRAM存储器的完整读/写周期所需的电荷的电容。当对FRAM存储器进行读取访问时，FRAM存储器由集成电容器提供，然后与集成电路电源断开连接。在接收到对FRAM存储器的读取访问的请求时，充电检测器检测对于FRAM存储器的完整的读/写周期，内部电容器是否被充分充电。仅当内部电容器充分充电并与电源断开连接时，才可以对FRAM存储器进行读取。替代实施例从两个集成电容器交替地对FRAM充电和供电。

7. 发明申请

US20130114324A1 Integrated Circuit Comprising a FRAM Memory and Method for Granting Read-Access to a FRAM Memory 有权
标题翻译：包含FRAM存储器的集成电路和授予对FRAM存储器的读取访问的方法
公开(公告)号：US20130114324A1
公开(公告)日：2013-05-09
申请号：US13025878
申请日：2011-02-11
申请人： Volker Rzehak , Rudiger Kuhn , Johannes Gerber , Matthias Arnold
发明人： Volker Rzehak , Rudiger Kuhn , Johannes Gerber , Matthias Arnold
IPC分类号： G11C11/22
CPC分类号： G11C11/221 , G11C11/22 , G11C11/2273
摘要： An electronic device includes an integrated circuit with a FRAM memory and an integrated capacitor connected between a power supply for the FRAM memory and ground. The integrated capacitor has a capacitance sufficient to store the charge necessary for a complete read-and-write-back cycle of the FRAM memory. When granting read-access to the FRAM memory, the FRAM memory is supplied by the integrated capacitor. Upon receiving a request for a read-access to the FRAM memory, a charge detector detects whether the internal capacitor is sufficiently charged for a complete read-and-write-back cycle of the FRAM memory. Read-access to the FRAM memory is only granted if the internal capacitor is sufficiently charged. An alternative embodiment alternately charges and powers the FRAM from two integrated capacitors.
摘要翻译：电子设备包括具有FRAM存储器的集成电路和连接在用于FRAM存储器和接地的电源之间的集成电容器。集成电容器具有足以存储FRAM存储器的完整读/写周期所需的电荷的电容。当对FRAM存储器进行读取访问时，FRAM存储器由集成电容器提供。在接收到对FRAM存储器的读取访问的请求时，充电检测器检测对于FRAM存储器的完整的读/写周期，内部电容器是否被充分充电。只有内部电容充足电才可以对FRAM存储器进行读取。替代实施例从两个集成电容器交替地对FRAM充电和供电。

8. 发明申请

US20090039945A1 Bias Current Generator 有权
标题翻译：偏置电流发生器
公开(公告)号：US20090039945A1
公开(公告)日：2009-02-12
申请号：US12147048
申请日：2008-06-26
申请人： Matthias Arnold , Johannes Gerber
发明人： Matthias Arnold , Johannes Gerber
IPC分类号： G05F3/16
CPC分类号： G05F3/30
摘要： An electronic device generates a current with a predetermined temperature coefficient. The circuit comprises a temperature coefficient (TC) component receiving a bias current, a differential amplifier providing a buffered output voltage based on the voltage across the TC component and a resistor receiving an TC current based on the differential amplifier output voltage. The differential amplifier has a predetermined input related offset which decreases the voltage drop across the resistor. The temperature coefficient component could have either a negative temperature component (NTC) or a positive temperature component (PTC).
摘要翻译：电子装置产生具有预定温度系数的电流。电路包括接收偏置电流的温度系数（TC）分量，基于TC分量两端的电压提供缓冲输出电压的差分放大器和基于差分放大器输出电压接收TC电流的电阻器。差分放大器具有预定的输入相关偏移，其减小了电阻器两端的电压降。温度系数分量可以具有负温度分量（NTC）或正温度分量（PTC）。

9. 发明授权

US08441308B2 Bias current generator 有权
标题翻译：偏置电流发生器
公开(公告)号：US08441308B2
公开(公告)日：2013-05-14
申请号：US12147048
申请日：2008-06-26
申请人： Matthias Arnold , Johannes Gerber
发明人： Matthias Arnold , Johannes Gerber
IPC分类号： G05F1/10
CPC分类号： G05F3/30
摘要： An electronic device generates a current with a predetermined temperature coefficient. The circuit comprises a temperature coefficient (TC) component receiving a bias current, a differential amplifier providing a buffered output voltage based on the voltage across the TC component and a resistor receiving an TC current based on the differential amplifier output voltage. The differential amplifier has a predetermined input related offset which decreases the voltage drop across the resistor. The temperature coefficient component could have either a negative temperature component (NTC) or a positive temperature component (PTC).
摘要翻译：电子装置产生具有预定温度系数的电流。电路包括接收偏置电流的温度系数（TC）分量，基于TC分量两端的电压提供缓冲输出电压的差分放大器和基于差分放大器输出电压接收TC电流的电阻器。差分放大器具有预定的输入相关偏移，其减小了电阻器两端的电压降。温度系数分量可以具有负温度分量（NTC）或正温度分量（PTC）。

10. 发明授权

US08159199B2 On-chip voltage supply scheme with automatic transition into low-power mode of MSP430 有权
标题翻译：片上电压供应方案，自动转换为低功耗模式的MSP430
公开(公告)号：US08159199B2
公开(公告)日：2012-04-17
申请号：US12166401
申请日：2008-07-02
申请人： Matthias Arnold
发明人： Matthias Arnold
IPC分类号： G05F1/00
CPC分类号： G06F1/26 , G05F1/56 , G06F1/3203
摘要： An integrated electronic device includes circuitry for providing a system supply voltage from a primary power supply. The circuitry has a high power (HP) stage coupled to the primary power supply and having an output node coupled to a supply system node for providing a HP system supply voltage level and a HP output current such that the HP stage is configured to be active in a full power mode, and a low power (LP) stage coupled to the primary power supply and to the supply system node through a voltage follower for providing a LP supply voltage level and an LP output current such that the LP stage is configured to be active in a low power mode. The HP system supply voltage level is greater than the LP system supply voltage level and the voltage follower of the LP stage is adapted to switch off in response to a voltage level at the supply system node becoming greater than the HP system supply voltage level and to switch on in response to the voltage level at the supply system node becoming lower than the HP system supply voltage level.
摘要翻译：集成电子设备包括用于从主电源提供系统电源电压的电路。电路具有耦合到主电源的高功率（HP）级，并且具有耦合到供电系统节点的输出节点，用于提供HP系统电源电压电平和HP输出电流，使得HP级配置为有效在全功率模式中，以及低功率（LP）级，其通过电压跟随器耦合到主电源和供电系统节点，用于提供LP电源电压电平和LP输出电流，使得LP级被配置为在低功耗模式下处于活动状态。 HP系统电源电压电平大于LP系统电源电压电平，并且LP级的电压跟随器适应于响应于供电系统节点处的电压电平变为大于HP系统电源电压电平的关断，并且响应于供电系统节点处的电压电平变得低于HP系统电源电压电平而接通。

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