专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08461902B2 Multiplexer circuit with load balanced fanout characteristics 有权
标题翻译：具有负载平衡扇出特性的多路复用器电路
公开(公告)号：US08461902B2
公开(公告)日：2013-06-11
申请号：US13015371
申请日：2011-01-27
申请人： Josef A. Dvorak , Edward Chang , Douglas R. Williams
发明人： Josef A. Dvorak , Edward Chang , Douglas R. Williams
IPC分类号： H03K17/00
CPC分类号： H03K17/005
摘要： A multiplexer (MUX) circuit with balanced select line loading is provided. The MUX circuit includes a plurality of 2:1 MUX units coupled together in a multistage cascading arrangement, along with a selection module coupled to the MUX units. The MUX units are arranged in an initial MUX stage, at least one intermediate MUX stage coupled to and following the initial MUX stage, and a final MUX stage coupled to and following the at least one intermediate MUX stage. Each MUX unit is controlled with a respective select bit input value provided by the selection module. The selection module controls the operation of the MUX units in the initial MUX stage with a first plurality of different select bits, controls the operation of the MUX units in the at least one intermediate MUX stage with a second plurality of different select bits, and controls the operation of the final MUX stage with a devoted select bit.
摘要翻译：提供了具有平衡选择线负载的多路复用器（MUX）电路。 MUX电路包括多级级联装置耦合在一起的多个2：1 MUX单元以及耦合到MUX单元的选择模块。 MUX单元布置在初始MUX级中，耦合到初始MUX级并且跟随初始MUX级的至少一个中间MUX级，以及耦合到至少一个中间MUX级的最终MUX级。每个MUX单元由选择模块提供的相应选择位输入值进行控制。选择模块利用第一多个不同的选择位来控制MUX单元在初始MUX级中的操作，控制具有第二多个不同选择位的至少一个中间MUX级中的MUX单元的操作，以及控制最终的MUX舞台的操作与一个专门的选择位。

2. 发明授权

US08677049B2 Region prefetcher and methods thereof 有权
标题翻译：区域预取器及其方法
公开(公告)号：US08677049B2
公开(公告)日：2014-03-18
申请号：US12422467
申请日：2009-04-13
申请人： Mahadev S. Deshpande , Ronny L. Arnold , Josef A. Dvorak , Paul L. Rogers
发明人： Mahadev S. Deshpande , Ronny L. Arnold , Josef A. Dvorak , Paul L. Rogers
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0862 , G06F2212/6024
摘要： A prefetch device and method are disclosed that determines from which addresses to speculatively fetch data based on information collected regarding previous cache-miss addresses. A historical record showing a propensity to experience cache-misses at a particular address-offset from a prior cache-miss address within a region of memory provides an indication that data needed by future instructions has an increased likelihood to be located at a similar offset from a current cache-miss address. The prefetch device disclosed herein maintains a record of the relationship between a cache-miss address and subsequent cache-miss addresses for the most recent sixty-four unique data manipulation instructions that resulted in a cache-miss. The record includes a weighted confidence value indicative of how many cache-misses previously occurred at each of a selection of offsets from a particular cache-miss address.
摘要翻译：公开了一种预取设备和方法，该预取设备和方法基于从先前的高速缓存未命中地址收集的信息确定哪些地址推测性地取出数据。一个历史记录表明在存储器区域内与先前的高速缓存未命中地址的特定地址偏移处遇到高速缓存丢失的倾向，提供了未来指令所需的数据的增加可能性位于与当前缓存未命中地址。本文公开的预取设备维护导致高速缓存未命中的最近的六十四个唯一数据操作指令的高速缓存未命中地址和后续高速缓存未命中地址之间的关系的记录。该记录包括加权置信度值，其指示在从特定高速缓存未命中地址的偏移选择中的每一个处先前发生多少个高速缓存未命中。

3. 发明申请

US20100262750A1 REGION PREFETCHER AND METHODS THEREOF 有权
标题翻译：地区预选者及其方法
公开(公告)号：US20100262750A1
公开(公告)日：2010-10-14
申请号：US12422467
申请日：2009-04-13
申请人： Mahadev S. Deshpande , Ronny L. Arnold , Josef A. Dvorak , Paul L. Rogers
发明人： Mahadev S. Deshpande , Ronny L. Arnold , Josef A. Dvorak , Paul L. Rogers
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0862 , G06F2212/6024
摘要： A prefetch device and method are disclosed that determines from which addresses to speculatively fetch data based on information collected regarding previous cache-miss addresses. A historical record showing a propensity to experience cache-misses at a particular address-offset from a prior cache-miss address within a region of memory provides an indication that data needed by future instructions has an increased likelihood to be located at a similar offset from a current cache-miss address. The prefetch device disclosed herein maintains a record of the relationship between a cache-miss address and subsequent cache-miss addresses for the most recent sixty-four unique data manipulation instructions that resulted in a cache-miss. The record includes a weighted confidence value indicative of how many cache-misses previously occurred at each of a selection of offsets from a particular cache-miss address.
摘要翻译：公开了一种预取设备和方法，该预取设备和方法基于从先前的高速缓存未命中地址收集的信息确定哪些地址推测性地取出数据。一个历史记录表明在存储器区域内与先前的高速缓存未命中地址的特定地址偏移处遇到高速缓存丢失的倾向，提供了未来指令所需的数据的增加可能性位于与当前缓存未命中地址。本文公开的预取设备维护导致高速缓存未命中的最近的六十四个唯一数据操作指令的高速缓存未命中地址和后续高速缓存未命中地址之间的关系的记录。该记录包括加权置信度值，其指示在从特定高速缓存未命中地址的偏移选择中的每一个处先前发生多少个高速缓存未命中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式