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1. 发明授权

US08775905B2 Memory system and operation method thereof 有权
标题翻译：存储系统及其操作方法
公开(公告)号：US08775905B2
公开(公告)日：2014-07-08
申请号：US13328399
申请日：2011-12-16
申请人： Kenichi Nakanishi
发明人： Kenichi Nakanishi
IPC分类号： G11C29/00
CPC分类号： G06F11/1004 , G06F11/1008 , G06F11/1048 , G06F11/1076 , G11C7/1006 , H03M13/1105
摘要： A memory system includes: a first non-volatile memory used for storing data to be accessed in block units; a second non-volatile memory used for storing data to be accessed in word units in random accesses to the second non-volatile memory; and a control section configured to control operations of the first and second non-volatile memories, wherein error correction codes to be applied to data stored in the second non-volatile memory are held in the first non-volatile memory.
摘要翻译：存储器系统包括：用于以块为单位存储要访问的数据的第一非易失性存储器; 第二非易失性存储器，用于以对于第二非易失性存储器的随机存取的单位存储要访问的数据; 以及控制部，被配置为控制第一和第二非易失性存储器的操作，其中将要应用于存储在第二非易失性存储器中的数据的纠错码保持在第一非易失性存储器中。

2. 发明申请

US20110087836A1 STORAGE UNIT AND MEMORY SYSTEM 审中-公开
标题翻译：存储单元和存储器系统
公开(公告)号：US20110087836A1
公开(公告)日：2011-04-14
申请号：US12897990
申请日：2010-10-05
申请人： Kenichi Nakanishi , Keiichi Tsutsui , Junichi Koshiyama
发明人： Kenichi Nakanishi , Keiichi Tsutsui , Junichi Koshiyama
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F13/385 , G06F12/0893 , G06F2213/3854
摘要： A storage unit includes: a random access memory device and a storage device to be accessed using an address in units of word and sector, respectively; and a storage controller controlling accesses to the random access memory device and the storage device according to the addresses designated via a bus. The storage controller includes first and second interface functions for access to data stored on the storage device and the random access memory designated using the sector address and the word address provided via the bus, respectively, a function of using the random access memory device as a first disk cache and determining data to be saved in the random access memory device in response to the access by the first interface function, and functions of transferring the data designated using the sector address by repeating register access and by a bus master function as continuous word-sized data through the bus.
摘要翻译：存储单元包括：随机存取存储器装置和存储装置，分别以字和扇区为单位使用地址进行访问; 以及存储控制器，其根据经由总线指定的地址来控制对所述随机存取存储器件和所述存储装置的访问。存储控制器包括用于访问存储在存储设备上的数据的第一和第二接口功能以及使用经由总线提供的扇区地址和字地址指定的随机存取存储器，使用随机存取存储器件作为第一磁盘高速缓存并且响应于第一接口功能的访问而确定要存储在随机存取存储器装置中的数据，以及通过重复寄存器访问和通过总线主机功能作为连续字传送使用扇区地址指定的数据的功能通过总线的尺寸数据。

3. 发明授权

US07836263B2 Nonvolatile memory controlling method and nonvolatile memory controlling apparatus 有权
标题翻译：非易失性存储器控制方法和非易失性存储器控制装置
公开(公告)号：US07836263B2
公开(公告)日：2010-11-16
申请号：US11047723
申请日：2005-02-02
申请人： Takahiro Fukushige , Kenichi Satori , Kenichi Nakanishi , Hideaki Bando , Junko Sasaki , Kunihiko Miura , Toshinori Nakamura , Kensuke Hatsukawa
发明人： Takahiro Fukushige , Kenichi Satori , Kenichi Nakanishi , Hideaki Bando , Junko Sasaki , Kunihiko Miura , Toshinori Nakamura , Kensuke Hatsukawa
IPC分类号： G06F13/00 , G06F13/28 , G06F12/06
CPC分类号： G11C16/10 , G11C2216/22
摘要： A nonvolatile-memory controlling method is disclosed which continuously accesses a plurality of memory banks structured so as to have each memory bank accessible independently. The method comprises the steps of: in a busy cycle of one of the plurality of memory banks being accessed, issuing access information to a second memory bank for access thereto; bringing the second memory bank into a selected state while the access information is being issued to the second memory bank using a selection signal for controlling a selected state and an unselected state for any one of the plurality of memory banks; bringing the memory bank in the busy cycle into an unselected state while the access information is being issued; and accessing the plurality of memory banks continuously based on the access information issued to the second memory bank in the busy cycle of one of the memory banks being accessed and in keeping with the selection signal for controlling the second memory bank.
摘要翻译：公开了一种非易失性存储器控制方法，其连续地访问结构化以使每个存储体可独立访问的多个存储体。该方法包括以下步骤：在被访问的多个存储器组之一的繁忙周期中，向第二存储体发出访问信息以访问它; 当使用用于控制所选状态的选择信号和所述多个存储体中的任何一个的未选择状态向所述第二存储体发出访问信息时，使所述第二存储体进入选择状态; 在正在发出访问信息的同时，将忙碌周期中的存储器置于未选择状态; 以及基于在被访问的一个存储体组的忙周期中发送到第二存储体的访问信息并且与用于控制第二存储体的选择信号一起存取多个存储体。

4. 发明授权

US07530005B2 Storage device 有权
标题翻译：储存设备
公开(公告)号：US07530005B2
公开(公告)日：2009-05-05
申请号：US11222128
申请日：2005-09-08
申请人： Kenichi Satori , Kenichi Nakanishi , Hideaki Bando , Takahiro Fukushige
发明人： Kenichi Satori , Kenichi Nakanishi , Hideaki Bando , Takahiro Fukushige
IPC分类号： G11C29/00
CPC分类号： G11B20/18 , G06F11/1068 , G11C16/28
摘要： The present invention has been made to realize a storage device capable of normally reading out data from the erase processing applied area. In a semiconductor storage device 1, when data read processing is performed for the erase-processing applied area in a memory section 2 to read out erase-state actual data Ddr and erase-state parity data Ddp each containing only “1s”, the erase-state actual data Ddr and erase-state parity data Ddp are inverted by a third data inverting circuit 13 to make all the values thereof “0”, followed by execution of the error detection processing. With the above configuration, it is possible to prevent an error from being detected in the error detection processing.
摘要翻译：本发明是为了实现能够从擦除处理应用区域正常地读出数据的存储装置。在半导体存储装置1中，当对存储部分2中的擦除处理应用区域进行数据读取处理以读出仅包含“1”的擦除状态实际数据Ddr和擦除状态奇偶校验数据Ddp时，擦除 - 状态实际数据Ddr和擦除状态奇偶校验数据Ddp由第三数据反相电路13反相，使其全部值为“0”，随后执行错误检测处理。利用上述配置，可以防止在错误检测处理中检测到错误。

5. 发明申请

US20070058464A1 Semiconductor storage device, electronic apparatus, and mode setting method 有权
标题翻译：半导体存储装置，电子装置和模式设定方法
公开(公告)号：US20070058464A1
公开(公告)日：2007-03-15
申请号：US11519251
申请日：2006-09-11
申请人： Kenichi Nakanishi
发明人： Kenichi Nakanishi
IPC分类号： G11C29/00
CPC分类号： G11C7/1045
摘要： Disclosed herein is a semiconductor storage device operable in a plurality of operation modes each having a separate maximum current consumption. The device includes: a data communication section configured to be capable of performing data communication in a plurality of communication modes; an attribute information storage section configured to store attribute information indicating the operation and communication modes; and a mode setting section configured to set the device to one of the operation modes and one of the communication modes. The data communication section transmits, to an electronic apparatus to which the device is attached, the information and receives from the apparatus a mode setting command for directing that the device be set to a combination of an operation mode and a communication mode selected from among the information. In accordance therewith, the mode setting section sets the device to the selected combination of modes.
摘要翻译：这里公开了一种半导体存储装置，其可以以各自具有单独的最大电流消耗的多种操作模式操作。该装置包括：数据通信部，被配置为能够以多种通信模式进行数据通信; 属性信息存储部，被配置为存储表示操作和通信模式的属性信息; 以及模式设置部分，被配置为将所述设备设置为所述操作模式之一和所述通信模式之一。所述数据通信部将所述信息发送到所述装置所附接的电子装置，并从所述装置接收将所述装置设定为从所述装置中选择的操作模式和通信模式的组合的模式设定指令信息。根据此，模式设置部分将设备设置为所选择的模式组合。

6. 发明申请

US20060164515A1 Image pickup apparatus and lens barrel 失效
标题翻译：摄像设备和镜筒
公开(公告)号：US20060164515A1
公开(公告)日：2006-07-27
申请号：US11324469
申请日：2006-01-04
申请人： Kenichi Nakanishi , Ken Tanaka , Takumi Fukuda
发明人： Kenichi Nakanishi , Ken Tanaka , Takumi Fukuda
IPC分类号： H04N5/225 , G02B23/24 , G02B3/00
CPC分类号： G02B7/102
摘要： An image pickup apparatus includes a lens barrel, a lens holding frame made movable in an optical axis direction inside the lens barrel, a movable lens held in the lens holding frame, a yoke inserted into the lens barrel and attached to the lens barrel, a magnet attached to the yoke, and a driving coil that is attached to the lens holding frame and located to be opposed to the magnet and gives propulsion to the lens holding frame. A pair of first fitting sections is provided in the lens barrel. A pair of second fitting sections is provided in the lens barrel. An interval between the first fitting sections is set larger than an interval between the second fitting sections. A distance from the optical axis to the respective first fitting sections is set larger than a distance from the optical axis to the respective second fitting sections.
摘要翻译：一种图像拾取装置，包括透镜镜筒，透镜保持框架，其可在镜筒内部沿光轴方向移动;保持在透镜保持框架中的可移动透镜;插入透镜镜筒中并连接到透镜镜筒的磁轭; 附着在磁轭上的磁体，以及驱动线圈，其安装在透镜保持框架上并且被定位成与磁体相对并将其推进到透镜保持框架。在镜筒中设置一对第一配合部。在镜筒中设置一对第二配合部。第一装配部之间的间隔被设定为大于第二装配部之间的间隔。从光轴到各个第一装配部的距离被设定为大于从光轴到各个第二装配部的距离。

7. 发明申请

US20060077583A1 Storage device 有权
公开(公告)号：US20060077583A1
公开(公告)日：2006-04-13
申请号：US11222128
申请日：2005-09-08
申请人： Kenichi Satori , Kenichi Nakanishi , Hideaki Bando , Takahiro Fukushige
发明人： Kenichi Satori , Kenichi Nakanishi , Hideaki Bando , Takahiro Fukushige
IPC分类号： G11B5/09
CPC分类号： G11B20/18 , G06F11/1068 , G11C16/28
摘要： The present invention has been made to realize a storage device capable of normally reading out data from the erase processing applied area. In a semiconductor storage device 1, when data read processing is performed for the erase-processing applied area in a memory section 2 to read out erase-state actual data Ddr and erase-state parity data Ddp each containing only “1s”, the erase-state actual data Ddr and erase-state parity data Ddp are inverted by a third data inverting circuit 13 to make all the values thereof “0”, followed by execution of the error detection processing. With the above configuration, it is possible to prevent an error from being detected in the error detection processing.

8. 发明授权

US06388908B1 Recording system, data recording device, memory device, and data recording method 有权
标题翻译：记录系统，数据记录装置，存储装置和数据记录方法
公开(公告)号：US06388908B1
公开(公告)日：2002-05-14
申请号：US09806133
申请日：2001-03-26
申请人： Shigeo Araki , Kenichi Nakanishi
发明人： Shigeo Araki , Kenichi Nakanishi
IPC分类号： G11C2700
CPC分类号： G06F3/0613 , G06F3/064 , G06F3/0659 , G06F3/0679 , G06F12/0246 , G06F12/0607 , G06F2212/2022 , G11C7/16 , G11C7/22 , G11C8/12 , G11C2207/16
摘要： Data 30 is recorded into storages 0 to 3 in parallel. Writing sectors are selected from a plurality of clusters so that the sectors are continuously arranged in each cluster, and the data is simultaneously written into the selected sectors. In the case where the sectors numbered in the original order are written into the storages 0 to 3 in parallel, the data of No. 0 is recorded into the head sector in the cluster of the storage 0, the data of No. 16 is recorded into the head sector in the cluster of the storage 1, the data of No. 32 is recorded into the head sector in the cluster of the storage 2, and the data of No. 48 is recorded into the head sector in the cluster of the storage 3, respectively. Thus, the data is arranged in the original order into the cluster constructed in the same storage. When the data is written into a plurality of storages in parallel, the compatibility of the file format of the written data is held.
摘要翻译：数据30被并行地记录到存储器0到3中。从多个簇中选择写入扇区，使得扇区被连续排列在每个簇中，并且数据被同时写入所选择的扇区。在以原始顺序编号的扇区并行地写入存储器0至3的情况下，将0号的数据记录在存储器0的簇中的头扇区中，记录16号的数据将32号的数据记录在存储器2的簇中的头扇区中，并将48号的数据记录在存储器2的簇中的头扇区中存储3个。因此，数据以原始顺序排列到同一存储器中构建的群集中。当数据被并行写入多个存储器时，保持写入数据的文件格式的兼容性。

9. 发明授权

US08468273B2 Information storage apparatus, information transfer method, information transfer system, program, and storage medium 有权
标题翻译：信息存储装置，信息传递方法，信息传送系统，程序和存储介质
公开(公告)号：US08468273B2
公开(公告)日：2013-06-18
申请号：US11820822
申请日：2007-06-21
申请人： Naohiro Adachi , Kenichi Satori , Kenichi Nakanishi , Tamaki Konno , Junko Nagata
发明人： Naohiro Adachi , Kenichi Satori , Kenichi Nakanishi , Tamaki Konno , Junko Nagata
IPC分类号： G06F3/00
CPC分类号： G06F3/0661 , G06F3/061 , G06F3/0673
摘要： An information storage apparatus transmits or receives information to or from another information processing apparatus in one of a plurality of data transfer modes. The information storage apparatus includes first storage means for storing the information; information transmission/reception control means for controlling transmission or reception of the information between the first storage means and second storage means contained in the other information processing apparatus; command analysis means for analyzing a command supplied from the other information processing apparatus to determine which of the plurality of data transfer modes should be applied; and configuration means for configuring the information transmission/reception control means based on a result of determination of the data transfer mode by the command analysis means.
摘要翻译：信息存储装置以多种数据传送模式之一向另一信息处理装置发送信息或从另一信息处理装置接收信息。信息存储装置包括用于存储信息的第一存储装置; 信息发送/接收控制装置，用于控制第一存储装置和其它信息处理装置中包含的第二存储装置之间的信息的发送或接收; 命令分析装置，用于分析从其他信息处理装置提供的命令，以确定应应用多个数据传输模式中的哪一个; 以及配置装置，用于基于由命令分析装置确定数据传输模式的结果来配置信息发送/接收控制装置。

10. 发明授权

US08386713B2 Memory apparatus, memory control method, and program 有权
标题翻译：存储装置，存储器控制方法和程序
公开(公告)号：US08386713B2
公开(公告)日：2013-02-26
申请号：US12207143
申请日：2008-09-09
申请人： Nobuhiro Kaneko , Kenichi Nakanishi
发明人： Nobuhiro Kaneko , Kenichi Nakanishi
IPC分类号： G06F12/00
CPC分类号： G06F12/0866 , G06F2212/2022
摘要： Disclosed herein is a memory apparatus comprising: a nonvolatile memory configured to allow data to be written thereto and read therefrom in units of a cluster and to permit data to be deleted therefrom in units of a block made up of a plurality of sectors; a control circuit configured to control access operations to said nonvolatile memory; a management area; a user data area; and a cache area; said management area includes a logical/physical table, and the addresses of physical blocks in said cache area.
摘要翻译：这里公开了一种存储装置，包括：非易失性存储器，被配置为允许将数据写入其中并以簇为单位从其中读取，并且允许以由多个扇区组成的块为单位从其中删除数据; 控制电路，被配置为控制对所述非易失性存储器的访问操作; 一个管理区; 用户数据区; 和缓存区域; 所述管理区域包括逻辑/物理表以及所述高速缓存区域中的物理块的地址。

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